Abstract: The disclosure provides LED display panel and manufacturing method thereof. LED display panel includes: substrate; LED on substrate; pixel defining layer defining pixel opening on substrate, the LED being within pixel opening; and first encapsulation layer on light emitting side of LED. Portion of first encapsulation layer within pixel opening includes sidewall inclined with respect to substrate, surface of sidewall close to LED includes first portions and second portions alternately arranged in direction away from LED and connected to each other, and inclination angles of first portions with respect to substrate are smaller than those of second portions with respect to substrate. Refractive index of material of first encapsulation layer is greater than refractive index of material of each of layer structures directly on both sides of first encapsulation layer in direction perpendicular to substrate.

Abstract: An array substrate, a manufacturing method thereof, and a display panel are provided. The array substrate comprises a base substrate, a plurality of gate lines and gate electrodes on the base substrate, each gate electrode being corresponding to and separate from a respective gate line, a gate insulating layer over the gate electrode and the gate line, the gate insulating layer having a first via hole and a second via hole, the first via hole exposing the gate electrode, the second via hole exposing the gate line, a conductive connection layer and a polysilicon semiconductor layer on the gate insulating layer, the conductive connection layer filling the first via hole and the second via hole to connect the gate line with the gate electrode.

Abstract: A manufacturing method of an array substrate, an array substrate and a display device are disclosed. The manufacturing method of the array substrate includes: providing a base substrate (200); forming a semiconductor layer on the base substrate; depositing an etch stop layer material on the semiconductor layer; subjecting the etch stop layer material to a wet etching process to form an etch stop layer; subjecting the semiconductor layer to a dry etching process to form an active layer, wherein the active layer includes a first region and a second region surrounding the first region, an orthographic projection of the etch stop layer on the base substrate completely coincides with an orthographic projection of the first region of the active layer on the base substrate.

Abstract: Provided are a thin film transistor and method for manufacturing the same, array substrate, display panel and display device. The thin film transistor includes: a gate pattern, a gate insulating layer, an active layer pattern, a source pattern and a drain pattern sequentially stacked. At least one of a surface of the source pattern facing the gate insulating layer, a surface of the drain pattern facing the gate insulating layer, and a surface of the gate pattern facing the gate insulating layer is a target surface which can diffusely reflect lights entering the target surface, to prevent part of the lights from entering the active layer pattern. The display device solves the problem of volt-ampere characteristic curve of the active layer pattern being deflected and a normal operation of the thin film transistor being affected, thereby weakening the influence of lights on the normal operation of the thin film transistor.

Abstract: The present disclosure provides an array substrate, a fabrication method thereof and a display device. The array substrate includes an insulating layer provided with a first via therein. The array substrate further includes a detection structure including a first conductive structure, a second conductive structure and an insulating structure therebetween. The insulating structure is a portion of the insulating layer. The second conductive structure includes a first portion and a second portion which are separated from each other, and the first portion and the second portion partially overlap with the first conductive structure in a thickness direction of the array substrate, respectively. A second via is provided in the insulating structure between overlapping portions of the first portion and the first conductive structure, and a third via is provided in the insulating structure between overlapping portions of the second portion and the first conductive structure.

Abstract: The present disclosure provides an array substrate and a manufacturing method of the array substrate, a display device. An array substrate comprises: a pixel array, each pixel in the pixel array having a pixel electrode; a transistor array, each transistor in the transistor array having a source electrode; and a connection electrode for electrically connecting the pixel electrode to a corresponding source electrode.

Abstract: A thin film transistor (10) may include a substrate (100); a buffer layer (300) on a surface of the substrate (100); an active layer (400) on a surface of the buffer layer (300) opposite from the substrate (100); a gate insulating layer (500) on a surface of the active layer (400) opposite from the substrate (100), and a gate (600) on a surface of the gate insulating layer (500) opposite from the substrate (100). A width of the active layer (400) may be smaller than a width of the gate (600), and an orthographic projection of the gate (600) on the substrate (100) may cover an orthographic projection of the active layer (400) on the substrate (100).

Abstract: A thin film transistor, comprising a substrate, an active layer disposed on the substrate, and a source and drain that make electrical contact with the active layer, wherein the source and drain each comprise a first sub-electrode and a second sub-electrode that are stacked along a thickness of the active layer, and the first sub-electrode is closer to the active layer relative to the second sub-electrode. An area of an overlapping region between an orthographic projection of the second sub-electrode of at least one of the source and drain on the substrate and an overlapping region between an orthographic projection of the first sub-electrode of the at least one of the source and the drain on the substrate and the orthographic projection of the active layer on the substrate.

Abstract: A fabrication method of a thin film transistor is provided. The fabrication method includes: forming a gate electrode, an active layer, a drain electrode and a source electrode on the base substrate, in which the active layer includes a channel region and a second portion on both sides of the channel region, and at least a portion of the channel region is overlapped with the gate electrode; and performing a laser annealing process on a side of the base substrate by using a laser, in which the channel region is shielded without being irradiated by the laser, a resistivity of the second portion of the active layer is lower than a resistivity of the channel region, and the second portion of the active layer is connected with the source electrode and the drain electrode. A thin film transistor, an array substrate and a display device are further provided.

Abstract: The present application discloses a thin film transistor having an active layer including a channel part, a source contact part, and a drain contact part. At least one of the source contact part and the drain contact part has a contacting edge having one or more irregularities along the contacting edge.

Abstract: A touch substrate, a manufacturing method thereof and a display device. The touch substrate according to the embodiment of the present disclosure includes: a basal substrate; a touch electrode layer disposed on the basal substrate, the touch electrode layer comprising a plurality of touch electrodes; and a filler disposed between any two adjacent touch electrodes of the touch electrode layer. An orthographic projection of the filler on the basal substrate is at least partially located between orthographic projections of two adjacent touch electrodes on the basal substrate. A refractive index of the filler is n3, a refractive index of the basal substrate is n1, a refractive index of the touch electrode is n2, and |n2?n3|<|n2?n1|.

Abstract: The present disclosure is in the field of display technologies, and provides an array substrate including an IGZO film layer, a gate layer, and a gate insulating layer. The gate layer is provided with broken lines at a position thereof overlapping the IGZO film layer to form a first gate line and a second gate line. The gate insulating layer is disposed between the IGZO film layer and the gate layer, and is provided with at least two through holes thereon, in which the first gate line is connected with the IGZO film layer through one of the through holes, and the second gate line is connected with the IGZO film layer through another through hole, thus, connecting the IGZO film layer in series into the gate layer.

Abstract: The present disclosure provides an array substrate, a fabrication method thereof and a display device. The array substrate includes an insulating layer provided with a first via therein. The array substrate further includes a detection structure including a first conductive structure, a second conductive structure and an insulating structure therebetween. The insulating structure is a portion of the insulating layer. The second conductive structure includes a first portion and a second portion which are separated from each other, and the first portion and the second portion partially overlap with the first conductive structure in a thickness direction of the array substrate, respectively. A second via is provided in the insulating structure between overlapping portions of the first portion and the first conductive structure, and a third via is provided in the insulating structure between overlapping portions of the second portion and the first conductive structure.

Abstract: A thin film transistor (10) may include a substrate (100); a buffer layer (300) on a surface of the substrate (100); an active layer (400) on a surface of the buffer layer (300) opposite from the substrate (100); a gate insulating layer (500) on a surface of the active layer (400) opposite from the substrate (100), and a gate (600) on a surface of the gate insulating layer (500) opposite from the substrate (100). A width of the active layer (400) may be smaller than a width of the gate (600), and an orthographic projection of the gate (600) on the substrate (100) may cover an orthographic projection of the active layer (400) on the substrate (100).

Abstract: A thin film transistor, a manufacturing method thereof, an array substrate and a display device are provided. The thin film transistor includes a first electrode on a substrate, a first insulating layer on the first electrode with the first insulating layer having a sidewall, an active layer on the first insulating layer with the active layer connected to the first electrode and comprising a portion on the sidewall which is configured as a channel of the thin film transistor, and a second electrode on the active layer with the second electrode connected to the active layer.

Abstract: The present application discloses a thin film transistor having an active layer including a channel part, a source contact part, and a drain contact part. At least one of the source contact part and the drain contact part has a contacting edge having one or more irregularities along the contacting edge.

Abstract: A fabrication method of a thin film transistor is provided. The fabrication method includes: forming a gate electrode, an active layer, a drain electrode and a source electrode on the base substrate, in which the active layer includes a channel region and a second portion on both sides of the channel region, and at least a portion of the channel region is overlapped with the gate electrode; and performing a laser annealing process on a side of the base substrate by using a laser, in which the channel region is shielded without being irradiated by the laser, a resistivity of the second portion of the active layer is lower than a resistivity of the channel region, and the second portion of the active layer is connected with the source electrode and the drain electrode. A thin film transistor, an array substrate and a display device are further provided.

Abstract: A manufacturing method of an array substrate, an array substrate and a display device are disclosed. The manufacturing method of the array substrate includes: providing a base substrate (200); forming a semiconductor layer on the base substrate; depositing an etch stop layer material on the semiconductor layer; subjecting the etch stop layer material to a wet etching process to form an etch stop layer; subjecting the semiconductor layer to a dry etching process to form an active layer, wherein the active layer includes a first region and a second region surrounding the first region, an orthographic projection of the etch stop layer on the base substrate completely coincides with an orthographic projection of the first region of the active layer on the base substrate.

Abstract: A touch substrate, a manufacturing method thereof and a display device. The touch substrate according to the embodiment of the present disclosure includes: a basal substrate; a touch electrode layer disposed on the basal substrate, the touch electrode layer comprising a plurality of touch electrodes; and a filler disposed between any two adjacent touch electrodes of the touch electrode layer. An orthographic projection of the filler on the basal substrate is at least partially located between orthographic projections of two adjacent touch electrodes on the basal substrate. A refractive index of the filler is n3, a refractive index of the basal substrate is n1, a refractive index of the touch electrode is n2, and |n2?n3|<|n2?n1|.

Abstract: Presented are deep learning-based systems and methods for fusing sensor data, such as camera images, motion sensors (GPS/IMU), and a 3D semantic map to achieve robustness, real-time performance, and accuracy of camera localization and scene parsing useful for applications such as robotic navigation and augment reality. In embodiments, a unified framework accomplishes this by jointly using camera poses and scene semantics in training and testing. To evaluate the presented methods and systems, embodiments use a novel dataset that is created from real scenes and comprises dense 3D semantically labeled point clouds, ground truth camera poses obtained from high-accuracy motion sensors, and pixel-level semantic labels of video camera images. As demonstrated by experimental results, the presented systems and methods are mutually beneficial for both camera poses and scene semantics.