Abstract: Embodiments described herein relate to plasma processes. A plasma process includes generating a plasma containing negatively charged oxygen ions. A substrate is exposed to the plasma. The substrate is disposed on a pedestal while being exposed to the plasma. While exposing the substrate to the plasma, a negative direct current (DC) bias voltage is applied to the pedestal to repel the negatively charged oxygen ions from the substrate.

Abstract: Embodiments described herein relate to plasma processes. A plasma process includes generating a plasma containing negatively charged oxygen ions. A substrate is exposed to the plasma. The substrate is disposed on a pedestal while being exposed to the plasma. While exposing the substrate to the plasma, a negative direct current (DC) bias voltage is applied to the pedestal to repel the negatively charged oxygen ions from the substrate.

Abstract: The present invention relates to a maca extract and uses thereof. The part of the maca extract extracted with polar solvent has anti-thrombotic activity, the part of the maca extract extracted with medium and low polarity solvents has anti-neutrophilic inflammatory and anti-allergic activities, the part of the maca extract extracted with low polarity solvent has anti-neutrophilic inflammatory activity and has pro-angiogenic activity.

Abstract: A signal detector circuit includes a signal peak detector circuit, a reference voltage generation circuit, and a comparator circuit. The signal peak detector circuit is arranged to receive a plurality of differential voltage input signals, and generate a single-ended peak signal according to the plurality of differential voltage input signals. The reference voltage generation circuit is arranged to generate a single-ended reference voltage signal. The comparator circuit is arranged to receive the single-ended peak signal and the single-ended reference voltage signal, and compare the single-ended peak signal with the single-ended reference voltage signal to generate a signal detection result.

Abstract: A method for performing common mode voltage re-biasing in an analog front-end circuit of a receiver, an associated common mode voltage re-biasing circuit, the receiver and an associated integrated circuit are provided. The common mode voltage re-biasing circuit may include a control circuit and multiple switchable common mode voltage re-biasing sub-circuits. The control circuit generates at least one control signal according to a command, for controlling the common mode voltage re-biasing circuit to operate in a selected circuit configuration. The multiple switchable common mode voltage re-biasing sub-circuits select a predetermined circuit configuration from a first predetermined circuit configuration and a second predetermined circuit configuration according to the at least one control signal to be the selected circuit configuration to perform common mode voltage re-biasing operations corresponding to the selected circuit configuration, respectively.

Abstract: In a method, an aluminum body is chemically treated with at least one of an alkaline solution and an acid solution. Anode-oxidization is performed on the chemically treated aluminum body to form an aluminum oxide layer. The aluminum oxide layer is treated with hot water at a temperature more than 75° C. or steam. The aluminum oxide layer after being treated with hot water or steam includes plural columnar grains, and an average width of the columnar grains is in a range from 10 nm to 100 nm.

Abstract: The present invention relates to a maca extract and uses thereof. The part of the maca extract extracted with polar solvent has anti-thrombotic activity, the part of the maca extract extracted with medium and low polarity solvents has anti-neutrophilic inflammatory and anti-allergic activities, the part of the maca extract extracted with low polarity solvent has anti-neutrophilic inflammatory activity and has pro-angiogenic activity.

Abstract: Embodiments described herein relate to plasma processes. A plasma process includes generating a plasma containing negatively charged oxygen ions. A substrate is exposed to the plasma. The substrate is disposed on a pedestal while being exposed to the plasma. While exposing the substrate to the plasma, a negative direct current (DC) bias voltage is applied to the pedestal to repel the negatively charged oxygen ions from the substrate.

Abstract: Embodiments described herein relate to plasma processes. A plasma process includes generating a plasma containing negatively charged oxygen ions. A substrate is exposed to the plasma. The substrate is disposed on a pedestal while being exposed to the plasma. While exposing the substrate to the plasma, a negative direct current (DC) bias voltage is applied to the pedestal to repel the negatively charged oxygen ions from the substrate.

Abstract: According to an exemplary embodiment, a method of forming an isolation layer is provided. The method includes the following operations: providing a substrate; providing a vertical structure having a first layer over the substrate; providing a first interlayer dielectric over the first layer; performing CMP on the first interlayer dielectric; and etching back the first interlayer dielectric and the first layer to form the isolation layer corresponding to a source of the vertical structure.

Abstract: A method includes forming a gate dielectric layer, forming a metal gate strip over a bottom portion of the gate dielectric layer, and performing a first etching process on the metal gate strip to remove a portion of the metal gate strip. The first etching process is performed anisotropically. After the first etching process, a second etching process is performed on the metal gate strip to remove a residue portion of the metal gate strip. The second etching process includes an isotropic etching process. A dielectric material is filled into a recess left by the etched portion and the etched residue portion of the metal gate strip.

Abstract: The present invention provides a signal detection circuit, wherein the signal detection circuit includes a sampling circuit and a determination circuit. In the operations of the signal detection circuit, the sampling circuit uses a plurality of clock signals to sample an input signal to generate a sampling result, wherein the plurality of clock signals have different phases, and frequencies of the plurality of clock signals are lower than a frequency of the input signal. The determination circuit refers to the sampling result to determine if the input signal comprises valid data, so as to determine if the input signal comes from outside a chip, wherein the chip includes the signal detection circuit.

Abstract: The present invention provides a signal detection circuit, wherein the signal detection circuit includes a sampling circuit and a determination circuit. In the operations of the signal detection circuit, the sampling circuit uses a plurality of clock signals to sample an input signal to generate a sampling result, wherein the plurality of clock signals have different phases, and frequencies of the plurality of clock signals are lower than a frequency of the input signal. The determination circuit refers to the sampling result to determine if the input signal comprises valid data, so as to determine if the input signal comes from outside a chip, wherein the chip includes the signal detection circuit.

Abstract: A method includes forming a gate dielectric layer, forming a metal gate strip over a bottom portion of the gate dielectric layer, and performing a first etching process on the metal gate strip to remove a portion of the metal gate strip. The first etching process is performed anisotropically. After the first etching process, a second etching process is performed on the metal gate strip to remove a residue portion of the metal gate strip. The second etching process includes an isotropic etching process. A dielectric material is filled into a recess left by the etched portion and the etched residue portion of the metal gate strip.

Abstract: In a method, an aluminum body is chemically treated with at least one of an alkaline solution and an acid solution. Anode-oxidization is performed on the chemically treated aluminum body to form an aluminum oxide layer. The aluminum oxide layer is treated with hot water at a temperature more than 75° C. or steam. The aluminum oxide layer after being treated with hot water or steam includes plural columnar grains, and an average width of the columnar grains is in a range from 10 nm to 100 nm.

Abstract: According to an exemplary embodiment, a method of forming an isolation layer is provided. The method includes the following operations: providing a substrate; providing a vertical structure having a first layer over the substrate; providing a first interlayer dielectric over the first layer; performing CMP on the first interlayer dielectric; and etching back the first interlayer dielectric and the first layer to form the isolation layer corresponding to a source of the vertical structure.

Abstract: In a method, an aluminum body is chemically treated with at least one of an alkaline solution and an acid solution. Anode-oxidization is performed on the chemically treated aluminum body to form an aluminum oxide layer. The aluminum oxide layer is treated with hot water at a temperature more than 75 ° C. or steam. The aluminum oxide layer after being treated with hot water or steam includes plural columnar grains, and an average width of the columnar grains is in a range from 10 nm to 100 nm.

Abstract: According to an exemplary embodiment, a method of forming an isolation layer is provided. The method includes the following operations: providing a substrate; providing a vertical structure having a first layer over the substrate; providing a first interlayer dielectric over the first layer; performing CMP on the first interlayer dielectric; and etching back the first interlayer dielectric and the first layer to form the isolation layer corresponding to a source of the vertical structure.

Abstract: According to an exemplary embodiment, a method of forming an isolation layer is provided. The method includes the following operations: providing a substrate; providing a vertical structure having a first layer over the substrate; providing a first interlayer dielectric over the first layer; performing CMP on the first interlayer dielectric; and etching back the first interlayer dielectric and the first layer to form the isolation layer corresponding to a source of the vertical structure.

Abstract: Embodiments described herein relate to plasma processes. A tool includes a pedestal. The pedestal is configured to support a semiconductor substrate. The tool includes a bias source. The bias source is electrically coupled to the pedestal. The bias source is operable to bias the pedestal with a direct current (DC) voltage. The tool includes a plasma generator. The plasma generator is operable to generate a plasma remote from the pedestal. A method for semiconductor processing includes performing a plasma process on a substrate in a tool. The plasma process includes flowing a gas into the tool. The plasma process includes biasing a pedestal that supports the substrate in the tool. The plasma process includes igniting a plasma in the tool using the gas.