Patents by Inventor Bing-Yu Hsieh

Bing-Yu Hsieh has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20090096538
    Abstract: For decreasing errors within an analog phase-locked loop, an all-digital phase-locked loop (ADPLL) with digital components and digital operations is used. The ADPLL may also be used for direct frequency modulation (DFM). By defining a proportional path gain of an ADPLL by a bandwidth and a reference frequency of the ADPLL, by a TDC gain, a DCO gain, a dividing ratio of a frequency divider, a gain of an amplifier or a combination thereof, the gain of the amplifier may be adjusted so that an optimal loop bandwidth of the ADPLL may be well calibrated. For achieving the aim of entirely digital of the ADPLL, the gains of the TDC and the DCO may be further adjusted in a digital manner.
    Type: Application
    Filed: September 23, 2008
    Publication date: April 16, 2009
    Inventors: Hsiang-Hui Chang, Ping-Ying Wang, Jing-Hong Conan Zhan, Bing-Yu Hsieh
  • Publication number: 20090073827
    Abstract: An automatic power control system, a down sampling circuit and a down sampling method. The automatic power control system is incorporated in an optical disc drive comprising a laser diode for receiving a control signal to generate a laser beam; and a photodetector for detecting the laser beam to generate an analog input signal. The automatic power control system comprises an analog-to-digital converter, a down sampling circuit, a comparator, and a digital-to-analog converter. The analog-to-digital converter converts the analog input signal to digital data. The down sampling circuit, coupled to the analog-to-digital converter, comprises a down sampler, a counter, and a controller. The down sampler receives a predetermined amount of digital data to generate representation data. The counter, coupled to the down sampler, calculates the amount of digital data, and resets the down sampler when the amount equals or exceeds the predetermined count.
    Type: Application
    Filed: November 19, 2008
    Publication date: March 19, 2009
    Applicant: MEDIATEK INC.
    Inventors: Bing-Yu Hsieh, Ming-Jiou Yu, Kuo-Jung Lan, Shu-Hung Chou, Chih-Ching Chen, Chia-Wei Liao
  • Patent number: 7474235
    Abstract: An automatic power control system, a down sampling circuit and a down sampling method. The automatic power control system is incorporated in an optical disc drive comprising a laser diode for receiving a control signal to generate a laser beam; and a photodetector for detecting the laser beam to generate an analog input signal. The automatic power control system comprises an analog-to-digital converter, a down sampling circuit, a comparator, and a digital-to-analog converter. The analog-to-digital converter converts the analog input signal to digital data. The down sampling circuit, coupled to the analog-to-digital converter, comprises a down sampler, a counter, and a controller. The down sampler receives a predetermined amount of digital data to generate representation data. The counter, coupled to the down sampler, calculates the amount of digital data, and resets the down sampler when the amount equals or exceeds the predetermined count.
    Type: Grant
    Filed: June 5, 2007
    Date of Patent: January 6, 2009
    Assignee: Mediatek Inc.
    Inventors: Bing-Yu Hsieh, Ming-Jiou Yu, Kuo-Jung Lan, Shu-Hung Chou, Chih-Ching Chen, Chia-Wei Liao
  • Patent number: 7339405
    Abstract: A clock rate adjustment apparatus and a method for adjusting a clock rate of a clock for an optical storage system are provided. The clock rate adjustment apparatus comprises an indication provider, a throughput rate detector, and a clock generator. The method performs the following steps. The indication provider generates an indicatory signal indicating a state of the optical storage system. The throughput rate detector generates a control signal in response to the indicatory signal. The clock generator generates the clock at the clock rate in response to the control signal. The clock rate determined by the clock rate adjustment apparatus may be adjusted dynamically in response to a required minimum clock rate and a variable data rate.
    Type: Grant
    Filed: February 2, 2006
    Date of Patent: March 4, 2008
    Assignee: Mediatek, Inc.
    Inventors: Bing-Yu Hsieh, Hong-Ching Chen
  • Publication number: 20070291620
    Abstract: A method for controlling a specific output power level emitted from a laser diode (LD) in an optical pick-up head unit (OPU) is disclosed. The LD is configured to provide a plurality of output power levels for accessing/recording an optical disc. The method includes: determining a specific power control value according to a first output power level, a second output power level, a first power control value of the first output power level, and the specific output power level, wherein the first output power level is less than the specific output power level and greater than the second output power level; and driving the LD to emit the specific output power level according to the specific power control value, the first power control value, and a second power control value of the second output power level.
    Type: Application
    Filed: June 5, 2007
    Publication date: December 20, 2007
    Inventors: Ming-Jiou Yu, Chih-Ching Chen, Chia-Wei Liao, Kuo-Jung Lan, Bing-Yu Hsieh, Shu-Hung Chou
  • Publication number: 20070280070
    Abstract: The invention provides a wobble detection circuit. An exemplary embodiment of the wobble detection circuit comprises an automatic gain control module, an analog to digital converter, a digital band pass filter, and a digital band pass filter. The automatic gain control module amplifies a first input signal and a second input signal detected by a pickup head to the same magnitude to obtain a first amplified signal and a second amplified signal. The adder then subtracts the second amplified signal from the first amplified signal to obtain an analog wobble signal. The analog to digital converter then converts the analog wobble signal to a first digital wobble signal. Finally, the digital band pass filter accepts frequency components of the first digital wobble signal within a pass band and rejects frequency components of the first digital wobble signal outside the pass band to obtain a second digital wobble signal.
    Type: Application
    Filed: May 30, 2007
    Publication date: December 6, 2007
    Applicant: MEDIATEK INC.
    Inventors: Yuh Cheng, Chih-Ching Chen, Chia-Wei Liao, Ming-Jiou Yu, Kuo-Jung Lan, Shu-Hung Chou, Bing-Yu Hsieh
  • Publication number: 20070280072
    Abstract: The invention provides an apparatus for demodulating an Address In Pre-groove (ADIP) symbol. The ADIP symbol is carried by a wobble signal of an optical disk and comprises a series of ADIP bits permuted according to one of a plurality of permutation patterns to make up the ADIP symbol. A wobble extraction module extracts the wobble signal from the optical disk. A reference wobble generator generates a reference wobble with the same frequency and phase as a fundamental frequency and phase of a positive wobble cycle of the wobble signal. A waveform difference measurement module then measures a difference between the wobble signal and the reference wobble to obtain a series of difference measurement values respectively corresponding to the ADIP bits. A pattern matching module then compares probabilities of the permutation of the ADIP bits agreeing with each of the permutation patterns according to the difference measurement values to determine the ADIP symbol.
    Type: Application
    Filed: May 30, 2007
    Publication date: December 6, 2007
    Applicant: MEDIATEK INC.
    Inventors: Bing-Yu Hsieh, Yuh Cheng, Shu-Hung Chou, Jung-Feng Ho
  • Publication number: 20070280069
    Abstract: The invention provides an automatic gain controller processing an input signal for wobble detection circuit. An exemplary embodiment of the automatic gain controller comprises an envelope detection module, an analog to digital converter, a digital control module, a digital to analog converter, and a variable gain amplifier. The envelope detection module detects an envelope magnitude of an amplified signal. The analog to digital converter converts the envelope magnitude from analog to digital to obtain a digital envelope signal. The digital control module determines a digital gain signal for amplification of the input signal according to the digital envelope signal. The digital to analog converter converts the digital gain signal to an analog gain signal. The variable gain amplifier then amplifies the input signal according to the analog gain signal to obtain the amplified wobble signal.
    Type: Application
    Filed: May 30, 2007
    Publication date: December 6, 2007
    Applicant: MEDIATEK INC.
    Inventors: Yuh Cheng, Chih-Ching Chen, Chia-Wei Liao, Ming-Jiou Yu, Kuo-Jung Lan, Shu-Hung Chou, Bing-Yu Hsieh
  • Publication number: 20070279274
    Abstract: An automatic power control system, a down sampling circuit and a down sampling method. The automatic power control system is incorporated in an optical disc drive comprising a laser diode for receiving a control signal to generate a laser beam; and a photodetector for detecting the laser beam to generate an analog input signal. The automatic power control system comprises an analog-to-digital converter, a down sampling circuit, a comparator, and a digital-to-analog converter. The analog-to-digital converter converts the analog input signal to digital data. The down sampling circuit, coupled to the analog-to-digital converter, comprises a down sampler, a counter, and a controller. The down sampler receives a predetermined amount of digital data to generate representation data. The counter, coupled to the down sampler, calculates the amount of digital data, and resets the down sampler when the amount equals or exceeds the predetermined count.
    Type: Application
    Filed: June 5, 2007
    Publication date: December 6, 2007
    Applicant: MEDIATEK INC.
    Inventors: Bing-Yu Hsieh, Ming-Jiou Yu, Kuo-Jung Lan, Shu-Hung Chou, Chih-Ching Chen, Chia-Wei Liao
  • Publication number: 20070280071
    Abstract: An apparatus for detecting the wobble carrier frequency of an optical disk is disclosed. The apparatus comprises an offset canceller, a binary conversion module, an adjustable band pass filter, and a frequency detection module. The offset canceller cancels the direct current offset of a first wobble signal to obtain a second wobble signal. The binary conversion module converts the second wobble signal to a binary data stream. The adjustable band pass filter passes only an adjustable frequency range of the binary data stream to generate a filtered signal, wherein the center frequency of the adjustable frequency range is sequentially adjusted. The frequency detection module then determines maximum amplitude of the filtered signal, and determines the center frequency of the adjustable frequency range according to which the filtered signal with the maximum amplitude is generated, wherein the wobble carrier frequency is the center frequency corresponding to the maximum amplitude.
    Type: Application
    Filed: May 30, 2007
    Publication date: December 6, 2007
    Applicant: MEDIATEK INC.
    Inventors: Yuh Cheng, Bing-Yu Hsieh
  • Patent number: 7295073
    Abstract: An automatic gain control apparatus receiving an analog signal and outputting a digital signal includes a variable gain amplifier, an A/D converter, and a feedback circuit. The variable gain amplifier amplifies the analog signal with a gain. The A/D converter converts the amplified analog signal to the digital signal. The feedback circuit includes an amplitude level detector, a range detector, and a gain controller. The amplitude level detector generates a first amplitude level and a second amplitude level in response to the digital signal. The range detector generates an adjustment signal in response to the first amplitude level and the second amplitude level. The gain controller adjusts a gain control level for the variable gain amplifier in response to the adjustment signal.
    Type: Grant
    Filed: January 19, 2006
    Date of Patent: November 13, 2007
    Assignee: MediaTek Inc.
    Inventors: Bing-Yu Hsieh, Meng-Hsueh Lin, Wei-Hsuan Tu
  • Publication number: 20070176647
    Abstract: A clock rate adjustment apparatus and a method for adjusting a clock rate of a clock for an optical storage system are provided. The clock rate adjustment apparatus comprises an indication provider, a throughput rate detector, and a clock generator. The method performs the following steps. The indication provider generates an indicatory signal indicating a state of the optical storage system. The throughput rate detector generates a control signal in response to the indicatory signal. The clock generator generates the clock at the clock rate in response to the control signal. The clock rate determined by the clock rate adjustment apparatus may be adjusted dynamically in response to a required minimum clock rate and a variable data rate.
    Type: Application
    Filed: February 2, 2006
    Publication date: August 2, 2007
    Inventors: Bing-Yu Hsieh, Hong-Ching Chen
  • Publication number: 20070164823
    Abstract: An automatic gain control apparatus receiving an analog signal and outputting a digital signal includes a variable gain amplifier, an A/D converter, and a feedback circuit. The variable gain amplifier amplifies the analog signal with a gain. The A/D converter converts the amplified analog signal to the digital signal. The feedback circuit includes an amplitude level detector, a range detector, and a gain controller. The amplitude level detector generates a first amplitude level and a second amplitude level in response to the digital signal. The range detector generates an adjustment signal in response to the first amplitude level and the second amplitude level. The gain controller adjusts a gain control level for the variable gain amplifier in response to the adjustment signal.
    Type: Application
    Filed: January 19, 2006
    Publication date: July 19, 2007
    Applicant: MediaTek Inc.
    Inventors: Bing-Yu Hsieh, Meng-Hsueh Lin, Wei-Hsuan Tu
  • Publication number: 20070086286
    Abstract: A wobble signal synthesizer for generating a synthesized wobble signal synchronized with physical wobble signal is disclosed. The wobble signal synthesizer includes a variable-period signal generating module for generating the synthesized wobble signal; a first period calculating module, electrically coupled to the variable-period signal generating module, for calculating the number of periods of a second reference clock in a certain period of the synthesized wobble signal; a second period calculating module for calculating the number of periods of the second reference clock in a certain wobble period at a disc rotation speed; a comparison module, electrically coupled to the variable-period signal generating module, the first period calculating module, and the second period calculating module, for outputting the period error value; and a phase alignment module, electrically coupled to the variable-period signal generating module, for determining the phase error value.
    Type: Application
    Filed: October 17, 2005
    Publication date: April 19, 2007
    Inventors: Bing-Yu Hsieh, Hao-Cheng Chen
  • Publication number: 20070070866
    Abstract: A pre-pit signal generating device includes: a first slicer for generating a sliced signal corresponding to a push-pull signal based on a first reference level; a duty ratio controller coupled to the first slicer for adjusting the first reference level or the push-pull signal to control a duty ratio of the sliced signal to a predetermined ratio; a reference level generator coupled to the duty ratio controller for generating a second reference level corresponding to the first reference level; and a second slicer coupled to the reference level generator for generating a first pre-pit signal corresponding to the push-pull signal based on the second reference level.
    Type: Application
    Filed: September 28, 2005
    Publication date: March 29, 2007
    Inventors: Bing-Yu Hsieh, Chih-Ching Chen