Patents by Inventor Bo Qi
Bo Qi has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).
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Publication number: 20250030782Abstract: Data usage by networking and data processing services is measured using a timeslot system. The timeslots have multiple states for collecting, collecting with processing, and expired timeslots. Data from upstream components is reported to local manager clusters and placed into timeslots corresponding to a timestamp of the data. Data can be reported from local managers to an entitlement service and/or a cloud service portal. Timing inconsistencies due to latency or processing time can be resolved by accounting for a timestamp difference using a timestamp difference value between the timeslot time and the reporting time. Data can be deduplicated, cleaned, and/or compacted. Data can be also be version controlled, with timeslots maintaining a version number. Complete and accurate tracking of data usage and associated costs is improved by reporting and collecting usage data using state-based timeslots.Type: ApplicationFiled: September 28, 2023Publication date: January 23, 2025Inventors: Bo LIN, Kai LOU, Chuntao CHEN, Caixia JIANG, Xi ZENG, Wu QI, Danyang LI, Xiao LIANG
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Patent number: 12198936Abstract: Methods for forming defect-free gap fill materials comprising germanium oxide are disclosed. In some embodiments, the gap fill material is deposited by exposing a substrate surface to a germane precursor and an oxidant simultaneously. The germane precursor may be flowed intermittently. The substrate may also be exposed to a second oxidant to increase the relative concentration of oxygen within the gap fill material. A process for removal of germanium oxide is also disclosed.Type: GrantFiled: September 5, 2023Date of Patent: January 14, 2025Assignee: Applied Materials, Inc.Inventors: Huiyuan Wang, Susmit Singha Roy, Takehito Koshizawa, Bo Qi, Abhijit Basu Mallick
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Publication number: 20240339316Abstract: Embodiments of the present disclosure generally relate to processes for forming silicon- and boron-containing films for use in, e.g., spacer-defined patterning applications. In an embodiment, a spacer-defined patterning process is provided. The process includes disposing a substrate in a processing volume of a processing chamber, the substrate having patterned features formed thereon, and flowing a first process gas into the processing volume, the first process gas comprising a silicon-containing species, the silicon-containing species having a higher molecular weight than SiH4. The process further includes flowing a second process gas into the processing volume, the second process gas comprising a boron-containing species, and depositing, under deposition conditions, a conformal film on the patterned features, the conformal film comprising silicon and boron.Type: ApplicationFiled: June 18, 2024Publication date: October 10, 2024Inventors: Aykut AYDIN, Rui CHENG, Karthik JANAKIRAMAN, Abhijit Basu MALLICK, Takehito KOSHIZAWA, Bo QI
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Publication number: 20240321589Abstract: Embodiments of the present disclosure generally relate to fabricating electronic devices, such as memory devices. In one or more embodiments, a microelectronic device is provided and includes a film stack disposed on a substrate and a patterned hard mask disposed on an upper surface of the film stack. The film stack has a stack thickness and contains a plurality of alternating layers of oxide layers and nitride layers. The microelectronic device also includes a plurality of openings having a depth disposed between a plurality of structures, each structure has a sidewall and each opening has a bottom, the depth is less than the stack thickness, and each opening has an aspect ratio of greater than 50 relative to the depth. The microelectronic device also includes an etch protection liner disposed on the patterned hard mask and the sidewalls.Type: ApplicationFiled: May 31, 2024Publication date: September 26, 2024Inventors: Zeqing SHEN, Bo QI, Abhijit B. MALLICK
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Patent number: 12033848Abstract: Embodiments of the present disclosure generally relate to processes for forming silicon- and boron-containing films for use in, e.g., spacer-defined patterning applications. In an embodiment, a spacer-defined patterning process is provided. The process includes disposing a substrate in a processing volume of a processing chamber, the substrate having patterned features formed thereon, and flowing a first process gas into the processing volume, the first process gas comprising a silicon-containing species, the silicon-containing species having a higher molecular weight than SiH4. The process further includes flowing a second process gas into the processing volume, the second process gas comprising a boron-containing species, and depositing, under deposition conditions, a conformal film on the patterned features, the conformal film comprising silicon and boron.Type: GrantFiled: June 18, 2021Date of Patent: July 9, 2024Assignee: Applied Materials, Inc.Inventors: Aykut Aydin, Rui Cheng, Karthik Janakiraman, Abhijit B. Mallick, Takehito Koshizawa, Bo Qi
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Patent number: 12027374Abstract: Embodiments of the present disclosure generally relate to fabricating electronic devices, such as memory devices. In one or more embodiments, a method for forming a device includes forming a film stack on a substrate, where the film stack contains a plurality of alternating layers of oxide layers and nitride layers and has a stack thickness, and etching the film stack to a first depth to form a plurality of openings between a plurality of structures. The method includes depositing an etch protection liner containing amorphous-silicon on the sidewalls and the bottoms of the structures, removing the etch protection liner from at least the bottoms of the openings, forming a plurality of holes by etching the film stack in the openings to further extend each bottom of the openings to a second depth of the hole, and removing the etch protection liner from the sidewalls.Type: GrantFiled: April 30, 2021Date of Patent: July 2, 2024Assignee: APPLIED MATERIALS, INC.Inventors: Zeqing Shen, Bo Qi, Abhijit B. Mallick
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Patent number: 12018364Abstract: Methods for forming coating films comprising germanium oxide are disclosed. In some embodiments, the films are super-conformal to a feature on the surface of a substrate. The films are deposited by exposing a substrate surface to a germane precursor and an oxidant simultaneously. The germane precursor may be flowed intermittently. The substrate may also be exposed to a second oxidant to increase the relative concentration of oxygen within the super-conformal film.Type: GrantFiled: December 11, 2020Date of Patent: June 25, 2024Assignee: Applied Materials, Inc.Inventors: Huiyuan Wang, Susmit Singha Roy, Takehito Koshizawa, Bo Qi, Abhijit Basu Mallick
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Patent number: 11859278Abstract: Methods of forming carbon polymer films are disclosed. Some methods are advantageously performed at lower temperatures. The substrate is exposed to a first carbon precursor to form a substrate surface with terminations based on the reactive functional groups of the first carbon precursor and exposed to a second carbon precursor to react with the surface terminations and form a carbon polymer film. Processing tools and non-transitory memories to perform the process are also disclosed.Type: GrantFiled: March 12, 2020Date of Patent: January 2, 2024Assignee: Applied Materials, Inc.Inventors: Bhaskar Jyoti Bhuyan, Mark Saly, Ahbijit Basu Mallick, Eugene Yu Jin Kong, Bo Qi
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Publication number: 20230407468Abstract: Methods for forming defect-free gap fill materials comprising germanium oxide are disclosed. In some embodiments, the gap fill material is deposited by exposing a substrate surface to a germane precursor and an oxidant simultaneously. The germane precursor may be flowed intermittently. The substrate may also be exposed to a second oxidant to increase the relative concentration of oxygen within the gap fill material. A process for removal of germanium oxide is also disclosed.Type: ApplicationFiled: September 5, 2023Publication date: December 21, 2023Applicant: Applied Materials, Inc.Inventors: Huiyuan Wang, Susmit Singha Roy, Takehito Koshizawa, Bo Qi, Abhijit Basu Mallick
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Patent number: 11830729Abstract: Exemplary methods of semiconductor processing may include providing a boron-and-carbon-and-nitrogen-containing precursor to a processing region of a semiconductor processing chamber. A substrate may be disposed within the processing region of the semiconductor processing chamber. The methods may include generating a capacitively-coupled plasma of the boron-and-carbon-and-nitrogen-containing precursor. The methods may include forming a boron-and-carbon-and-nitrogen-containing layer on the substrate. The boron-and-carbon-and-nitrogen-containing layer may be characterized by a dielectric constant below or about 3.5.Type: GrantFiled: January 8, 2021Date of Patent: November 28, 2023Assignee: Applied Materials, Inc.Inventors: Zeqing Shen, Bo Qi, Abhijit Basu Mallick, Nitin K. Ingle
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Patent number: 11791155Abstract: Examples of the present technology include semiconductor processing methods to form diffusion barriers for germanium in a semiconductor structure. The methods may include forming a semiconductor layer stack from pairs of Si-and-SiGe layers. The Si-and-SiGe layer pairs may be formed by forming a silicon layer, and then forming the germanium barrier layer of the silicon layer. In some embodiments, the germanium-barrier layer may be less than or about 20 ?. A silicon-germanium layer may be formed on the germanium-barrier layer to complete the formation of the Si-and-SiGe layer pair. In some embodiments, the silicon layer may be an amorphous silicon layer, and the SiGe layer may be characterized by greater than or about 5 atom % germanium. Examples of the present technology also include semiconductor structures that include a silicon-germanium layer, a germanium-barrier layer, and a silicon layer.Type: GrantFiled: August 27, 2020Date of Patent: October 17, 2023Assignee: Applied Materials, Inc.Inventors: Huiyuan Wang, Susmit Singha Roy, Takehito Koshizawa, Bo Qi, Abhijit Basu Mallick, Nitin K. Ingle
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Patent number: 11791068Abstract: A post insulator includes an insulating post including a first end and a second end that are opposite to each other, a high-voltage-end grading ring connected to the first end of the insulating post, the high-voltage-end grading ring being insulated from the insulating post, a grounding-end grading ring connected to the second end of the insulating post, the grounding-end grading ring being insulated from the insulating post, and a charge control ring disposed on an outer surface of the insulating post, the charge control ring being insulated from the insulating post, and the charge control ring being configured to accumulate surface charges.Type: GrantFiled: October 14, 2020Date of Patent: October 17, 2023Assignees: STATE GRID CORPORATION OF CHINA, SINOMA ADVANCED MATERIALS CO., LTD., NORTH CHINA ELECTRIC POWER UNIVERSITY, SINOMA JIANGXI INSULATOR AND ELECTRICITY CO., LTD.Inventors: Licheng Lu, Faqiang Yan, Bo Qi, Zhiyi Chong, Chengrong Li, Zhijun Guo, Xiao Yang, Yanxia Ding
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Patent number: 11781218Abstract: Methods for forming defect-free gap fill materials comprising germanium oxide are disclosed. In some embodiments, the gap fill material is deposited by exposing a substrate surface to a germane precursor and an oxidant simultaneously. The germane precursor may be flowed intermittently. The substrate may also be exposed to a second oxidant to increase the relative concentration of oxygen within the gap fill material.Type: GrantFiled: December 11, 2020Date of Patent: October 10, 2023Assignee: APPLIED MATERIALS, INC.Inventors: Huiyuan Wang, Susmit Singha Roy, Takehito Koshizawa, Bo Qi, Abhijit Basu Mallick
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Patent number: 11732352Abstract: Hydrogen free (low-H) silicon dioxide layers are disclosed. Some embodiments provide methods for forming low-H layers using hydrogen-free silicon precursors and hydrogen-free oxygen sources. Some embodiments provide methods for tuning the stress profile of low-H silicon dioxide films. Further, some embodiments of the disclosure provide oxide-nitride stacks which exhibit reduced stack bow after anneal.Type: GrantFiled: February 11, 2021Date of Patent: August 22, 2023Assignee: APPLIED MATERIALS, INC.Inventors: Zeqing Shen, Bo Qi, Abhijit Basu Mallick, Nitin K. Ingle
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Patent number: 11702751Abstract: A non-conformal, highly selective liner for etch methods in semiconductor devices is described. A method comprises forming a film stack on a substrate; etching the film stack to form an opening; depositing a non-conformal liner in the opening; etching the non-conformal liner from the bottom of the opening; and selectively etching the film stack relative to the non-conformal liner to form a logic or memory hole. The non-conformal liner comprises one or more of boron, carbon, or nitrogen.Type: GrantFiled: August 10, 2020Date of Patent: July 18, 2023Assignee: Applied Materials, Inc.Inventors: Bo Qi, Huiyuan Wang, Yingli Rao, Abhijit Basu Mallick
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Patent number: 11682554Abstract: Exemplary methods of semiconductor processing may include providing a silicon-containing precursor and a carbon-containing precursor to a processing region of a semiconductor processing chamber. The carbon-containing precursor may be characterized by a carbon-carbon double bond or a carbon-carbon triple bond. A substrate may be disposed within the processing region of the semiconductor processing chamber. The methods may include providing a boron-containing precursor to the processing region of the semiconductor processing chamber. The methods may include thermally reacting the silicon-containing precursor, the carbon-containing precursor, and the boron-containing precursor at a temperature above about 250° C. The methods may include forming a silicon-and-carbon-containing layer on the substrate.Type: GrantFiled: April 20, 2021Date of Patent: June 20, 2023Assignee: Applied Materials, Inc.Inventors: Zeqing Shen, Bo Qi, Abhijit Basu Mallick
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Patent number: 11676813Abstract: Exemplary deposition methods may include delivering a silicon-containing precursor and a boron-containing precursor to a processing region of a semiconductor processing chamber. The methods may include delivering a dopant-containing precursor with the silicon-containing precursor and the boron-containing precursor. The dopant-containing precursor may include one or more of carbon, nitrogen, oxygen, or sulfur. The methods may include forming a plasma of all precursors within the processing region of the semiconductor processing chamber. The methods may include depositing a silicon-and-boron material on a substrate disposed within the processing region of the semiconductor processing chamber. The silicon-and-boron material may include greater than or about 1 at. % of a dopant from the dopant-containing precursor.Type: GrantFiled: September 18, 2020Date of Patent: June 13, 2023Assignee: Applied Materials, Inc.Inventors: Aykut Aydin, Rui Cheng, Yi Yang, Krishna Nittala, Karthik Janakiraman, Bo Qi, Abhijit Basu Mallick
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Patent number: 11658026Abstract: Methods for depositing a silicon-containing film on a substrate are described. The method comprises heating a processing chamber to a temperature greater than or equal to 200° C.; maintaining the processing chamber at a pressure of less than or equal to 300 Torr; coflowing a silicon precursor and nitrous oxide (N2O) into the processing chamber, and depositing a conformal silicon-containing film on the substrate. The silicon-containing film has dielectric constant (k-value) in a range of from about 3.8 to about 4.0, has a breakdown voltage of greater than 8 MV/cm at a leakage current of 1 mA/cm2 and has a leakage current of less than 1 nA/cm2 at 2 MV/cm.Type: GrantFiled: October 23, 2020Date of Patent: May 23, 2023Assignee: Applied Materials, Inc.Inventors: Zeqing Shen, Bo Qi, Abhijit Basu Mallick
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Patent number: 11655537Abstract: Methods for filling a substrate feature with a carbon gap fill, while leaving a void, are described. Methods comprise flowing a process gas into a high density plasma chemical vapor deposition (HDP-CVD) chamber, the chamber housing a substrate having at least one feature, the process gas comprising a hydrocarbon reactant, generating a plasma, and depositing a carbon film.Type: GrantFiled: October 26, 2020Date of Patent: May 23, 2023Assignee: Applied Materials, Inc.Inventors: Zeqing Shen, Bo Qi, Abhijit Basu Mallick
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Patent number: 11626278Abstract: Exemplary methods of semiconductor processing may include providing a boron-containing precursor to a processing region of a semiconductor processing chamber. A substrate may be disposed within the processing region of the semiconductor processing chamber. The methods may include providing a carbon-containing precursor to the processing region of the semiconductor processing chamber. The carbon-containing precursor may be characterized by a carbon-carbon double bond or a carbon-carbon triple bond. The methods may include thermally reacting the boron-containing precursor and the carbon-containing precursor at a temperature below about 650° C. The methods may include forming a boron-and-carbon-containing layer on the substrate.Type: GrantFiled: March 24, 2021Date of Patent: April 11, 2023Assignee: Applied Materials, Inc.Inventors: Bo Qi, Zeqing Shen, Abhijit Basu Mallick