Abstract: In one embodiment, an integrated circuit package includes a lead frame with a die paddle and several leads. Portions of the lead frame not having an external electrical connection may be thinned such that they may be encapsulated by an electrically insulating packaging material on the back of the lead frame. Portions of the lead frame having external electrical connections may have a thickness such that they are exposed through the packaging material. The lead frame may be covered by an electrically insulating cover to protect components on the lead frame from erroneous electrical contact or electrostatic discharge (ESD) damage.

Abstract: Disclosed is a tamper resistant PIN entry apparatus for input of a key and for encryption of a password in a cash transaction machine. The PIN entry apparatus supplies the electric power to a memory of an electric circuit section, in such a manner that a first rod and a second rod of a rear case connect contacts of a key scan board, wherein the first rod is protruded on the rear of a key module including a button provided substantially on the front of the key module and the second rod of the rear case is coupled with the rear of the key module. At this time, in case that the rear case is removed from the key module or damaged, thereby changing the location of any one of the first and the second rods at the contact, the electric circuit section detects the event and destroys the memory itself physically. Otherwise, the electric circuit section makes information stored in the memory physically or softwarely unreadable, thereby preventing the leakage of the information.

Abstract: A method and system for universal packaging in conjunction with an automated in-line back-end IC manufacturing process. In one method embodiment, the present invention processes a die-strip through a number of integrated in-line processes that function independently of the die size of the die-strip. A control computer maintains a die-strip map database recording the die size of the die-strip. In-line molding and solder ball attachment processes are then performed and function independently of the die size of the die-strip. Processes that are independent of die size provide a universal packaging manufacturing solution. The present invention then accesses the database to determine the die size for cutting the die-strip based on specifications maintained by the electronic die-strip map database. Sorting, testing and finish assembly processes are then performed.

Abstract: A method of performing back-end manufacturing of an integrated circuit (IC) device is disclosed. In one method embodiment, the present invention processes a die-strip through a front-of-line assembly portion which comprises a plurality of sub-stations operating on an in-line basis. The die-strip is then automatically provided to an end-of-line assembly portion. The die-strip is then processed through an end-of-line assembly portion which comprises a plurality of sub-stations operating on an in-line basis. The present embodiment then automatically provides the die-strip to a test assembly portion. The die-strip is then tested by the test portion and then automatically provided to a finish assembly portion. The present embodiment then processes the die-strip through a finish portion which comprises a plurality of sub-stations operating on an in-line basis. Camera systems perform automated visual inspection of dies on the die-strip and maintain a database that can be used for automated reject management.

Abstract: A method and system for a reject management protocol within a back-end IC manufacturing process. In one method embodiment, the present invention implements a tracking process for a die-strip. The present invention also maintains an electronic die-strip map database, and utilizes the tracking process to update the electronic die-strip map database as the die-strip moves in an in-line fashion from one sub-station to another within the manufacturing process. Information used to update the database can originate from one or more automated visual camera systems used for quality assurance. In so doing, the present invention categorizes the die on the die-strip based on information maintained by the electronic die-strip map database. This information can be used for die sorting and for die rejection. In one embodiment, an identifying code is placed on each die strip that can automatically identify the die-strip using the automated camera systems.

Abstract: An integrated back-end integrated circuit (IC) manufacturing assembly is disclosed. In one embodiment, the present invention has a front-of-line portion comprising a plurality of integrated sub-stations for operating on a first plurality of die-strips on an in-line basis to produce a second plurality of die-strips. The present embodiment further comprises an end-of-line portion coupled to the front-of-line portion and comprising a plurality of integrated sub-stations for operating on the second plurality of die-strips on an in-line basis to produce die-strip components. The present embodiment also comprises an in-line test portion coupled to the end-of-line portion for testing the die-strip components. The present embodiment further comprises a finish portion coupled to the in-line test portion and comprising a plurality of integrated sub-stations operating on tested die-strip components.

Abstract: A method and system for controlling the processing of an IC chip assembly line using a central computer system and a common communication protocol. In one embodiment, a manufacturing execution system (MEM) is used as the computer system and the communications protocol is the standard semi equipment communications standard/generic equipment model (SECS/GEM). One or more equipment cell controllers (CC) may be used to communicate between the MES a plurality of in-line substations which comprise the assembly line. Automated vision camera systems may also communicate information to the MES via the CCs. In one embodiment, the MES maintains a database in memory comprising processing history of a die-strip and results of automated die-strip examination from the vision camera systems. In one embodiment, the die-strip may be of a ball grid array (BGA) type.

Abstract: A static excitation system that can eliminate shaft vibrations of a generator and overvoltage when it is underexited is provided. The static excitation system includes an initial excitation equipment; a step-down transformer; a 3-phase diode bridge; a boost chopper provided with a transistor and a resister, and maintaining DC voltage to be constant; a DC chopper provided with a plurality of transistors and diodes, and supplying DC power to a rotor of a generator; a boost controller for controlling the boost chopper; and a DC chopper controller for controlling the DC chopper, wherein, overvoltage applied on the excitation system when underexcited is eliminated owing to the boost chopper preventing any changes at an output terminal of the generator from being transferred to the excitation system, and maintaining the excitation DC voltage to be constant; and also owing to the DC chopper which is capable of 4 quadrant operation, hereby pole slipping of the generator can be prevented.

Abstract: A method for processing a lot of semiconductor wafers in a semiconductor factory automation (FA) system, wherein the lot is defined as a predetermined number of semiconductor wafers, includes the steps of: a) determining whether a first process equipment operable at a first operating mode has a job file corresponding to the lot of semiconductor wafers, wherein the job file represents data required for a semiconductor process; b) if the first process equipment operable at the first operating mode has the job file, processing the lot of semiconductor wafers according to the job file in the first process equipment; c) if the first process equipment operable at the first operating mode has not the job file, providing the job file to a second process equipment operable at a second operating mode; and d) processing the lot of semiconductor wafers according to the job file in the second process equipment.

Abstract: The present invention relates to a static excitation system that can eliminate shaft vibrations of a generator and overvoltage when it is underexited. More specifically, the present invention relates to a static excitation system that can eliminate shaft vibrations of a generator and transient phenomena generated in a prior art, so that the present invention can be applied in a field in which an excitation system has a great importance in an isolated system or a weak system.

Abstract: A method and system for universal packaging in conjunction with an automated in-line back-end IC manufacturing process. In one method embodiment, the present invention processes a die-strip through a number of integrated in-line processes that function independently of the die size of the die-strip. A control computer maintains a die-strip map database recording the die size of the die-strip. In-line molding and solder ball attachment processes are then performed and function independently of the die size of the die-strip. Processes that are independent of die size provide a universal packaging manufacturing solution. The present invention then accesses the database to determine the die size for cutting the die-strip based on specifications maintained by the electronic die-strip map database. Sorting, testing and finish assembly processes are then performed.

Abstract: A method of performing back-end manufacturing of an integrated circuit (IC) device is disclosed. In one method embodiment, the present invention process a die-strip through a front-of-line assembly portion which comprises a plurality of sub-stations operating on an in-line basis. The die-strip is then automatically provided to an end-of-line assembly portion. The die-strip is then processed through an end-of-line assembly portion which comprises a plurality of sub-stations operating on an in-line basis. The present embodiment then automatically provides the die-strip to a test assembly portion. The die-strip is then tested by the test portion and then automatically provided to a finish assembly portion. The present embodiment then processes the die-strip through a finish portion which comprises a plurality of sub-stations operating on an in-line basis. Camera systems perform automated visual inspection of dies on the die-strip and maintain a database that can be used for automated reject management.

Abstract: A lead frame assembly includes one or more lead frames each defining a plurality of package locations organized in rows and columns. An injection molding system includes a plurality of culls, each cull being connected to the frame(s) through a plurality of subrunners. Each subrunner delivers molding compound from one of the culls to a respective column of package locations. A plurality of through gates are disposed between adjacent package locations within each column, each through gate supplying molding compound from one package location to a next adjacent package location within the column, each package location being filled with molding compound in turn from the preceding package location. The need for subrunners between adjacent columns of package locations is eliminated, allowing a higher density of package locations within the lead frame(s), reducing materials and labor costs, and increasing manufacturing productivity.

Abstract: A lead frame includes a first side rail, a second side rail spaced apart from the first side rail, a center rail disposed between the first side rail and the second side rail, and a plurality of package locations. Each package location includes a first and a second die attach paddle. The first die attach paddle supports a first side of a semiconductor die and is coupled only to the first side rail or to the second side rail. The second die attach paddle supports a second side of the semiconductor die and is coupled only to the center rail. The first and second die attach paddles are separate and unconnected to each other and may be generally circular in shape. An aggregate surface area of the first and second paddles may be less than about 25 percent of a surface area of the semiconductor die.

Abstract: A method for resetting a process recipe in a semiconductor factory automation (FA) system, includes the steps of: a) sending the process recipe and a lot identifier inputted from an operator to a process equipment, wherein the process recipe represents a set of semiconductor process conditions corresponding to a lot of semiconductor wafers and the lot identifier corresponds to the lot of semiconductor wafers; b) processing the lot of semiconductor wafers according to the process recipe; c) measuring the processed lot of semiconductor wafers to generate semiconductor measurement data; d) writing the semiconductor measurement data to a trace file, wherein the trace file includes the process recipe, the semiconductor measurement data and the lot identifier; e) retrieving the semiconductor measurement data contained in the trace file in response to a retrieval command inputted from the operator; and f) resetting the process recipe in response to a reset command inputted from the operator if the process recipe is

Abstract: A lead frame includes a first side rail, a second side rail spaced apart from the first side rail, a center rail disposed between the first side rail and the second side rail, and a plurality of package locations. Each package location includes a first and a second die attach paddle. The first die attach paddle supports a first side of a semiconductor die and is coupled only to the first side rail or to the second side rail. The second die attach paddle supports a second side of the semiconductor die and is coupled only to the center rail. The first and second die attach paddles are separate and unconnected to each other and may be generally circular in shape. An aggregate surface area of the first and second paddles may be less than about 25 percent of a surface area of the semiconductor die.

Abstract: A lead frame assembly includes one or more lead frames each defining a plurality of package locations organized in rows and columns. An injection molding system includes a plurality of culls, each cull being connected to the frame(s) through a plurality of subrunners. Each subrunner delivers molding compound from one of the culls to a respective column of package locations. A plurality of through gates are disposed between adjacent package locations within each column, each through gate supplying molding compound from one package location to a next adjacent package location within the column, each package location being filled with molding compound in turn from the preceding package location. The need for subrunners between adjacent columns of package locations is eliminated, allowing a higher density of package locations within the lead frame(s), reducing materials and labor costs, and increasing manufacturing productivity.

Abstract: Architecture, circuitry, and methods are provided for operating a high speed, volatile programmable logic integrated circuit using back-up non-volatile memory cells configured on an integrated circuit separate from the programmable logic integrated circuit. The lower density non-volatile memory cells can be formed on an integrated circuit using fabrication steps similar to those used to form, e.g., EEPROM devices or, more specifically, flash EEPROM devices. The programmable logic integrated circuit includes high density, volatile memory cells integrated with high speed, low density configurable CMOS-based logic. By using two separate processing technologies on two separate and distinct monolithic substrates, and interconnecting the separate integrated circuits on a singular monolithic substrate, the advantages of non-volatility can be combined with a high speed programmable circuit.