Abstract: A touch substrate includes a base substrate, a common electrode and a wire electrode. The base substrate has a plurality of common electrode areas. A common electrode is disposed in each of the common electrode areas. The common electrode has a plurality of first electrode lines extended in a first direction and arranged in a second direction crossing the first direction and a plurality of second electrode lines arranged in the first direction. The wire electrode is connected to an end of the common electrode to apply a voltage to the common electrode. The common electrode and the wire electrode are simultaneously formed through a same process using a printing substrate.

Abstract: A liquid crystal display comprising: a substrate; a plurality of common voltage lines disposed on the substrate; an insulating layer disposed on the common voltage lines; and a common electrode and a plurality of pixel electrodes disposed on the insulating layer, the plurality of pixel electrodes constituting a plurality of pixel electrodes, respectively, wherein the insulating layer comprises a plurality of contact holes to expose at least part of the common voltage lines, and wherein two adjacent contact holes among the plurality of contact holes are spaced apart by at least one pixel therebetween.

Abstract: A touch substrate includes a base substrate, a common electrode and a wire electrode. The base substrate has a plurality of common electrode areas. A common electrode is disposed in each of the common electrode areas. The common electrode has a plurality of first electrode lines extended in a first direction and arranged in a second direction crossing the first direction and a plurality of second electrode lines arranged in the first direction. The wire electrode is connected to an end of the common electrode to apply a voltage to the common electrode. The common electrode and the wire electrode are simultaneously formed through a same process using a printing substrate.

Abstract: A thin film transistor is provided. A thin film transistor according to an exemplary embodiment of the present invention includes: a substrate; a gate line disposed on the substrate and including a gate electrode; a semiconductor layer disposed on the substrate and including at least a portion overlapping the gate electrode; a gate insulating layer disposed between the gate line and the semiconductor layer; and a source electrode and a drain electrode disposed on the substrate and facing each other over a channel region of the semiconductor layer. The gate insulating layer includes a first region and a second region, the first region corresponds to the channel region of the semiconductor layer, the first region is made of a first material, the second region is made of a second material, and the first material and the second material have different atomic number ratios of carbon and silicon.

Abstract: According to a method of manufacturing a thin film transistor substrate, a composition including a metal oxalate and a solvent for manufacturing an oxide semiconductor is coated to form a thin film, the thin film is annealed, and the thin film is patterned to form a semiconductor pattern.

Abstract: A thin film transistor substrate according to an exemplary embodiment of the present invention includes a semiconductor layer including metal disposed on an insulating substrate, a gate electrode overlapping the semiconductor layer, and a source electrode and a drain electrode overlapping the semiconductor layer, wherein the metal in the semiconductor layer comprises indium (In), zinc (Zn), and tin (Sn), and a molar ratio ( R , R ? [ mol ? ? % ] = [ In ] [ In + Zn + Sn ] × 100 ) of indium (In) to the metals in the semiconductor layer is less than about 20%, and more specifically, the molar ratio ( R , R ? [ mol ? ? % ] = [ In ] [ In + Zn + Sn ] × 100 ) of indium (In) of the metals in the semiconductor layer is about 5% to about 13%.

Abstract: A thin film transistor array panel includes: a substrate; a gate line and a common voltage line on the substrate and electrically separated from each other; a gate insulating layer on the gate line and the common voltage line; a first passivation layer on the gate insulating layer; a common electrode on the first passivation layer; a second passivation layer on the common electrode; and a pixel electrode and a connecting member on the second passivation layer and electrically separated from each other. A first contact hole and a second contact hole are defined in the first and second passivation layers. The pixel electrode and the drain electrode are connected to each other through the second contact hole. The connecting member and the common electrode are connected to each other through the first contact hole.

Abstract: A method and an apparatus are provided for preventing battery power consumption and degradation of system performance due to the system resources being utilized by applications being executed, while providing a multi-tasking function through a plurality of applications. In the method, when a plurality of applications are executed, such execution of the plurality of applications is reported to the user, so as to enable the user to terminate one or more applications, thereby preventing unnecessary consumption of battery power.

Abstract: A method of manufacturing a nano-rod and a method of manufacturing a display substrate in which a seed including a metal oxide is formed. A nano-rod is formed by reacting the seed with a metal precursor in an organic solvent. Therefore, the nano-rod may be easily formed, and a manufacturing reliability of the nano-rod and a display substrate using the nano-rod may be improved.

Abstract: A thin film transistor array panel includes: gate lines; data lines insulated from and crossing the gate lines; and shorting bars disposed outside of a display area in which the gate lines cross the data lines. The shorting bars overlap portions of the data lines disposed outside of the display area. The shorting bar includes a semiconductor material.

Abstract: A thin film transistor includes a substrate, an oxide semiconductor layer that is disposed on the substrate, a gate electrode that overlaps with the oxide semiconductor layer, a gate insulating layer that is disposed between the oxide semiconductor layer and the gate electrode, and a source electrode and a drain electrode that at least partially overlap with the oxide semiconductor layer and are spaced from each other. The gate insulating layer includes an oxide including a first material. The oxide semiconductor layer includes an oxide which includes a same material as the first material and a second material, and the source electrode and the drain electrode include an oxide that includes a same material as the second material and a third material, and a grain boundary is not formed on an interface between at least one of the gate insulating layer and the oxide semiconductor layer or between the oxide semiconductor layer, and the source electrode and the drain electrode.

Abstract: A liquid crystal display comprising: a substrate; a plurality of common voltage lines disposed on the substrate; an insulating layer disposed on the common voltage lines; and a common electrode and a plurality of pixel electrodes disposed on the insulating layer, the plurality of pixel electrodes constituting a plurality of pixel electrodes, respectively, wherein the insulating layer comprises a plurality of contact holes to expose at least part of the common voltage lines, and wherein two adjacent contact holes among the plurality of contact holes are spaced apart by at least one pixel therebetween.

Abstract: A thin film transistor is provided. A thin film transistor according to an exemplary embodiment of the present invention includes: a substrate; a gate line disposed on the substrate and including a gate electrode; a semiconductor layer disposed on the substrate and including at least a portion overlapping the gate electrode; a gate insulating layer disposed between the gate line and the semiconductor layer; and a source electrode and a drain electrode disposed on the substrate and facing each other over a channel region of the semiconductor layer. The gate insulating layer includes a first region and a second region, the first region corresponds to the channel region of the semiconductor layer, the first region is made of a first material, the second region is made of a second material, and the first material and the second material have different atomic number ratios of carbon and silicon.

Abstract: A thin film transistor substrate according to an exemplary embodiment of the present invention includes a semiconductor layer including metal disposed on an insulating substrate, a gate electrode overlapping the semiconductor layer, and a source electrode and a drain electrode overlapping the semiconductor layer, wherein the metal in the semiconductor layer comprises indium (In), zinc (Zn), and tin (Sn), and a molar ratio ( R , R ? [ mol ? ? % ] = [ In ] [ In + Zn + Sn ] × 100 ) of indium (In) to the metals in the semiconductor layer is less than about 20%, and more specifically, the molar ratio ( R , R ? [ mol ? ? % ] = [ In ] [ In + Zn + Sn ] × 100 ) of indium (In) of the metals in the semiconductor layer is about 5% to about 13%.

Abstract: Provided is a method of controlling a portable terminal having a projector module using a headset, which includes: receiving a command signal from the headset; determining whether the projector module is in an execution or driving state; recognizing the command signal as a signal for controlling the projector module, in case the projector module is in the driving state; and controlling the projector module according to the recognized signal.

Abstract: A method and an apparatus are provided for preventing battery power consumption and degradation of system performance due to the system resources being utilized by applications being executed, while providing a multi-tasking function through a plurality of applications. In the method, when a plurality of applications are executed, such execution of the plurality of applications is reported to the user, so as to enable the user to terminate one or more applications, thereby preventing unnecessary consumption of battery power.

Abstract: A thin film transistor includes a substrate, an oxide semiconductor layer that is disposed on the substrate, a gate electrode that overlaps with the oxide semiconductor layer, a gate insulating layer that is disposed between the oxide semiconductor layer and the gate electrode, and a source electrode and a drain electrode that at least partially overlap with the oxide semiconductor layer and are spaced from each other. The gate insulating layer includes an oxide including a first material. The oxide semiconductor layer includes an oxide which includes a same material as the first material and a second material, and the source electrode and the drain electrode include an oxide that includes a same material as the second material and a third material, and a grain boundary is not formed on an interface between at least one of the gate insulating layer and the oxide semiconductor layer or between the oxide semiconductor layer, and the source electrode and the drain electrode.

Abstract: In a method of manufacturing a thin film transistor, a gate electrode is formed on a first surface of a base substrate, a oxide semiconductor layer, insulation layer and photo resist layer are formed an the fast surface of the base substrate having the gate electrode. The insulation layer and the oxide semiconductor layer are patterned using a first photo resist pattern to form an etch-stopper and an active pattern. A source and a drain electrode are formed on the base substrate having the active pattern and the etch-stopper, the source electrode and the drain electrode are overlapped with both ends of the etch-stopper and spaced apart from each other. Therefore, a manufacturing cost may be decreased by omitting a mask when forming the active pattern and the etch-stopper.

Abstract: A thin film transistor is provided. A thin film transistor according to an exemplary embodiment of the present invention includes: a substrate; a gate line disposed on the substrate and including a gate electrode; a semiconductor layer disposed on the substrate and including at least a portion overlapping the gate electrode; a gate insulating layer disposed between the gate line and the semiconductor layer; and a source electrode and a drain electrode disposed on the substrate and facing each other over a channel region of the semiconductor layer. The gate insulating layer includes a first region and a second region, the first region corresponds to the channel region of the semiconductor layer, the first region is made of a first material, the second region is made of a second material, and the first material and the second material have different atomic number ratios of carbon and silicon.

Abstract: A thin film transistor substrate according to an exemplary embodiment of the present invention includes a semiconductor layer including metal disposed on an insulating substrate, a gate electrode overlapping the semiconductor layer, and a source electrode and a drain electrode overlapping the semiconductor layer, wherein the metal in the semiconductor layer comprises indium (In), zinc (Zn), and tin (Sn), and a molar ratio ( R , R ? [ mol ? ? % ] = [ In ] [ In + Zn + Sn ] × 100 ) of indium (In) to the metals in the semiconductor layer is less than about 20%, and more specifically, the molar ratio (R, ( R , R ? [ mol ? ? % ] = [ In ] [ In + Zn + Sn ] / 100 ) of indium (In) of the metals in the semiconductor layer is about 5% to about 13%.