Abstract: A liquid crystal display includes first and second substrates. The first substrate has a first insulating substrate, and a pixel electrode formed on the first insulating substrate with a first opening pattern. The second substrate has a second insulating substrate, and a common electrode formed on the second insulating substrate with a second opening pattern. The first and the second opening patterns proceed parallel to each other while being arranged in an alternate manner. A liquid crystal material is injected between the first and the second substrates. A spacer is positioned at an end of the second opening pattern to maintain the distance between the first and the second substrates.

Abstract: A display substrate includes an insulation substrate, a gate line formed on the insulation substrate, a data line formed on the insulation substrate and crossing the gate line, a switching element formed on the insulation substrate and electrically connected to the gate line and the data line, and a pixel electrode formed on the insulation substrate. The pixel electrode is electrically connected to the switching element and includes a reflective electrode layer which reflects light and an absorption electrode layer which absorbs light.

Abstract: The present invention relates to a resist composition with a hardener and a solvent, and a method for forming a pattern using the resist composition. The hardener has a thermal-decomposable core part, and a first photosensitive bond art. The solvent has a low-molecular resin, and a second photosensitive bond part.

Abstract: An elecotrophoretic display device includes a first substrate, a gate line formed on the first substrate, a data line crossing the gate line to form a defined area, a source electrode connected to the data line, a drain electrode facing the source electrode to define a channel area, a color filter formed on the first substrate, a first electrode formed on the color filter, the first electrode electrically connected to the drain electrode, a second substrate facing the first substrate, a second electrode formed on the second substrate and a fluid and a plurality of charged particles interposed between the first electrode and the second electrode.

Abstract: A thin film transistor substrate according to one or more embodiments of the present invention includes a gate line formed on a substrate, a data line that is insulated from and intersects the gate line, a thin film transistor connected to the gate line and the data line, a barrier rub formed on the thin film transistor and partitioning a plurality of first openings, a reflecting electrode formed in each of the first openings, and a pixel electrode formed on the reflecting electrode and that is electrically connected to the thin film transistor.

Abstract: A display device includes an insulating substrate; a plurality of gate wires formed on the insulating substrate, the plurality of gate wires including a gate electrode; a gate insulating layer covering the plurality of gate wires; a transparent electrode layer formed on the gate insulating layer, the transparent electrode layer including a source electrode and a drain electrode disposed about the gate electrode and spaced apart from each other to define a channel region disposed therebetween; a plurality of data wires covering a predetermined portion of the transparent electrode layer and being crossed insulatedly with the plurality of gate wires to define pixels; and an organic semiconductor layer formed on the channel region for each pixel, a predetermined portion of the organic semiconductor layer being operatively connected with the source electrode, the drain electrode, and the gate electrode to form a transistor having an improved characteristic and a novel structure.

Abstract: A display substrate includes a gate line, a gate insulation layer, a data line, a switching element, a protection insulation layer, a gate pad portion and a data pad portion. The gate insulation layer is disposed on the gate line. The switching element is connected to the gate line and the data line. The protection insulation layer is disposed on the switching element. The gate pad portion includes a first gate pad electrode which makes contact with an end portion of the gate line through a first hole formed through the gate insulation layer, and a second gate pad electrode which makes contact with the first gate pad electrode through a second hole formed through the protection insulation layer. The data pad portion includes a data pad electrode which makes contact with an end portion of the data line through a third hole formed through the protection insulation layer.

Abstract: An organic thin film transistor array panel according to an embodiment of the present invention includes: a substrate; a data line disposed on the substrate; an insulating layer disposed on the data line and having a contact hole exposing the data line; a first electrode disposed on the insulating layer and connected to the data line through the contact hole; a second electrode disposed on the insulating layer; an organic semiconductor disposed on the first and the second electrodes; a gate insulator disposed on the organic semiconductor; and a gate electrode disposed on the gate insulator.

Abstract: A method of manufacturing a thin film transistor array panel is provided, the method includes forming a gate line on a substrate; forming a gate insulating layer on the gate line; forming a data line and a drain electrode on the gate insulating layer; forming an organic semiconductor layer on the data line, the drain electrode and an exposed portion of the gate insulating layer between the data line and the drain electrodel; forming a protective member fully covering the organic semiconductor layer; forming a passivation layer on the protective layer, the data line, and the drain electrode; forming a contact hole in the passivation layer to expose a portion of the drain electrode; and forming a pixel electrode on the passivation layer, the pixel electrode connected to the drain electrode through the contact hole.

Abstract: An improved display substrate is provided to reduce surface defects on insulating layers of organic thin film transistors. Related methods of manufacture are also provided. In one example, a display substrate includes a base, a plurality of data lines, a plurality of gate lines, a pixel defined by the data lines and the gate lines, an organic thin film transistor, and a pixel electrode. The data lines are on the base and are oriented in a first direction. The gate lines are oriented in a second direction that crosses the first direction. The organic thin film transistor includes a source electrode electrically connected to one of the data lines, a gate electrode electrically connected to one of the gate lines, and an organic semiconductor layer. The pixel electrode is disposed in the pixel and electrically connected to the organic thin film transistor. The pixel electrode comprises a transparent oxynitride.

Abstract: A thin film transistor array panel including an oxide semiconductor layer realizing excellent stability and electrical characteristics and an easy method of manufacturing the same are provided. A thin film transistor array panel includes: a substrate; an oxide semiconductor layer disposed on the substrate and including a metal oxide selected from the group consisting of zinc oxide, tin oxide, and hafnium oxide; a gate electrode overlapping the oxide semiconductor layer; a gate insulating film disposed between the oxide semiconductor layer and the gate electrode; and a source electrode and a drain electrode disposed to at least partially overlap the oxide semiconductor layer and separated from each other.

Abstract: An organic thin film transistor substrate includes a gate electrode formed on a substrate, a gate insulation layer formed on the gate electrode to have a source-connecting portion and a drain-seating groove, a source electrode formed in the source-connecting portion, a drain electrode formed in the drain-seating groove and an organic semiconductor layer contacting the gate insulation layer, the source electrode and the drain electrode.

Abstract: A liquid crystal display includes first and second substrates. The first substrate has a first insulating substrate, and a pixel electrode formed on the first insulating substrate with a first opening pattern. The second substrate has a second insulating substrate, and a common electrode formed on the second insulating substrate with a second opening pattern. The first and the second opening patterns proceed parallel to each other while being arranged in an alternate manner. A liquid crystal material is injected between the first and the second substrates. A spacer is positioned at an end of the second opening pattern to maintain the distance between the first and the second substrates.

Abstract: A method of manufacturing a thin film transistor array panel is provided, the method including: forming a gate line on a substrate; forming a gate insulating layer on the gate line; forming a data line and a drain electrode on the gate insulating layer; forming an organic semiconductor layer on the data line, the drain electrode and an exposed portion of the gate insulating layer between the data line and the drain electrode; forming a protective member fully covering the organic semiconductor layer; forming a passivation layer on the protective layer, the data line, and the drain electrode; forming a contact hole in the passivation layer to expose a portion of the drain electrode; and forming a pixel electrode on the passivation layer, the pixel electrode connected to the drain electrode through the contact hole.

Abstract: An organic thin film transistor array panel includes; a substrate, a data line formed on the substrate, a gate line intersecting the data line and including a gate electrode, a first interlayer insulating layer formed on the gate line and the data line and including a first opening exposing the gate electrode, a gate insulator formed in the first opening, a source electrode disposed on the gate insulator and connected to the data line, a pixel electrode disposed on the gate insulator and including a drain electrode opposing the source electrode, a insulating bank formed on the source electrode and the drain electrode, the insulating bank defining a second opening which exposes portions of the source electrode and the drain electrode, and an organic semiconductor formed in the second opening.

Abstract: A method for a thin film transistor array panel includes forming a gate line and a pixel electrode on a substrate, forming a gate insulating layer covering the gate line, forming a data line including a source electrode and a drain electrode on the gate insulating layer, forming an interlayer insulating layer covering the data line and the drain electrode on the gate insulating layer, forming a first opening in the interlayer insulating layer, forming an organic semiconductor in the first opening, forming a passivation layer on the organic semiconductor and the interlayer insulating layer, and forming a second opening in the interlayer insulating layer to expose the pixel electrode.

Abstract: An optimized Mobile Industry Processor Interface (MIPI) includes a transmitter physical (PHY) layer configured to convert input data into serial data and transmit the serial data in synchronization with a high-speed clock, a receiver PHY layer configured to convert the serial data into 8-bit parallel data in synchronization with the clock received from the transmitter, a bit merge block configured to merge the parallel data received from the receiver PHY layer so as to form 32-bit data using multiple lanes and to transmit the 32-bit data to a receiver protocol layer, the receiver protocol layer being configured to decode and recognize the data received from the bit merge block.

Abstract: A thin film transistor array panel according to an exemplary embodiment of the present invention includes: a gate electrode disposed on an insulation substrate; a gate insulating layer disposed on the gate electrode; a semiconductor disposed on the gate insulating layer; an etching stop layer disposed on the semiconductor; an insulating layer disposed on the gate insulating layer; and a source electrode and a drain electrode overlapping the semiconductor. The semiconductor and the gate insulating layer have a first portion on which the etching stop layer and the insulating layer are disposed, and a second portion on which etching stop layer and the insulating layer are not disposed.

Abstract: A touch substrate includes a base substrate, a common electrode and a wire electrode. The base substrate has a plurality of common electrode areas. A common electrode is disposed in each of the common electrode areas. The common electrode has a plurality of first electrode lines extended in a first direction and arranged in a second direction crossing the first direction and a plurality of second electrode lines arranged in the first direction. The wire electrode is connected to an end of the common electrode to apply a voltage to the common electrode. The common electrode and the wire electrode are simultaneously formed through a same process using a printing substrate.

Abstract: The present invention disclosed an organic thin film transistor, an organic thin film transistor array substrate and an organic thin film transistor display. The present invention disclosed organic materials which is proper for the application to a large screen display. The presentation also disclosed structures and a method for manufacturing such an organic thin film transistor, the organic thin film transistor array substrate and the organic thin film transistor display.