Patents by Inventor Bo-Yu Chen

Bo-Yu Chen has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20200382348
    Abstract: An equalizer circuit includes a first arithmetic circuit, a second arithmetic circuit, a data sampling circuit, and an edge sampling circuit. The first arithmetic circuit is configured to compensate an equalization sequence by secondary feedback sequences to output a first added sequence. The second arithmetic circuit is configured to compensate the first added sequence by a primary feedback sequence to output a second added sequence. The data sampling circuit samples, according to data clock, the second added sequence to output a primary sequence, and gains the primary sequence to output the primary feedback sequence. The data sampling circuit sequentially samples, according to the data clock, the primary sequence to output secondary sequences. The data sampling circuit gains the corresponding secondary sequences to output the secondary feedback sequences. The edge sampling circuit is configured to sequentially sample, according to an edge clock, the first added sequence to output an edge sequence.
    Type: Application
    Filed: December 13, 2019
    Publication date: December 3, 2020
    Applicant: REALTEK SEMICONDUCTOR CORP.
    Inventors: Yao-Chia Liu, Bo-Yu Chen
  • Patent number: 10826730
    Abstract: An equalizer circuit includes a first arithmetic circuit, a second arithmetic circuit, a data sampling circuit, and an edge sampling circuit. The first arithmetic circuit is configured to compensate an equalization sequence by secondary feedback sequences to output a first added sequence. The second arithmetic circuit is configured to compensate the first added sequence by a primary feedback sequence to output a second added sequence. The data sampling circuit samples, according to data clock, the second added sequence to output a primary sequence, and gains the primary sequence to output the primary feedback sequence. The data sampling circuit sequentially samples, according to the data clock, the primary sequence to output secondary sequences. The data sampling circuit gains the corresponding secondary sequences to output the secondary feedback sequences. The edge sampling circuit is configured to sequentially sample, according to an edge clock, the first added sequence to output an edge sequence.
    Type: Grant
    Filed: December 13, 2019
    Date of Patent: November 3, 2020
    Assignee: REALTEK SEMICONDUCTOR CORP.
    Inventors: Yao-Chia Liu, Bo-Yu Chen
  • Patent number: 10680606
    Abstract: A timing control device and a timing control method for a high frequency signal system, the timing control method respectively control trigger points of reset signals, and process the controlled reset signals and clock signals to obtain a signal group with having an absolute timing relationship.
    Type: Grant
    Filed: November 6, 2019
    Date of Patent: June 9, 2020
    Assignee: REALTEK SEMICONDUCTOR CORP.
    Inventors: Bo-Yu Chen, Yao-Chia Liu, An-Ming Lee
  • Patent number: 10630273
    Abstract: A clock circuit has a clock input terminal, a first clock output terminal, and a second clock output terminal. The clock circuit includes a pulse width adjustment module, a sampling module, a comparing module, and a differential signal converting module. A differential input terminal is electrically connected to a pulse width output terminal of the pulse width adjustment module. A positive differential signal output terminal and a negative differential signal output terminal are electrically connected to the first clock output terminal of the clock circuit and the second clock output terminal to output two clock signals with a phase difference of 180 degrees, respectively. A second input terminal of the sampling module is electrically connected to the second clock output terminal.
    Type: Grant
    Filed: April 24, 2019
    Date of Patent: April 21, 2020
    Assignee: REALTEK SEMICONDUCTOR CORP.
    Inventors: Ming-Hui Tung, Li-Jun Gu, Guan-Yu Chen, Bo-Yu Chen
  • Publication number: 20200052681
    Abstract: A clock circuit has a clock input terminal, a first clock output terminal, and a second clock output terminal. The clock circuit includes a pulse width adjustment module, a sampling module, a comparing module, and a differential signal converting module. A differential input terminal is electrically connected to a pulse width output terminal of the pulse width adjustment module. A positive differential signal output terminal and a negative differential signal output terminal are electrically connected to the first clock output terminal of the clock circuit and the second clock output terminal to output two clock signals with a phase difference of 180 degrees, respectively. A second input terminal of the sampling module is electrically connected to the second clock output terminal.
    Type: Application
    Filed: April 24, 2019
    Publication date: February 13, 2020
    Inventors: Ming-Hui Tung, LI-JUN GU, Guan-Yu Chen, Bo-Yu Chen
  • Patent number: 10103722
    Abstract: A differential switch circuit includes: a first transistor having a first terminal coupled with a first input terminal, a second terminal coupled with a first output terminal, and a control terminal coupled with a switch signal receiving terminal; a second transistor having a first terminal coupled with a second input terminal, a second terminal coupled with a second output terminal, and a control terminal coupled with the switch signal receiving terminal; a central switch element positioned between the control terminals of the first and second transistors; and a switch element control circuit for controlling the central switch element based on a switch signal. When the switch signal turns on the first and second transistors, the switch element control circuit turns off the central switch element, and when the switch signal turns off the first and second transistors, the switch element control circuit turns on the central switch element.
    Type: Grant
    Filed: June 6, 2017
    Date of Patent: October 16, 2018
    Assignee: REALTEK SEMICONDUCTOR CORP.
    Inventors: Bo-Yu Chen, Leaf Chen
  • Publication number: 20180006638
    Abstract: A differential switch circuit includes: a first transistor having a first terminal coupled with a first input terminal, a second terminal coupled with a first output terminal, and a control terminal coupled with a switch signal receiving terminal; a second transistor having a first terminal coupled with a second input terminal, a second terminal coupled with a second output terminal, and a control terminal coupled with the switch signal receiving terminal; a central switch element positioned between the control terminals of the first and second transistors; and a switch element control circuit for controlling the central switch element based on a switch signal. When the switch signal turns on the first and second transistors, the switch element control circuit turns off the central switch element, and when the switch signal turns off the first and second transistors, the switch element control circuit turns on the central switch element.
    Type: Application
    Filed: June 6, 2017
    Publication date: January 4, 2018
    Applicant: Realtek Semiconductor Corp.
    Inventors: Bo-Yu CHEN, Leaf CHEN
  • Patent number: 9733773
    Abstract: A touch panel is provided. The touch panel includes a cover plate and a display element under the cover plate. A touch sensing layer is disposed at an active area of the touch panel and between the cover plate and the display element. A decorative layer is disposed at a peripheral area of the touch panel and between the cover plate and the display element, wherein the active area is surrounded by the peripheral area. The touch panel further includes a dielectric layer disposed between the cover plate and the display element, wherein the difference in reflectivity between the active area and the peripheral area is 0 to 0.5.
    Type: Grant
    Filed: April 6, 2015
    Date of Patent: August 15, 2017
    Assignee: INNOLUX CORPORATION
    Inventors: Cho-Hao Yang, Bo-Yu Chen, Jian-Hua Luo, Jia-Hsin Li, I-An Yao
  • Patent number: 9444005
    Abstract: A light emitting diode structure is provided. The light emitting diode structure includes a substrate, a light emitting multi-layer structure, a first current blocking layer, a first current spreading layer, a second current blocking layer and a second current spreading layer. The light emitting multi-layer structure is formed on the substrate by way of stacking. The first current blocking layer is formed on part of the light emitting multi-layer structure. The first current spreading layer covers the first current blocking layer and the light emitting multi-layer structure. The second current blocking layer is formed on part of the first current spreading layer. An orthogonal projection of the second current blocking layer is disposed in an orthogonal projection of the first current blocking layer. The second current spreading layer covers the second current blocking layer and the first current spreading layer.
    Type: Grant
    Filed: August 3, 2015
    Date of Patent: September 13, 2016
    Assignee: LEXTAR ELECTRONICS CORPORATION
    Inventors: Bo-Yu Chen, Po-Hung Tsou, Tzu-Hung Chou
  • Publication number: 20150340556
    Abstract: A light emitting diode structure is provided. The light emitting diode structure comprises a substrate, a light emitting multi-layer structure, a first current blocking layer, a first current spreading layer, a second current blocking layer and a second current spreading layer. The light emitting multi-layer structure is formed on the substrate by way of stacking. The first current blocking layer is formed on part of the light emitting multi-layer structure. The first current spreading layer covers the first current blocking layer and the light emitting multi-layer structure. The second current blocking layer is formed on part of the first current spreading layer. An orthogonal projection of the second current blocking layer is disposed in an orthogonal projection of the first current blocking layer. The second current spreading layer covers the second current blocking layer and the first current spreading layer.
    Type: Application
    Filed: August 3, 2015
    Publication date: November 26, 2015
    Inventors: Bo-Yu Chen, Po-Hung Tsou, Tzu-Hung Chou
  • Publication number: 20150301652
    Abstract: A touch panel is provided. The touch panel includes a cover plate and a display element under the cover plate. A touch sensing layer is disposed at an active area of the touch panel and between the cover plate and the display element. A decorative layer is disposed at a peripheral area of the touch panel and between the cover plate and the display element, wherein the active area is surrounded by the peripheral area. The touch panel further includes a dielectric layer disposed between the cover plate and the display element, wherein the difference in reflectivity between the active area and the peripheral area is 0 to 0.5.
    Type: Application
    Filed: April 6, 2015
    Publication date: October 22, 2015
    Inventors: Cho-Hao YANG, Bo-Yu CHEN, Jian-Hua LUO, Jia-Hsin LI, I-An YAO
  • Patent number: 9117959
    Abstract: A light emitting diode structure is provided. The light emitting diode structure includes a substrate, a light emitting multi-layer structure, a first current blocking layer, a first current spreading layer, a second current blocking layer and a second current spreading layer. The light emitting multi-layer structure is formed on the substrate by way of stacking. The first current blocking layer is formed on part of the light emitting multi-layer structure. The first current spreading layer covers the first current blocking layer and the light emitting multi-layer structure. The second current blocking layer is formed on part of the first current spreading layer. An orthogonal projection of the second current blocking layer is disposed in an orthogonal projection of the first current blocking layer. The second current spreading layer covers the second current blocking layer and the first current spreading layer.
    Type: Grant
    Filed: March 28, 2014
    Date of Patent: August 25, 2015
    Assignee: LEXTAR ELECTRONICS CORPORATION
    Inventors: Bo-Yu Chen, Po-Hung Tsou, Tzu-Hung Chou
  • Publication number: 20150034982
    Abstract: A light emitting diode structure is provided. The light emitting diode structure comprises a substrate, a light emitting multi-layer structure, a first current blocking layer, a first current spreading layer, a second current blocking layer and a second current spreading layer. The light emitting multi-layer structure is formed on the substrate by way of stacking. The first current blocking layer is formed on part of the light emitting multi-layer structure. The first current spreading layer covers the first current blocking layer and the light emitting multi-layer structure. The second current blocking layer is formed on part of the first current spreading layer. An orthogonal projection of the second current blocking layer is disposed in an orthogonal projection of the first current blocking layer. The second current spreading layer covers the second current blocking layer and the first current spreading layer.
    Type: Application
    Filed: March 28, 2014
    Publication date: February 5, 2015
    Applicant: Lextar Electronics Corporation
    Inventors: Bo-Yu Chen, Po-Hung Tsou, Tzu-Hung Chou
  • Publication number: 20120131727
    Abstract: A piece of fabric is provided with a band; and a plurality of temporary fastening members disposed on the band. A skirt is formed by helically securing the temporary fastening members to the band so that the skirt can be put on the waist, the buttocks, and the legs of a person. The formed skirt can accommodate the changed shape of a woman, thereby minimizing the chance of discarding unfitted clothes.
    Type: Application
    Filed: November 27, 2011
    Publication date: May 31, 2012
    Inventor: Bo-Yu Chen