Patents by Inventor Bo yun KIM

Bo yun KIM has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 11951130
    Abstract: The present invention relates to an antigen-binding molecule comprising a heavy chain variable region comprising a heavy-chain complementarity-determining region 1 (HCDR1) comprising an amino acid sequence represented by Sequence No. 1, an HCDR2 comprising an amino acid sequence represented by Sequence No. 2, and an HCDR3 comprising an amino acid sequence represented by Sequence No. 3; a light-chain variable region comprising a light-chain complementarity-determining region 1 (LCDR1) comprising an amino acid sequence represented by Sequence No. 4, an LCDR2 comprising an amino acid sequence represented by Sequence No. 5, and an LCDR3 comprising an amino acid sequence represented by Sequence No. 6; wherein the antigen-binding molecule is a T cell receptor (TCR); and to a cell line expressing the same.
    Type: Grant
    Filed: March 1, 2021
    Date of Patent: April 9, 2024
    Assignee: Eutilex Co., Ltd.
    Inventors: Byoung S. Kwon, Young Ho Kim, Kwang Hee Kim, Ji Won Chung, Young Gyoon Chang, Bo Rim Yi, Jung Yun Lee, Seung Hyun Lee, Sun Woo Im, Jin Kyung Choi, Hyun Tae Son, Eun Hye Yoo
  • Publication number: 20240084493
    Abstract: A washing machine including a plurality of washers may include a fixing bracket coupled to a front of a first housing in which a first tub is disposed and a front of a second housing in which a second tub is disposed, to prevent the first housing and the second housing from being separated from each other.
    Type: Application
    Filed: November 22, 2023
    Publication date: March 14, 2024
    Applicant: Samsung Electronics Co., Ltd.
    Inventors: Baek Gyu KWON, Dong-Won KIM, Do Yun LEE, Bo-Kyun KIM, Geon Ho LEE
  • Patent number: 11778833
    Abstract: A nonvolatile memory device according to an embodiment of the present disclosure includes a substrate having a channel layer, a first tunneling layer disposed on the channel layer, a second tunneling layer disposed on the first tunneling layer, a third tunneling layer disposed on the second tunneling layer, a charge trap layer disposed on the third tunneling layer, a charge barrier layer disposed on the charge trap layer, and a gate electrode layer disposed on the charge barrier layer. The first tunneling layer includes a first insulative material. The second tunneling layer includes a second insulative material. The third tunneling layer includes a second insulative material. The resistance switching material is a material whose electric resistance varies reversibly between a high resistance state and a low resistance state depending on a magnitude of an applied electric field.
    Type: Grant
    Filed: November 22, 2021
    Date of Patent: October 3, 2023
    Assignee: SK hynix Inc.
    Inventor: Bo Yun Kim
  • Publication number: 20230301104
    Abstract: A three-dimeiisioiial semiconductor device including a memory block including a stack structure comprising a second sub stack formed over a first sub stack, a plurality of channel plugs formed through the stack structure, and a separation pattern formed in the memory block.
    Type: Application
    Filed: December 20, 2022
    Publication date: September 21, 2023
    Applicant: SK hynix Inc.
    Inventors: Seung Min LEE, Nam Kuk KIM, Bo Yun KIM, Jae Seok KIM
  • Patent number: 11764291
    Abstract: In a method of fabricating a nonvolatile memory device according an embodiment, a first tunnel oxide layer, a nitrogen supply layer, and a second tunnel oxide layer having a density lower than that of the first tunnel oxide layer are formed on a substrate. Nitrogen in the nitrogen supply layer is diffused into the second tunnel oxide layer to convert at least a portion of the second tunnel oxide layer into an oxynitride layer.
    Type: Grant
    Filed: August 1, 2022
    Date of Patent: September 19, 2023
    Assignee: SK hynix Inc.
    Inventors: Bo Yun Kim, Se Ho Lee
  • Publication number: 20230211456
    Abstract: A polishing pad for chemical mechanical polishing includes a polymer matrix and a temperature sensitive agent dispersed in the polymer matrix and constituting 1 to 40% by volume of the polishing pad, wherein the temperature sensitive agent includes a two-dimensional (2D) sheet material having a thermal conductivity of 1 W/(m·K) or more.
    Type: Application
    Filed: December 15, 2022
    Publication date: July 6, 2023
    Inventors: Yea Rin Byun, In Kwon Kim, Bo Yun Kim, Sang Kyun Kim, Bo Un Yoon, Hyo San Lee, Byung Keun Hwang
  • Publication number: 20220376092
    Abstract: In a method of fabricating a nonvolatile memory device according an embodiment, a first tunnel oxide layer, a nitrogen supply layer, and a second tunnel oxide layer having a density lower than that of the first tunnel oxide layer are formed on a substrate. Nitrogen in the nitrogen supply layer is diffused into the second tunnel oxide layer to convert at least a portion of the second tunnel oxide layer into an oxynitride layer.
    Type: Application
    Filed: August 1, 2022
    Publication date: November 24, 2022
    Inventors: Bo Yun KIM, Se Ho LEE
  • Patent number: 11437499
    Abstract: In a method of fabricating a nonvolatile memory device according an embodiment, a first tunnel oxide layer, a nitrogen supply layer, and a second tunnel oxide layer having a density lower than that of the first tunnel oxide layer are formed on a substrate. Nitrogen in the nitrogen supply layer is diffused into the second tunnel oxide layer to convert at least a portion of the second tunnel oxide layer into an oxynitride layer.
    Type: Grant
    Filed: December 3, 2019
    Date of Patent: September 6, 2022
    Assignee: SK hynix Inc.
    Inventors: Bo Yun Kim, Se Ho Lee
  • Patent number: 11279852
    Abstract: Described herein are chemical mechanical polishing (CMP) slurry compositions, such as CMP slurry compositions for polishing an indium tin oxide (ITO) layer, along with methods of fabricating a semiconductor device using such a CMP slurry composition. The CMP slurry composition can include a polishing particle, a dispersing agent, an auxiliary oxidizing agent, and a sugar alcohol compound.
    Type: Grant
    Filed: June 25, 2020
    Date of Patent: March 22, 2022
    Inventors: Eunsung Seo, Chang Gil Kwon, Sung Pyo Lee, Dongchan Kim, Bo Yun Kim, Jun Ha Hwang
  • Publication number: 20220085040
    Abstract: A nonvolatile memory device according to an embodiment of the present disclosure includes a substrate having a channel layer, a first tunneling layer disposed on the channel layer, a second tunneling layer disposed on the first tunneling layer, a third tunneling layer disposed on the second tunneling layer, a charge trap layer disposed on the third tunneling layer, a charge barrier layer disposed on the charge trap layer, and a gate electrode layer disposed on the charge barrier layer. The first tunneling layer includes a first insulative material. The second tunneling layer includes a second insulative material. The third tunneling layer includes a second insulative material. The resistance switching material is a material whose electric resistance varies reversibly between a high resistance state and a low resistance state depending on a magnitude of an applied electric field.
    Type: Application
    Filed: November 22, 2021
    Publication date: March 17, 2022
    Inventor: Bo Yun KIM
  • Patent number: 11251229
    Abstract: An image sensor includes a sensor region for receiving light and generating an image data and a pad region adjacent to the sensor region, an insulation layer on the substrate, and a lower transparent electrode on the insulation layer in the sensor region, and an etch stop layer on the insulation layer in the sensor region and pad region. The etch stop layer may include silicon nitride. A height of an uppermost surface of the lower transparent electrode may be substantially equal to a height of an upper surface of the etch stop layer, with respect to the substrate.
    Type: Grant
    Filed: July 13, 2020
    Date of Patent: February 15, 2022
    Assignee: Samsung Electronics Co., Ltd.
    Inventors: Dong Chan Kim, Kwan Sik Kim, Bo Yun Kim, Eun Sung Seo, Il Young Yoon, Seung Hoon Choi
  • Patent number: 11217598
    Abstract: A nonvolatile memory device according to an embodiment of the present disclosure includes a substrate having a channel layer, a first tunneling layer disposed on the channel layer, a second tunneling layer disposed on the first tunneling layer, a third tunneling layer disposed on the second tunneling layer, a charge trap layer disposed on the third tunneling layer, a charge barrier layer disposed on the charge trap layer, and a gate electrode layer disposed on the charge barrier layer. The first tunneling layer includes a first insulative material. The second tunneling layer includes a second insulative material. The third tunneling layer includes a second insulative material. The resistance switching material is a material whose electric resistance varies reversibly between a high resistance state and a low resistance state depending on a magnitude of an applied electric field.
    Type: Grant
    Filed: November 5, 2019
    Date of Patent: January 4, 2022
    Assignee: SK hynix Inc.
    Inventor: Bo Yun Kim
  • Patent number: 11094586
    Abstract: A semiconductor device and a method of fabricating a semiconductor device, the semiconductor device including a semiconductor substrate including a first region and a second region; an interlayer insulating layer on the semiconductor substrate, the interlayer insulating layer including a first opening on the first region and having a first width; and a second opening on the second region and having a second width, the second width being greater than the first width; at least one first metal pattern filling the first opening; a second metal pattern in the second opening; and a filling pattern on the second metal pattern in the second opening, wherein the at least one first metal pattern and the second metal pattern each include a same first metal material, and the filling pattern is formed of a non-metal material.
    Type: Grant
    Filed: August 13, 2019
    Date of Patent: August 17, 2021
    Assignee: SAMSUNG ELECTRONICS CO., LTD.
    Inventors: Seung Hoon Choi, Jaeung Koo, Kwansung Kim, Bo Yun Kim, Wandon Kim, Boun Yoon, Jeonghyuk Yim, Yeryung Jeon
  • Publication number: 20210130651
    Abstract: Described herein are chemical mechanical polishing (CMP) slurry compositions, such as CMP slurry compositions for polishing an indium tin oxide (ITO) layer, along with methods of fabricating a semiconductor device using such a CMP slurry composition. The CMP slurry composition can include a polishing particle, a dispersing agent, an auxiliary oxidizing agent, and a sugar alcohol compound.
    Type: Application
    Filed: June 25, 2020
    Publication date: May 6, 2021
    Applicants: Samsung Electronics Co., Ltd., KCTECH CO., LTD.
    Inventors: EUNSUNG SEO, CHANG GIL KWON, SUNG PYO LEE, DONGCHAN KIM, BO YUN KIM, JUN HA HWANG
  • Publication number: 20200373311
    Abstract: A nonvolatile memory device according to an embodiment of the present disclosure includes a substrate having a channel layer, a first tunneling layer disposed on the channel layer, a second tunneling layer disposed on the first tunneling layer, a third tunneling layer disposed on the second tunneling layer, a charge trap layer disposed on the third tunneling layer, a charge barrier layer disposed on the charge trap layer, and a gate electrode layer disposed on the charge barrier layer. The first tunneling layer includes a first insulative material. The second tunneling layer includes a second insulative material. The third tunneling layer includes a second insulative material. The resistance switching material is a material whose electric resistance varies reversibly between a high resistance state and a low resistance state depending on a magnitude of an applied electric field.
    Type: Application
    Filed: November 5, 2019
    Publication date: November 26, 2020
    Inventor: Bo Yun KIM
  • Publication number: 20200365663
    Abstract: An image sensor includes a sensor region for receiving light and generating an image data and a pad region adjacent to the sensor region, an insulation layer on the substrate, and a lower transparent electrode on the insulation layer in the sensor region, and an etch stop layer on the insulation layer in the sensor region and pad region. The etch stop layer may include silicon nitride. A height of an uppermost surface of the lower transparent electrode may be substantially equal to a height of an upper surface of the etch stop layer, with respect to the substrate.
    Type: Application
    Filed: July 13, 2020
    Publication date: November 19, 2020
    Applicant: Samsung Electronics Co., Ltd.
    Inventors: Dong Chan KIM, Kwan Sik KIM, Bo Yun KIM, Eun Sung SEO, Il Young YOON, Seung Hoon CHOI
  • Patent number: 10829690
    Abstract: Disclosed is a slurry composition for chemical mechanical polishing (CMP) includes, as polishing particles, a complex compound of both fullerenol and alkylammonium hydroxide. The slurry composition, which exhibits excellent polishing properties, may be prepared at low cost in large quantities. Also disclosed is a method of preparing the slurry composition comprising obtaining a mixture of a fullerenol complex compound and unreacted hydrogen peroxide by reacting alkylammonium hydroxide, hydrogen peroxide, and fullerene, removing the unreacted hydrogen peroxide by adding hydrogen peroxide decomposition catalyst particles to the mixture, separating the hydrogen peroxide decomposition catalyst particles from the mixture by filtration, and adding a polishing additive to the mixture.
    Type: Grant
    Filed: July 3, 2019
    Date of Patent: November 10, 2020
    Assignee: SAMSUNG ELECTRONICS CO., LTD.
    Inventors: Bo-yun Kim, Kenji Takai, Do-yoon Kim, Sang-kyun Kim, Bo-un Yoon
  • Patent number: 10748968
    Abstract: An image sensor includes a sensor region for receiving light and generating an image data and a pad region adjacent to the sensor region, an insulation layer on the substrate, and a lower transparent electrode on the insulation layer in the sensor region, and an etch stop layer on the insulation layer in the sensor region and pad region. The etch stop layer may include silicon nitride. A height of an uppermost surface of the lower transparent electrode may be substantially equal to a height of an upper surface of the etch stop layer, with respect to the substrate.
    Type: Grant
    Filed: February 26, 2019
    Date of Patent: August 18, 2020
    Assignee: Samsung Electronics Co., Ltd.
    Inventors: Dong Chan Kim, Kwan Sik Kim, Bo Yun Kim, Eun Sung Seo, Il Young Yoon, Seung Hoon Choi
  • Publication number: 20200243374
    Abstract: A semiconductor device and a method of fabricating a semiconductor device, the semiconductor device including a semiconductor substrate including a first region and a second region; an interlayer insulating layer on the semiconductor substrate, the interlayer insulating layer including a first opening on the first region and having a first width; and a second opening on the second region and having a second width, the second width being greater than the first width; at least one first metal pattern filling the first opening; a second metal pattern in the second opening; and a filling pattern on the second metal pattern in the second opening, wherein the at least one first metal pattern and the second metal pattern each include a same first metal material, and the filling pattern is formed of a non-metal material.
    Type: Application
    Filed: August 13, 2019
    Publication date: July 30, 2020
    Inventors: Seung Hoon CHOI, Jaeung KOO, Kwansung KIM, Bo Yun KIM, Wandon KIM, Boun YOON, Jeonghyuk YIM, Yeryung JEON
  • Publication number: 20200212206
    Abstract: In a method of fabricating a nonvolatile memory device according an embodiment, a first tunnel oxide layer, a nitrogen supply layer, and a second tunnel oxide layer having a density lower than that of the first tunnel oxide layer are formed on a substrate. Nitrogen in the nitrogen supply layer is diffused into the second tunnel oxide layer to convert at least a portion of the second tunnel oxide layer into an oxynitride layer.
    Type: Application
    Filed: December 3, 2019
    Publication date: July 2, 2020
    Inventors: Bo Yun KIM, Se Ho LEE