Abstract: Methods and systems for estimating a distance to an object are described. In an example, a device can receive a reflected signal of a modulated signal being used in a wireless transmission of data. The reflected signal can be a reflection of the modulated signal from at least one object. The device can estimate a distance to the at least one object based on the modulated signal and the reflected signal. Further, the device can use the estimated distance to image a scenery including the at least one object.

Abstract: Systems and methods for operating a beamforming circuit are described. A processor can activate a transmitting element among a plurality of transmitting elements of a beamforming circuit. The processor can activate a receiving element among a plurality of receiving elements of a beamforming circuit. The processor can receive a direct current (DC) signal that represents phase and amplitude of the activated transmitting element and the activated receiving element. The processor can adjust a setting of the beamforming circuit to receive additional DC signals that represent phases and amplitudes of the activated transmitting element and the activated receiving element under the adjusted setting. The processor can determine calibration values for the beamforming circuit based on the DC signal and the additional DC signals.

Abstract: A processor may calibrate a first actuator electrically coupled to a transconductance stage of the frequency conversion circuit. The transconductance stage may be configured to receive a differential signal input. Calibrating a first actuator may adjust a first basis vector associated with a differential direct current (DC) output of the transconductance stage. A processor may calibrate a second actuator electrically coupled to receive the differential current output of the transconductance stage and electrically coupled to a set of commutating devices of the frequency conversion circuit. The commutating devices may be configured to receive differential LO inputs. Calibrating a second actuator may adjust a second basis vector associated with a differential impedance of the set of commutating devices. A processor may offset responsive to adjusting the first basis vector and the second basis vector, the first leakage basis vector and second leakage basis vector of the LO leakage signal.

Abstract: An apparatus for calibrating a multi-antenna system includes an unmanned aerial vehicle (UAV). The UAV includes one or more millimeter-wave (mm-wave) single channel radios that can transmit and receive a mm-wave signal to or from a multi-antenna system under test; at least one directional antenna connected to the one or more radios; sensors that determine a position of the UAV; an omni-directional mobile or Wi-Fi transceiver that communicates with an operator; and a digital microprocessor unit connected to the one or more mm-wave single channel radios, the sensors, and the omni-directional mobile or Wi-Fi transceiver. The digital microprocessor unit can control motion of the UAV and analyze signals received from the one or more mm-wave single channel radios and the at least one directional antenna using position information received from the sensors.

Abstract: A circuit comprises a set of ports of a first type arranged symmetrically about an axis of symmetry of the circuit, and a digital reassigner configured to reassign an original port of the set of ports to a reassigned port of the set of ports located on an opposite side of the axis of symmetry.

Abstract: A multiply-accumulate device comprises a digital multiplication circuit and a mixed signal adder. The digital multiplication circuit is configured to input L m1-bit multipliers and L m2-bit multiplicands and configured to generate N one-bit multiplication outputs, each one-bit multiplication output corresponding to a result of a multiplication of one bit of one of the L m1-bit multipliers and one bit of one of the L m2-bit multiplicands. The mixed signal adder comprises one or more stages, at least one stage configured to input the N one-bit multiplication outputs, each stage comprising one or more inner product summation circuits; and a digital reduction stage coupled to an output of a last stage of the one or more stages and configured to generate an output of the multiply-accumulate device based on the L m1-bit multipliers and the L m2-bit multiplicands.

Abstract: A phased array antenna includes an antenna array substrate having a plurality of antenna elements. At least two beamformers are coupled to the plurality of antenna elements. At least two filters support different frequency bands and are respectively coupled to the at least two beamformers. A frequency converter is coupled to the at least two filters, the frequency converter including one intermediate frequency (IF) port and at least two radio frequency (RF) ports. The one IF port of the frequency converter is configured to support the at least two beamformers via the at least two RF ports. A first beamformer of the at least two beamformers is coupled to a first filter of the at least two filters to form a first beam in a direction different than a second beamformer of the first two beamformers coupled to a second filter of the at least two filters.

Abstract: A phased array antenna (1) includes: a plurality of antenna elements (11a to 11d); a plurality of signal paths (R11 and R12) that are connected to each of the antenna elements; a storage unit (M) configured to store a set values of at least one of amplitudes or phases of a signal passed through at least one predefined reference path among the plurality of signal paths with regard to at least one of the antenna elements, and an amplitude and phase control unit (22 or 26) configured to control at least one of the amplitude or the phase of the signal passed through the reference path connected to the antenna element by using the set value stored in the storage unit, and configured to control amplitude or phase of signal passed through the signal path other than the reference path.

Abstract: A method for securely broadcasting information to a group of undisclosed recipients. The information in an information system is encoded by applying a hash function to a group of messages to form the information stream, wherein portions of the information in the information stream are intended for respective ones of the group of undisclosed recipients. The information is encoded such that that only an intended recipient can decode a portion of the information intended for the intended recipient. The information stream is broadcasted to the group of undisclosed recipients.

Abstract: Systems and methods for operating a phased array are described. In an example, a system may convert a desired beam direction of a desired beam into at least one phase slope parameter. The phased array may include a plurality of antennas connected to a plurality of front-end circuits of a beam forming circuit, and each antenna may be connected to a respective front-end circuit. For each antenna among the plurality of antennas, the system may determine a phase shift parameter of the antenna based on the at least one phase slope parameter and a physical location of the antenna. For each antenna among the plurality of antennas, the system may map the determined phase shift parameter of the antenna to control settings for a front-end circuit connected to the antenna.

Abstract: A phased array antenna includes an antenna array substrate having a plurality of antenna elements. At least two beamformers are coupled to the plurality of antenna elements. At least two filters support different frequency bands and are respectively coupled to the at least two beamformers. A frequency converter is coupled to the at least two filters, the frequency converter including one intermediate frequency (IF) port and at least two radio frequency (RF) ports. The one IF port of the frequency converter is configured to support the at least two beamformers via the at least two RF ports. A first beamformer of the at least two beamformers is coupled to a first filter of the at least two filters to form a first beam in a direction different than a second beamformer of the first two beamformers coupled to a second filter of the at least two filters.

Abstract: A TX/RX switch includes a power amplifier (PA), a Low Noise Amplifier (LNA), and an antenna connection. The PA is connected to a PA matching network that has a PA network impedance and a common PA-LNA impedance connected in one or more series-parallel combinations in different embodiments in a transmitting mode. The LNA is connected to a LNA matching network that has a LNA. network impedance and the same common PA-LNA impedance connected in one or more series-parallel combinations in a receive mode. A mode switch can connect the common PA-LNA impedance in different configurations to enable the transmitting and receiving mode respectively. In some embodiments, the mode switch can short or open circuit the connection of the PA matching circuit or the LNA matching circuit to the antenna. In some embodiments, the mode switch can also turn power on or off to the PA or the LNA when the switch is in a mode where the respective amplifier is not selected.

Abstract: A TX/RX switch includes a power amplifier (PA), a Low Noise Amplifier (LNA), and an antenna connection. The PA is connected to a PA matching network that has a PA network impedance and a common PA-LNA impedance connected in one or more series-parallel combinations in different embodiments in a transmitting mode. The LNA is connected to a LNA matching network that has a LNA network impedance and the same common PA-LNA impedance connected in one or more series-parallel combinations in a receive mode. A mode switch can connect the common PA-LNA impedance in different configurations to enable the transmitting and receiving mode respectively. In some embodiments, the mode switch can short or open circuit the connection of the PA matching circuit or the LNA matching circuit to the antenna. In some embodiments, the mode switch can also turn power on or off to the PA or the LNA when the switch is in a mode where the respective amplifier is not selected.

Abstract: Systems and methods for identifying a device are described. In an example, a processor can receive a first signal having a first waveform encoding data. The processor can extract the data from the first signal. The processor can determine a transformation being used to encode the data in the first waveform. The processor can generate a second signal using the determined transformation to encode the data in a second waveform. The processor can determine a difference between the first waveform and the second waveform. The processor can identify a device as a candidate device that sent the first signal, based on the determined difference.

Abstract: Generating an environment information map from a wireless communication system having directional communication capabilities. A plurality of features are extracted and logged resultant from a communication link attempt at multiple beam directions and training at least one machine learning model based on the plurality of extracted features from the first beam direction and the at least one additional beam directions to infer an environment information map of the area between the first transmitter and the receiver.

Abstract: Methods and system for shaping radiation patterns are described. Given a plurality of radiation patterns corresponding to spatial combinations of a plurality of signals, a system can perform beam switching between the given plurality of radiation patterns within a configured time. The beam switching within the configured time can create a beam having a new radiation pattern within the signal modulation bandwidth.

Abstract: A processor may calibrate a first actuator electrically coupled to a transconductance stage of the frequency conversion circuit. The transconductance stage may be configured to receive a differential signal input. Calibrating a first actuator may adjust a first basis vector associated with a differential direct current (DC) output of the transconductance stage. A processor may calibrate a second actuator electrically coupled to receive the differential current output of the transconductance stage and electrically coupled to a set of commutating devices of the frequency conversion circuit. The commutating devices may be configured to receive differential LO inputs. Calibrating a second actuator may adjust a second basis vector associated with a differential impedance of the set of commutating devices. A processor may offset responsive to adjusting the first basis vector and the second basis vector, the first leakage basis vector and second leakage basis vector of the LO leakage signal.

Abstract: Methods and systems for reducing phase noise in a voltage controlled oscillator (VCO) are described. In an example, a first transistor, a second transistor, a third transistor, and a fourth transistor, can be provided. A transformer can be used to decouple drain terminals and gate terminals of the first, second, third, and fourth transistors. An oscillation amplitude of the VCO can be increased by providing a first bias voltage to the transformer to adjust gate bias voltages of the first and second transistors. The oscillation amplitude of the VCO can also be increased by providing a second bias voltage to the transformer to adjust gate bias voltages of the third and the fourth transistors.

Abstract: A phased array system includes tunable delay elements having active delay element(s) and passive delay element(s). A second resolution by the passive delay element is smaller than a first resolution by the active delay element, and the resolution corresponds to delay applied to an input signal and has discrete steps for phase over which the delay element can be operated. For multiple sets of tunable delay elements, a calibration process sets, for one set of the delay elements, all but an n-th active delay element and the passive delay element to a first phase, and the n-th active delay element to a second phase. In a second set of the delay elements, all of the active delay elements are set to the first phase and the passive delay element is set to the second phase. A phase difference is detected and adjusted to meet a criterion between the two sets.

Abstract: A multiply-accumulate device comprises a digital multiplication circuit and a mixed signal adder. The digital multiplication circuit is configured to input L m1-bit multipliers and L m2-bit multiplicands and configured to generate N one-bit multiplication outputs, each one-bit multiplication output corresponding to a result of a multiplication of one bit of one of the L m1-bit multipliers and one bit of one of the L m2-bit multiplicands. The mixed signal adder comprises one or more stages, at least one stage configured to input the N one-bit multiplication outputs, each stage comprising one or more inner product summation circuits; and a digital reduction stage coupled to an output of a last stage of the one or more stages and configured to generate an output of the multiply-accumulate device based on the L m1-bit multipliers and the L m2-bit multiplicands.