Patents by Inventor BODHISATWA SADHU

BODHISATWA SADHU has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 10484106
    Abstract: An array of antenna elements are located in relation with a plurality of pre-characterized reference detectors. At baseband frequencies, a transmit radiation pattern of the array of antenna elements is sensed with the plurality of pre-characterized reference detectors, at a plurality of phase and gain settings, to detect mismatch among two or more elements of the array of antenna elements. Phase and gain settings for the array of antenna elements are updated to correct the mismatch.
    Type: Grant
    Filed: May 5, 2016
    Date of Patent: November 19, 2019
    Assignee: International Business Machines Corporation
    Inventors: Alberto Valdes Garcia, Bodhisatwa Sadhu, Yahya Mesgarpour Tousi
  • Patent number: 10425143
    Abstract: A method and system of a configurable phased array transceiver are provided. A first beamforming unit is configured to provide a first beam. A second beamforming unit is configured to provide a second beam. A first bi-directional power controller is configured to combine or to split the first beam and the second beam. Each beamforming unit comprises a plurality of radio frequency (RF) front-ends, each front-end being configured to transmit and receive RF signals. Each beam is independently configurable to operate in a transmit (TX) or a receive (RX) mode.
    Type: Grant
    Filed: May 16, 2017
    Date of Patent: September 24, 2019
    Assignee: INTERNATIONAL BUSINESS MACHINES CORPORATION
    Inventors: Daniel J. Friedman, Joakim Hallin, Yahya Mesgarpour Tousi, Örjan Renström, Leonard Rexberg, Scott K. Reynolds, Bodhisatwa Sadhu, Stefan Sahl, Jan-Erik Thillberg, Alberto Valdes Garcia
  • Patent number: 10381730
    Abstract: A millimeter-wave (MMW) communication system may include an antenna array structure operating within a MMW band, having both a first antenna coupling point and a second antenna coupling point, whereby the first and the second location of the antenna coupling points are within a coplanar surface on which the antenna array structure is formed. The system may further include a first MMW transmitter that couples a first data modulated MMW signal to the first antenna coupling point and a second MMW transmitter that couples a second data modulated MMW signal to the second antenna coupling point. Coupling the first data modulated MMW signal to the first antenna coupling point generates a first MMW radio signal transmitted at a first propagation direction and coupling the second data modulated MMW signal to the second antenna coupling point generates a second MMW radio signal transmitted at a second propagation direction.
    Type: Grant
    Filed: November 17, 2017
    Date of Patent: August 13, 2019
    Assignee: INTERNATIONAL BUSINESS MACHINES CORPORATION
    Inventors: Xiaoxiong Gu, Duixian Liu, Bodhisatwa Sadhu, Alberto Valdes Garcia
  • Patent number: 10367513
    Abstract: A phase-locked loop circuit includes an oscillator, a frequency control device, the frequency control device generating a frequency control signal that controls a frequency of the oscillator, and a bias optimizer that monitors the frequency control device and generates a bias voltage for the oscillator, the oscillator includes a transfer function from bias voltage to frequency that is proportional to a transfer function from a low frequency noise component to frequency, the transfer function from bias voltage to frequency having a convex shape with a local minimum at which a sensitivity of the frequency to changes in the bias voltage is zero, and the bias voltage from the bias optimizer is set to the local minimum.
    Type: Grant
    Filed: November 30, 2017
    Date of Patent: July 30, 2019
    Assignee: International Business Machines Corporation
    Inventors: Mark A. Ferriss, Daniel J. Friedman, Bodhisatwa Sadhu, Wooram Lee
  • Publication number: 20190214955
    Abstract: Methods and systems for phased array tapering include setting a gain at a phase-invariant variable gain amplifier in each of a set of front-ends of a phased array transceiver, to perform tapering of beam pattern side lobes. Setting the gain includes setting a first gain at a first stage of the phase-invariant variable gain amplifier and setting a second gain at a second stage of the phase-invariant variable gain amplifier. A dependency of a phase shift of the first stage on the gain of the first stage is equal to and opposite a dependency of a phase shift of the second stage on the gain of the second stage.
    Type: Application
    Filed: March 15, 2019
    Publication date: July 11, 2019
    Inventors: John F. Bulzacchelli, Bodhisatwa Sadhu, Alberto Valdes Garcia
  • Patent number: 10326432
    Abstract: A method and system of providing harmonic frequency multiplication are provided. An input signal having a frequency f, is received by a programmable timing circuit. A signal that is in phase with the input signal, is provided at the first output of the programmable timing circuit. A time delayed version of the input signal, having the frequency f, is provided at the second output of the programmable timing circuit. A signal having the frequency f, is provided at the output of a first buffer. A duty cycled controlled signal having the frequency f, is provided at the output of the second buffer. A frequency nf, where n is a positive integer, is provided at the output of the multiplier. A higher-order frequency multiplied signal based on the frequencies f and nf, is provided at the output of a mixer.
    Type: Grant
    Filed: November 22, 2017
    Date of Patent: June 18, 2019
    Assignee: INTERNATIONAL BUSINESS MACHINES CORPORATION
    Inventors: Wooram Lee, Bodhisatwa Sadhu, Alberto Valdes Garcia
  • Publication number: 20190165796
    Abstract: A phase-locked loop circuit includes an oscillator, a frequency control device, the frequency control device generating a frequency control signal that controls a frequency of the oscillator, and a bias optimizer that monitors the frequency control device and generates a bias voltage for the oscillator, the oscillator includes a transfer function from bias voltage to frequency that is proportional to a transfer function from a low frequency noise component to frequency, the transfer function from bias voltage to frequency having a convex shape with a local minimum at which a sensitivity of the frequency to changes in the bias voltage is zero, and the bias voltage from the bias optimizer is set to the local minimum.
    Type: Application
    Filed: November 30, 2017
    Publication date: May 30, 2019
    Inventors: Mark A. Ferriss, Daniel J. Friedman, Bodhisatwa Sadhu, Wooram Lee
  • Publication number: 20190158068
    Abstract: An apparatus includes first and second electronically tunable transmission lines configured to transmit or receive a signal pair and provide a selected phase delay difference to the signal pair corresponding to a selected polarization, a first attenuation element connected to the first electronically tunable transmission line and a second attenuation element connected to the second electronically tunable transmission line. The first and second attenuation elements may each be configured to selectively attenuate signals carried on the electronically tunable transmission line to which they are connected according to a selected attenuation setting of a plurality of selectable attenuation settings provided by one or more attenuation control signals and thereby provide a selected attenuation to the signal pair that corresponds to the selected polarization. A corresponding method is also disclosed herein.
    Type: Application
    Filed: November 22, 2017
    Publication date: May 23, 2019
    Inventors: Alberto Valdes Garcia, Wayne H. Woods, JR., Bodhisatwa Sadhu
  • Publication number: 20190158075
    Abstract: A method and system of providing harmonic frequency multiplication are provided. An input signal having a frequency f, is received by a programmable timing circuit. A signal that is in phase with the input signal, is provided at the first output of the programmable timing circuit. A time delayed version of the input signal, having the frequency f, is provided at the second output of the programmable timing circuit. A signal having the frequency f, is provided at the output of a first buffer. A duty cycled controlled signal having the frequency f, is provided at the output of the second buffer. A frequency nf, where n is a positive integer, is provided at the output of the multiplier. A higher-order frequency multiplied signal based on the frequencies f and nf, is provided at the output of a mixer.
    Type: Application
    Filed: November 22, 2017
    Publication date: May 23, 2019
    Inventors: Wooram Lee, Bodhisatwa Sadhu, Alberto Valdes Garcia
  • Publication number: 20190157754
    Abstract: An apparatus includes first and second electronically tunable transmission lines configured to receive a signal pair and provide a selected phase delay difference to the signal pair, a first shunting element connected to the first electronically tunable transmission line and a second shunting element connected to the second electronically tunable transmission line. The first and second shunting elements may each be configured to selectively shunt the electronically tunable transmission line to which they are connected according to one or more shunting control signals. A corresponding method is also disclosed herein.
    Type: Application
    Filed: November 22, 2017
    Publication date: May 23, 2019
    Inventors: Alberto Valdes Garcia, Wayne H. Woods, JR., Bodhisatwa Sadhu
  • Patent number: 10298190
    Abstract: A method for phased array tapering includes setting a gain at a phase-invariant variable gain amplifier in each of a plurality of front-ends of a phased array transceiver to perform tapering of beam pattern side lobes. A resistance in the phase-invariant variable gain amplifier is set to provide a phase shift that is independent of gain.
    Type: Grant
    Filed: September 28, 2016
    Date of Patent: May 21, 2019
    Assignee: INTERNATIONAL BUSINESS MACHINES CORPORATION
    Inventors: John F. Bulzacchelli, Bodhisatwa Sadhu, Alberto Valdes Garcia
  • Patent number: 10284402
    Abstract: An apparatus for decoding a data modulated signal includes a signal receiver that receives a data modulated signal that is encoded with phase-shift keying (PSK) and provides an amplified signal corresponding to the data modulated signal, a tunable phase shifter that receives a local reference signal and a selected phase shift, applies the selected phase shift to the local reference signal to produce a phase shifted reference signal, a summing unit that sums the amplified signal and the phase shifted reference signal to produce a summed signal, an amplitude detector that determines an amplitude of the summed signal, and a symbol detector that varies the selected phase shift and determines a current symbol within the data modulated signal based on the amplitude of the summed signal as the selected phase shift is varied. A corresponding method is also disclosed herein.
    Type: Grant
    Filed: June 4, 2018
    Date of Patent: May 7, 2019
    Assignee: International Business Machines Corporation
    Inventors: Alberto Valdes Garcia, Wayne H. Woods, Jr., Bodhisatwa Sadhu
  • Publication number: 20190132132
    Abstract: A method for securely broadcasting information to a group of undisclosed recipients. The information in an information system is encoded by applying a hash function to a group of messages to form the information stream, wherein portions of the information in the information stream are intended for respective ones of the group of undisclosed recipients. The information is encoded such that that only an intended recipient can decode a portion of the information intended for the intended recipient. The information stream is broadcasted to the group of undisclosed recipients.
    Type: Application
    Filed: October 26, 2017
    Publication date: May 2, 2019
    Inventors: Nicholas S. Kersting, Bodhisatwa Sadhu
  • Patent number: 10236825
    Abstract: A switched capacitor is provided. The switched capacitor includes a pair of parallel component stacks. Each stack is connected to a common top node and a common bottom node. Each stack includes a BJT. Each stack further includes a first resistor in series with the BJT and having a first side connected to a collector of the BJT at an intermediate node in a same one of the stacks and a second side connected to the common top node. Each stack also includes a capacitor having a first side connected to the intermediate node and a second side for providing an impedance. Each stack additionally includes a second resistor having a first side connected to a base of the BJT to prevent base-current surge in the BJT and a second side connected to a switch base control signal that selectively turns the BJT on or off.
    Type: Grant
    Filed: October 3, 2017
    Date of Patent: March 19, 2019
    Assignee: International Business Machines Corporation
    Inventors: Alberto Valdes Garcia, Bodhisatwa Sadhu, Jahnavi Sharma
  • Patent number: 10224872
    Abstract: A voltage controlled oscillator (VCO), a method of designing a voltage controlled oscillator, and a design structure comprising a semiconductor substrate including a voltage controlled oscillator are disclosed. In one embodiment, the VCO comprises an LC tank circuit for generating an oscillator output at an oscillator frequency, and an oscillator core including cross-coupled semiconductor devices to provide feedback to the tank circuit. The VCO further comprises a supply node, a tail node, and a noise by-pass circuit connected to the supply and tail nodes, in parallel with the tank circuit and the oscillator core. The by-pass circuit forms a low-impedance path at a frequency approximately twice the oscillator frequency to at least partially immunize the oscillator core from external noise and to reduce noise contribution from the cross-coupled semiconductor devices.
    Type: Grant
    Filed: April 7, 2016
    Date of Patent: March 5, 2019
    Assignee: International Business Machines Corporation
    Inventors: Alberto Valdes-Garcia, Bodhisatwa Sadhu
  • Patent number: 10211779
    Abstract: A voltage controlled oscillator comprises a negative resistance, a first inductor, a fixed capacitor, and a frequency control component. The frequency control component comprises at least one varactor and at least a second inductor connected in series with the at least one varactor. A magnitude of an inductance of the second inductor is selected such that the frequency control component has an effective capacitance range larger than a capacitance range of the at least one varactor.
    Type: Grant
    Filed: May 11, 2016
    Date of Patent: February 19, 2019
    Assignee: International Business Machines Corporation
    Inventors: Mark A. Ferriss, Daniel J. Friedman, Bodhisatwa Sadhu, Alberto Valdes-Garcia
  • Publication number: 20190052493
    Abstract: An apparatus for decoding a data modulated signal includes a signal receiver that receives a data modulated signal that is encoded with phase-shift keying (PSK) and provides an amplified signal corresponding to the data modulated signal, a tunable phase shifter that receives a local reference signal and a selected phase shift, applies the selected phase shift to the local reference signal to produce a phase shifted reference signal, a summing unit that sums the amplified signal and the phase shifted reference signal to produce a summed signal, an amplitude detector that determines an amplitude of the summed signal, and a symbol detector that varies the selected phase shift and determines a current symbol within the data modulated signal based on the amplitude of the summed signal as the selected phase shift is varied. A corresponding method is also disclosed herein.
    Type: Application
    Filed: June 4, 2018
    Publication date: February 14, 2019
    Inventors: Alberto Valdes Garcia, Wayne H. Woods, JR., Bodhisatwa Sadhu
  • Publication number: 20190044551
    Abstract: Techniques that facilitate reconfigurable transmission of a radar frequency signal are provided. In one example, a system includes a signal generator and a power modulator. The signal generator provides a radar waveform signal from a set of radar waveform signals. The power modulator divides a local oscillator signal associated with a first frequency and a first amplitude into a first local oscillator signal and a second local oscillator signal. The power modulator also generates a radio frequency signal associated with a second frequency and a second amplitude based on the radar waveform signal, the first local oscillator signal and the second local oscillator signal.
    Type: Application
    Filed: December 14, 2017
    Publication date: February 7, 2019
    Inventors: Tolga Dinc, Mark A. Ferriss, Daniel Joseph Friedman, Wooram Lee, Bodhisatwa Sadhu, Alberto Valdes Garcia
  • Publication number: 20190044550
    Abstract: Techniques that facilitate reconfigurable transmission of a radar frequency signal are provided. In one example, a system includes a signal generator and a power modulator. The signal generator provides a radar waveform signal from a set of radar waveform signals. The power modulator divides a local oscillator signal associated with a first frequency and a first amplitude into a first local oscillator signal and a second local oscillator signal. The power modulator also generates a radio frequency signal associated with a second frequency and a second amplitude based on the radar waveform signal, the first local oscillator signal and the second local oscillator signal.
    Type: Application
    Filed: August 3, 2017
    Publication date: February 7, 2019
    Inventors: Tolga Dinc, Mark A. Ferriss, Daniel Joseph Friedman, Wooram Lee, Bodhisatwa Sadhu, Alberto Valdes Garcia
  • Publication number: 20190036485
    Abstract: An oscillator includes a first output node and a second output node. There is a tank circuit coupled between the first output node and the second output node. There is a first transistor having a first node, a second node coupled to a current source, and a control node coupled to the second output node. There is a second transistor having a first node, a second node coupled to the current source, and a control node coupled to the first output node. There is a first inductor coupled in series between the first node of the first transistor and the first output node. There is a second inductor coupled in series between the first node of the second transistor and the second output node.
    Type: Application
    Filed: September 22, 2018
    Publication date: January 31, 2019
    Inventors: Tejasvi Anand, Mark A. Ferriss, Bodhisatwa Sadhu, Alberto Valdes Garcia