Abstract: In a method of estimating a leakage current in semiconductor device, a chip including a plurality of cells is divided into segments by a grid model. Spatial correlation is determined as spatial correlation between process parameters concerned with the leakage currents in each of the cells. A virtual cell leakage characteristic function of the cell is generated by arithmetically operating actual leakage characteristic functions. A segment leakage characteristic function is generated by arithmetically operating the virtual cell leakage characteristic functions of each cell in the segment. Then, a full chip leakage characteristic function is generated by statistically operating the segment leakage characteristic functions of each segment in the chip. Accordingly, the computational loads of Wilkinson's method for generating the full chip leakage characteristic function may be remarkably reduced.

Abstract: A circuit having an active clock shielding structure includes a logic circuit that receives a clock signal and performs a logic operation based on the clock signal, a power gating circuit that switches a mode of the logic circuit between an active mode and an sleep mode based on a power gating signal, a clock signal transmission line that transmits the clock signal to the logic circuit, and at least one power gating signal transmission line that transmits the power gating signal to the power gating circuit and functions as a shielding line pair with the clock signal transmission line.

Abstract: A semiconductor integrated circuit device includes a semiconductor substrate; a dummy pattern extending in one direction on the semiconductor substrate; a junction region electrically connecting the dummy pattern to the semiconductor substrate; and a voltage applying unit that is configured to apply a bias voltage to the dummy pattern.

Abstract: A multi-threshold voltage complementary metal oxide semiconductor (MTCMOS) flip-flop, a circuit including the MTCMOS flip-flop, and a method of forming the MTCMOS flip-flop are disclosed. The MTCMOS flip-flop breaks a leakage current path during a sleep mode to retain an output data signal. The MTCMOS flip-flop typically further uses a data feedback unit to retain the output data signal.

Abstract: A plasma display panel and a driving method thereof that is capable of generating a sinusoidal initialization waveform. In the panel, a sinusoidal wave is used for forming wall charges.

Abstract: A plasma display panel and a driving method thereof that is capable of generating a sinusoidal initialization waveform. In the panel, a sinusoidal wave is used for forming wall charges.

Abstract: A multi-threshold voltage complementary metal oxide semiconductor (MTCMOS) flip-flop, a circuit including the MTCMOS flip-flop, and a method of forming the MTCMOS flip-flop are disclosed. The MTCMOS flip-flop breaks a leakage current path during a sleep mode to retain an output data signal. The MTCMOS flip-flop typically further uses a data feedback unit to retain the output data signal.

Abstract: A plasma display panel and a driving method thereof that is capable of generating a sinusoidal initialization waveform. In the panel, a sinusoidal wave is used for forming wall charges.