Abstract: A semiconductor apparatus includes a floating-bridge interconnect that couples two semiconductive devices that are arranged across a middle semiconductive device. The floating-bridge interconnect can be semiconductive material such as a silicon bridge, or it can be an organic bridge. Computing functions required in one of the two semiconductive devices can be off-loaded to any of the floating-bridge interconnect or the other of the two semiconductive devices.

Abstract: Embodiments include semiconductor packages and method of forming the semiconductor packages. A semiconductor package includes a package substrate on a substrate, a die on the package substrate, and a conductive stiffener over the package substrate and the substrate. The conductive stiffener surrounds the package substrate, where the conductive stiffener has a top portion and a plurality of sidewalls, and where the top portion is directly disposed on the package substrate, and the sidewalls are vertically disposed on the substrate. The semiconductor package also includes the substrate that has a plurality of conductive pads, where the conductive pads are conductively coupled to a ground source. The conductive stiffener may conductively couple the package substrate to the conductive pads of the substrate. The top portion may have a cavity that surrounds the die, where the top portion is directly disposed on a plurality of outer edges of the package substrate.

Abstract: Embodiments disclose electronic packages with a die assembly and methods of forming such electronic packages. In an embodiment, a die assembly comprises a first die and a second die laterally adjacent to the first die. In an embodiment, the first die and the second die each comprise a first semiconductor layer, an insulator layer over the first semiconductor layer, and a second semiconductor layer over the insulator layer. In an embodiment, a cavity is disposed through the second semiconductor layer. In an embodiment, the die assembly further comprises a bridge substrate that electrically couples the first die to the second die, where the bridge is positioned in the cavity of the first die and the cavity of the second die.

Abstract: A semiconductor apparatus includes a floating-bridge interconnect that couples two semiconductive devices that are arranged across a middle semiconductive device. The floating-bridge interconnect can be semiconductive material such as a silicon bridge, or it can be an organic bridge. Computing functions required in one of the two semiconductive devices can be off-loaded to any of the floating-bridge interconnect or the other of the two semiconductive devices.

Abstract: A system-in-package includes a package substrate that at least partially surrounds an embedded radio-frequency integrated circuit chip and a processor chip mated to a redistribution layer. A wide-band phased-array antenna module is mated to the package substrate with direct interconnects from the radio-frequency integrated circuit chip to antenna patches within the antenna module. Additionally, fan-out antenna pads are also coupled to the radio-frequency integrated circuit chip.

Abstract: A system-in-package includes a package substrate that at least partially surrounds an embedded radio-frequency integrated circuit chip and a processor chip mated to a redistribution layer. A wide-band phased-array antenna module is mated to the package substrate with direct interconnects from the radio-frequency integrated circuit chip to antenna patches within the antenna module. Additionally, fan-out antenna pads are also coupled to the radio-frequency integrated circuit chip.

Abstract: Embodiments herein disclose techniques for apparatuses and methods for making a slot antenna on a PCB with a cutout. A PCB may include a metal layer. The metal layer may include a cavity to be a first radiating element of an antenna, and a slot to be a second radiating element of the antenna. In addition, the cavity may extend to be the cutout of the PCB through other layers of the PCB. The first and second radiating elements may provide a determined transmission frequency for the antenna. The metal layer may further include a portion of a transmission line of the antenna, and the transmission line is in contact with the cavity and the slot. A package may be affixed to the PCB, where a portion of the package may be within the cutout of the PCB. Other embodiments may be described and/or claimed.

Abstract: A semiconductor apparatus includes a floating-bridge interconnect that couples two semiconductive devices that are arranged across a middle semiconductive device. The floating-bridge interconnect can be semiconductive material such as a silicon bridge, or it can be an organic bridge. Computing functions required in one of the two semiconductive devices can be off-loaded to any of the floating-bridge interconnect or the other of the two semiconductive devices.

Abstract: Described is an apparatus which comprises: a pre-driver coupled to a transmitter, the transmitter having a differential output; and a tuning circuit operable to couple to the differential output to tune the pre-driver of the transmitter according to a common mode noise signature of a common mode signal derived from the differential output.

Abstract: A folded circuit board includes a first circuit board and a second circuit board. The first circuit board and second circuit board are coupled together through a flexible interconnect. One or more folding guides are coupled to one of the first circuit board or second circuit board. The one or more folding guides extend beyond a first edge of the one of the first circuit board or second circuit board. The one or more folding guides include a curved sidewall configured to guide the flexible interconnect when the first circuit board is folded over the second circuit board. In one embodiment, the one or more folding guides are grounded to reduce EMI emissions.

Abstract: Described herein are microelectronics packages and methods for manufacturing the same. The microelectronics package may include a transmitter, a receiver, and a package stiffening element. The package stiffening element may be in electrical communication with the transmitter and the receiver. The package stiffening element may be configured to act as an antenna for both the transmitter and the receiver.

Abstract: A flexible integrated circuit that includes a first dielectric layer having a first section at one polarity and a second section at an opposing polarity, wherein the first section and the second section are separated by dielectric material within first dielectric layer; a second dielectric layer having a first side wall that is electrically connected to the first section and a second side wall that is electrically connected to the second section; and a third dielectric layer having a base that is electrically connected to the first side wall and the second side wall, wherein the second dielectric layer is between the first dielectric layer and the third dielectric layer, wherein the base, the first and second side walls and the first and second sections form an antenna that is configured to send or receive wireless signals.

Abstract: A system-in-package includes a package substrate that at least partially surrounds an embedded radio-frequency integrated circuit chip and a processor chip mated to a redistribution layer. A wide-band phased-array antenna module is mated to the package substrate with direct interconnects from the radio-frequency integrated circuit chip to antenna patches within the antenna module. Additionally, fan-out antenna pads are also coupled to the radio-frequency integrated circuit chip.

Abstract: Various embodiments disclosed relate to a circuit. The circuit includes a transceiver adapted to generate a signal. A stranded transmission line is connected to the transceiver. The signal is then transmitted through the first pair of conductive strands.

Abstract: Methods/structures of joining package structures are described. Those methods/structures may include a first package, wherein the first package includes a first substrate section and a second substrate section. A plurality of stacked die may be disposed between the first substrate section and the second substrate section, wherein a surface of a first die of the plurality of stacked die is coplanar with a surface of the first section and with a surface of the second section. A second package is physically and electrically coupled to the first package.

Abstract: Various embodiments disclosed relate to a circuit. The circuit includes a transceiver adapted to generate a signal. A stranded transmission line is connected to the transceiver. The signal is then transmitted through the first pair of conductive strands.

Abstract: Various embodiments may be generally directed to techniques for an extendable peripheral port. Some embodiments are particularly directed to a computing device, such as an input/output (I/O) device, with a peripheral port that can be selectively repositioned to increase the distance between the peripheral port and one or more components of the I/O device that are sensitive to radio frequency interference (RFI), such as an antenna.

Abstract: Various embodiments disclosed relate to a wearable electronic device. One embodiment includes of a wearable electronic device includes a first flexible layer. The first flexible layer includes a first surface and a second surface that is substantially parallel to the first surface. A first electrical component and a second electrical component is attached to the second surface. A transmission line connects the first electrical component and the second electrical component. A voltage reference trace connected to a voltage reference source attached to at least one of the first electrical component or the second electrical component. The device further includes a second flexible layer. The second flexible layer includes a third surface that is substantially parallel to the second surface and facing the second surface. The second flexible layer also includes a fourth surface. The device further includes a voltage reference plane attached to the third surface.

Abstract: A flexible integrated circuit that includes a first dielectric layer having a first section at one polarity and a second section at an opposing polarity, wherein the first section and the second section are separated by dielectric material within first dielectric layer; a second dielectric layer having a first side wall that is electrically connected to the first section and a second side wall that is electrically connected to the second section; and a third dielectric layer having a base that is electrically connected to the first side wall and the second side wall, wherein the second dielectric layer is between the first dielectric layer and the third dielectric layer, wherein the base, the first and second side walls and the first and second sections form an antenna that is configured to send or receive wireless signals.

Abstract: A flexible integrated circuit that includes a first dielectric layer having a first section at one polarity and a second section at an opposing polarity, wherein the first section and the second section are separated by dielectric material within first dielectric layer; a second dielectric layer having a first side wall that is electrically connected to the first section and a second side wall that is electrically connected to the second section; and a third dielectric layer having a base that is electrically connected to the first side wall and the second side wall, wherein the second dielectric layer is between the first dielectric layer and the third dielectric layer, wherein the base, the first and second side walls and the first and second sections form an antenna that is configured to send or receive wireless signals.