Abstract: Maintaining photoresist thickness and uniformity over a substrate that includes various cavities presents problems, such as preventing distortion of features in the resist image close to cavity edges. These problems have been overcome by laying down the photoresist as two separate layers. The first layer is used to eliminate or reduce problems associated with the presence of the cavities. The second layer is processed in the normal way and does not introduce distortions close to a cavity's edge. A first embodiment introduces some liquid into the cavity before laying down the first layer while the second embodiment etches away part of the first layer before applying the second one. Application of the process to the formation of a cantilever that overhangs a cavity is also described.

Abstract: Monitoring semiconductor wafer tilt, such as in conjunction with semiconductor fabrication equipment having a cooling and or a heating plate, is disclosed. A system for such monitoring includes one or more light sources and one or more light detectors. Each light source generates light that is reflected by the semiconductor wafer. Each light detector senses a detected light value of the light reflected by the semiconductor wafer. If the detected light value deviates from a normal value corresponding to no wafer tilt, then this indicates that the semiconductor wafer has tilted.

Abstract: Monitoring semiconductor wafer tilt, such as in conjunction with semiconductor fabrication equipment having a cooling and or a heating plate, is disclosed. A system for such monitoring includes one or more light sources and one or more light detectors. Each light source generates light that is reflected by the semiconductor wafer. Each light detector senses a detected light value of the light reflected by the semiconductor wafer. If the detected light value deviates from a normal value corresponding to no wafer tilt, then this indicates that the semiconductor wafer has tilted.

Abstract: A method is disclosed for aligning wafers independent of the processes to which a wafer is subjected. In prior art, it is found that when aligning wafers from the front or device side, the alignment of the masks vary because of the variations on the topography of the particular layer in process. Since the topography of a layer is influenced by the planarization processes used and by the cumulative effect of the number of underlying features that are disposed on top of each other, severe misalignments can occur causing defective parts. The problem is eliminated by forming alignment marks on the backside of the wafer, and performing alignment with respect to the backside marks by projecting IR energy through an IR transparent stage placed under the backside of the wafer and using an IR microscope. An alignment system capable of performing process independent alignment is also disclosed.