Abstract: A micro light-emitting element is provided. The micro light-emitting element includes a first-type semiconductor having a bottom surface and a light-emitting layer disposed on the first-type semiconductor. The micro light-emitting element also includes a second-type semiconductor disposed on the light-emitting layer and an intrinsic semiconductor disposed on the second-type semiconductor and made of the same material as the second-type semiconductor. The intrinsic semiconductor has a top surface relative to the bottom surface. The sidewalls of the first-type semiconductor, the light-emitting layer, the second-type semiconductor, and the intrinsic semiconductor form a continuous side surface, and the side surface connects the bottom surface to the top surface.

Abstract: A semiconductor structure according to the present disclosure includes a substrate, a first base fin and a second base fin arising from the substrate, an isolation structure disposed between the first base fin and the second base fin, first channel members disposed over the first base fin, second channel members disposed over the second base fin, a region isolation feature extending into the substrate, a first gate structure wrapping around each of the first channel members, second gate structure wrapping around each of the second channel members, a first gate cut feature extending through the first gate structure and into the isolation feature, and a second gate cut feature extending though the second gate structure and into the isolation feature. Each of the first gate cut feature and the second gate cut feature are spaced apart from the region isolation feature.

Abstract: A circuit, including: a photodetector including a first readout terminal and a second readout terminal different than the first readout terminal; a first readout circuit coupled with the first readout terminal and configured to output a first readout voltage; a second readout circuit coupled with the second readout terminal and configured to output a second readout voltage; and a common-mode analog-to-digital converter (ADC) including: a first input terminal coupled with a first voltage source; a second input terminal coupled with a common-mode generator, the common-mode generator configured to receive the first readout voltage and the second readout voltage, and to generate a common-mode voltage between the first and second readout voltages; and a first output terminal configured to output a first output signal corresponding to a magnitude of a current generated by the photodetector.

Abstract: A screwdriver tip structure includes a main body provided with an operation end. The operation end is provided with multiple first working sections and multiple second working sections. Each of the first working sections has a convex shape. Each of the second working sections has a concave shape. Each of the first working sections is provided with multiple grooves. Each of the first working sections has a first end and a second end. The second end has a diameter more than that of the first end. Each of the first working sections has a periphery provided with a phantom side face. The side face extends from the second end to the first end. Each of the grooves is provided with a first concave face. The first concave face of each of the grooves includes a first single arc.

Abstract: A decentralized information transmission system comprising: an information generating end, first and second blockchain networks, and an information receiving end, an information data transmitted by the generating end is encrypted by a public key into an encrypted file, a hash value is generated by a hash value generating module, the first blockchain network receives the hash value and the encrypted file, the second blockchain network receives the hash value and a receiving end address, the receiving end generates a data reading request for the second blockchain network, the second blockchain network transmits the hash value to the receiving end, the receiving end generates a data demanding request for the first blockchain network, the first blockchain network transmits the encrypted file to the receiving end, and the receiving end decrypts the encrypted file with a private key to obtain the information data transmitted by the generating end.

Abstract: An intelligent monitoring system for waste disposal and the method thereof are provided, which include a plurality of operational devices and stages. First, a transportation stage is performed to loading a transport vehicle with a waste so as to transport the waste to a disposal station for further treatment. A camera and a sensor for detecting abnormal conditions are installed any one of the operational devices or installed in the operational path of any one of the operational devices. The camera records the videos of the operational stages, captures the images from the videos and recognizes the images in order to determine whether the abnormal conditions occur in any one of the operational stages. Alternatively, the camera is triggered to capture the images and recognize the images after the abnormal conditions are detected by the sensor in order to determine whether the abnormal conditions actually occur.

Abstract: A screwdriver tip structure includes a main body provided with an operation end. The operation end is provided with multiple first working sections and multiple second working sections. Each of the first working sections has a convex shape. Each of the second working sections has a concave shape. Each of the first working sections is provided with multiple grooves. Each of the first working sections has a first end and a second end. The second end has a diameter more than that of the first end. Each of the first working sections has a periphery provided with a phantom side face. The side face extends from the second end to the first end. Each of the grooves is provided with a first concave face. The first concave face of each of the grooves includes a first single arc.

Abstract: The present disclosure describes a semiconductor structure with a metal ion capture layer and a method for forming the structure. The method includes forming a first fin structure and a second fin structure on a substrate and forming a first gate structure over the first fin structure and a second gate structure over the second fin structure, where the first gate structure adjoins the second gate structure. The method further includes forming a dielectric layer on the first and second gate structures, removing a portion of the dielectric layer above an adjoining portion of the first and second gate structures to form an opening, and forming a metal ion capture layer in the opening.

Abstract: A provided method includes: obtaining a predictor matrix having at least one masked attribute; obtaining a response matrix; setting that the predictor matrix is approximated by a product of a basis matrix and a coefficient matrix; setting that the response matrix is approximated by a product of a weight matrix, a projection matrix and the predictor matrix; setting that the basis matrix, the coefficient matrix, the weight matrix, and the projection matrix are nonnegative; setting that the projection matrix, the weight matrix, or a product of the projection matrix and the predictor matrix is orthogonal, and thus setting a cost function; and calculating the basis matrix, the coefficient matrix, the weight matrix, and the projection matrix according to the cost function. Accordingly, operations of imputation, fitting, and subspace analysis can be performed.

Abstract: An intelligent monitoring system for waste disposal and the method thereof are provided, which include a plurality of operational devices and stages. First, a transportation stage is performed to loading a transport vehicle with a waste so as to transport the waste to a disposal station for further treatment. A camera and a sensor for detecting abnormal conditions are installed any one of the operational devices or installed in the operational path of any one of the operational devices. The camera records the videos of the operational stages, captures the images from the videos and recognizes the images in order to determine whether the abnormal conditions occur in any one of the operational stages. Alternatively, the camera is triggered to capture the images and recognize the images after the abnormal conditions are detected by the sensor in order to determine whether the abnormal conditions actually occur.

Abstract: An imputation method for a nonnegative symmetric matrix includes: obtaining an input symmetric matrix which includes multiple continuous void values; taking a difference between the input symmetric matrix and a target matrix as an input of a half quadratic function to form an objective function; and performing an optimization algorithm based on the objective function to compute elements of the target matrix.

Abstract: A provided method includes: obtaining a predictor matrix having at least one masked attribute; obtaining a response matrix; setting that the predictor matrix is approximated by a product of a basis matrix and a coefficient matrix; setting that the response matrix is approximated by a product of a weight matrix, a projection matrix and the predictor matrix; setting that the basis matrix, the coefficient matrix, the weight matrix, and the projection matrix are nonnegative; setting that the projection matrix, the weight matrix, or a product of the projection matrix and the predictor matrix is orthogonal, and thus setting a cost function; and calculating the basis matrix, the coefficient matrix, the weight matrix, and the projection matrix according to the cost function. Accordingly, operations of imputation, fitting, and subspace analysis can be performed.

Abstract: A method and a system for data imputation and classification are provided. The system includes a database, a historical sample imputation module and a current sample imputation and classification module. In the method, at first, an imputation calculation is performed on each of classified historical sample groups to obtain a basis matrix and a missing value corresponding to each of the classified historical sample groups. Thereafter, a sample classification stage is performed. In the sample classification stage, an IPP (Iterative Projection Pursuit) algorithm and an equation of nonlinear inequality constraints to calculate weighting vectors corresponding to a current sample. Thereafter, plural candidate samples corresponding to different classes are calculated in accordance with the basis matrix and the weighting vectors, and the sample class of the current sample and a prediction value for a missing value of the current sample are determined accordingly.

Abstract: A successive approximation register (SAR) analog-digital converter (ADC) and a method for operating the same are provided. The SAR ADC includes a first capacitor DAC (CDAC), a comparator and a controller. The first CDAC receives and samples an analog input signal to generate a first voltage. The comparator compares the first voltage with a comparison reference voltage to generate a first comparison result. In a k-th iteration of at least two iterations, the controller switches a k-th switching capacitor set from a first state to a second state, such that the first CDAC generates a second voltage, and the comparator compares the second voltage with the comparison reference voltage to generate a second comparison result. The controller determines a window region and determines whether the k-th switching capacitor set is switched back to the first state according to the first comparison result and the second comparison result.

Abstract: A method for increasing the luminous intensity of an ultraviolet light emitting diode includes heating an ultraviolet light emitting diode to a working temperature, and supplying electricity to the ultraviolet light emitting diode at the working temperature to make the ultraviolet light emitting diode emit ultraviolet light. An apparatus for increasing the luminous intensity of an ultraviolet light emitting diode includes a substrate, an ultraviolet light emitting diode mounted on the substrate, an electric heater mounted on the substrate, a temperature sensor, and a controller electrically connected to the ultraviolet light emitting diode, the electric heater, and the temperature sensor. The controller can heat the ultraviolet light emitting diode through the substrate.

Abstract: A method for increasing the luminous intensity of an ultraviolet light emitting diode includes heating an ultraviolet light emitting diode to a working temperature, and supplying electricity to the ultraviolet light emitting diode at the working temperature to make the ultraviolet light emitting diode emit ultraviolet light. An apparatus for increasing the luminous intensity of an ultraviolet light emitting diode includes a substrate, an ultraviolet light emitting diode mounted on the substrate, an electric heater mounted on the substrate, a temperature sensor, and a controller electrically connected to the ultraviolet light emitting diode, the electric heater, and the temperature sensor. The controller can heat the ultraviolet light emitting diode through the substrate.

Abstract: A signal comparison apparatus and a method of controlling the same are provided. The signal comparison apparatus includes a first comparator, a self-timed clock generator and a controller. The first comparator is controlled by a start signal to compare differences of first input signals and generate output signals. The self-timed clock generator receives the output signals to generate a self-timed clock signal. The controller receives the self-timed clock signal and calculates a time interval of the self-timed clock signal which responds to the first input signals of the first comparator, and determines whether the time interval is equal to or larger than a threshold time to generate a metastable detection signal. When the time interval is equal to or larger than the threshold time, the controller outputs the metastable detection signal as the start signal, such that the first comparator continue comparing the next differences of the first input signals.

Abstract: A signal comparison apparatus and a method of controlling the same are provided. The signal comparison apparatus includes a first comparator, a self-timed clock generator and a controller. The first comparator is controlled by a start signal to compare differences of first input signals and generate output signals. The self-timed clock generator receives the output signals to generate a self-timed clock signal. The controller receives the self-timed clock signal and calculates a time interval of the self-timed clock signal which responds to the first input signals of the first comparator, and determines whether the time interval is equal to or larger than a threshold time to generate a metastable detection signal. When the time interval is equal to or larger than the threshold time, the controller outputs the metastable detection signal as the start signal, such that the first comparator continue comparing the next differences of the first input signals.

Abstract: A latch apparatus and applications thereof are provided. The latch apparatus consists of a latch circuit and a switchable DC block unit. The switchable DC block unit is coupled to the latch circuit, and configured to: isolate a cross-coupling path in the latch circuit and store a voltage difference before the latch apparatus performs the latching operation; and when the latch apparatus performs the latching operation, provide the stored voltage varying with time to increase the overdrive voltage of at least one transistor in the latch circuit (increase the transistor transconductance), so that the latch apparatus maintains high speed operation at low supply voltage.

Abstract: A latch, an operation method of the latch, and a comparator using the latch are disclosed. The latch includes first and second cross-coupled pairs and first and second transistor pairs. First terminals of the first and second current paths of the first cross-coupled pair are respectively coupled to first terminals of the first and second transistors of the first transistor pair. First terminals of the third and fourth current paths of the second cross-coupled pair are respectively coupled to first terminals of the third and fourth transistors of the second transistor pair. Control terminals of the third and fourth transistors are respectively coupled to the first and second current paths. Control terminals of the first and second transistors are respectively coupled to the third and fourth current paths.