Abstract: An image sensor having a two-dimensional array of pixel sensors, a layer of scintillation material, and a controller is disclosed. The layer of scintillation material is adjacent to the two-dimensional array, the scintillation material emits light in response to x-rays impinging thereon. The pixel sensors detect this light. The controller reads out data stored in the two-dimensional array of pixel sensors and forms an image therefrom. The controller corrects the data for errors resulting from x-rays that generate electrons that are stored in the pixel sensors in the process of forming the image. In one aspect of the invention, the controller forms the image by causing the two-dimensional array to form a plurality of frames, each frame includes a measurement of a charge stored on each photodiode during a preceding time period. The controller selectively combines data from the frames to form the image.

Abstract: An image sensor and a method for using the same are disclosed. The image sensor includes an array of pixel sensors, a signal digitizing circuit, and a digitizing controller. The array of pixel sensors includes a plurality of pixel sensors. Each pixel sensor includes a photodetector, a charge conversion circuit, and a gate transistor. The charge conversion circuit generates a voltage signal that is related to a charge on the photodiode, and the gate transistor couples the voltage signal to a bit line in response to a first signal. The signal digitizing circuit converts the voltage signal to a plurality of output digital values. Each output digital value has a different level of digitization noise. One of the output digital values is selected for output in response to an output selection signal that is generated by the digitizing controller.

Abstract: A CCD containing circuit and method for making the same. The circuit includes a CCD array and a protection circuit. The CCD array is constructed on an integrated circuit substrate and includes a plurality of gate electrodes that are insulated from the substrate by an insulating layer. The gate electrodes are connected to a conductor bonded to the substrate. The protection circuit is also constructed on the substrate. The protection circuit is connected to the conductor and to the substrate and protects the CCD array from both negative and positive voltage swings generated by electrostatic discharge events and the like. The protection circuit and the CCD can be constructed in the same integrated circuit fabrication process.

Abstract: An image sensor having a two-dimensional array of pixel sensors, a layer of scintillation material, and a controller is disclosed. The layer of scintillation material is adjacent to the two-dimensional array, the scintillation material emits light in response to x-rays impinging thereon. The pixel sensors detect this light. The controller reads out data stored in the two-dimensional array of pixel sensors and forms an image therefrom. The controller corrects the data for errors resulting from x-rays that generate electrons that are stored in the pixel sensors in the process of forming the image. In one aspect of the invention, the controller forms the image by causing the two-dimensional array to form a plurality of frames, each frame includes a measurement of a charge stored on each photodiode during a preceding time period. The controller selectively combines data from the frames to form the image.

Abstract: An image sensor having a two-dimensional array of CMOS pixel sensors, a row decoder and a column decoder is disclosed. The two-dimensional array of CMOS pixel sensors is organized as a plurality of rows and columns that are addressed with the aid of row and column decoders. At least one of the column decoder or the row decoder is located between two of the rows or two of the columns, respectively. X-rays are converted to light that is detected by the image sensor by a layer of scintillation material that overlies the two-dimensional array. The internally located decoder or decoders facilitate sensors in which the two-dimensional array includes a rectangular array having a chamfered corner such that rows or columns that extend into the chamfered corner have lengths that are less than rows or columns, respectively, that do not extend into the corners.

Abstract: An image sensor having a first substrate on which a CCD array is fabricated in a first fabrication system is disclosed. The CCD array includes a node through which charge from the pixels passes during a readout operation. The first substrate also includes a first FET fabricated on the first substrate in the first fabrication system, the first FET having a gate connected to the node and a source or drain connected to a first conducting pad on the first substrate. A capacitor connects the node to a second conducting pad on the first substrate. A switch is connected across the first capacitor such that the first capacitor is shorted when the first switch is closed. The first switch is controlled by a reset signal on a third conducting pad on the first substrate. The first substrate can be connected to a second substrate having amplification and control circuitry.

Abstract: An imaging array having one or more columns of pixels is disclosed. Each pixel includes a photodiode including first and second terminals, a local reset circuit for connecting the first terminal to a column reset line; and a buffer circuit for selectively connecting the first terminal to a column bit line in response to a word select signal. Each column also includes a column reset circuit having an operational amplifier and a low-pass filter. The operational amplifier has a first input connected to the column bit line for that column and a second input connected to a reset signal generator that generates a reset signal during a reset cycle. The output of the operational amplifier is connected to the column reset line during the reset cycle. In one embodiment, the gain of the operational amplifier and the passband of the low-pass filter are varied during the reset cycle.

Abstract: A CMOS image sensor includes a plurality of pixel circuits. Each pixel circuit includes a plurality of transistors. The image sensor includes a controller for controlling operation of the plurality of pixel circuits, wherein the controller is configured to cause at least one of the transistors in each pixel circuit to be placed in an accumulation mode and then switched from the accumulation mode to a strong inversion mode, thereby reducing 1/f noise of the pixel circuits.

Abstract: An active pixel sensor comprises a photodiode providing a photodiode output current indicative of an intensity of light incident the photodiode and an integrator circuit electrically coupled to the photodiode. The integrator circuit is configured to provide a pixel voltage representing an integration of the photodiode output current when the photodiode is exposed to light and dark leakage current through the photodiode when the photodiode is not exposed to light. The integrator circuit is configured to set a reverse bias voltage on the photodiode and respond to at least one control input to set the reverse bias voltage to a first level. The active pixel sensor comprises a feedback loop configured to receive the pixel voltage and control the integrator circuit to adjust the reverse bias voltage to substantially reduce the dark leakage current through the photodiode to a desired level.

Abstract: An imaging array having one or more columns of pixels is disclosed. Each pixel includes a photodiode including first and second terminals, a local reset circuit for connecting the first terminal to a column reset line; and a buffer circuit for selectively connecting the first terminal to a column bit line in response to a word select signal. Each column also includes a column reset circuit having an operational amplifier and a low-pass filter. The operational amplifier has a first input connected to the column bit line for that column and a second input connected to a reset signal generator that generates a reset signal during a reset cycle. The output of the operational amplifier is connected to the column reset line during the reset cycle. In one embodiment, the gain of the operational amplifier and the passband of the low-pass filter are varied during the reset cycle.

Abstract: An image sensor and method of sensing an image provides a variable amplifier at each pixel, thereby expanding the dynamic range of the sensor. An image sensor core (500) comprises a plurality of pixel sensors (510). Each pixel sensor preferably includes a photosensitive element (310), a variable amplifier (312), and an analog-to-digital converter (“ADC”) (314). The ADC (512) includes a comparator (512) coupled to a latch/shift register (514). The comparator (512) receives the output of the variable amplifier (312) and a ramp signal and produces an output when the ramp signal exceeds the amplifier (312) output. The latch/shift register (514) latches a count signal corresponding to the ramp signal when triggered by the comparator (512). In operation, the photosensitive element (310) is exposed to light for a first integration period. The variable amplifier (312) amplifies the resulting photocharge by the maximum possible amount.

Abstract: An improved image sensor constructed from a photodiode and a transimpedance amplifier having an input connected to the photodiode. The present invention utilizes a clamping circuit to prevent the potential at the input of the transimpedance amplifier from causing the photodiode to become forward biased. In the preferred embodiment of the present invention, the transimpedance amplifier includes a transistor connecting the input to the output, and the clamping circuit includes a circuit for holding the gate of the transistor at a clamping potential.

Abstract: An imaging element that includes a photodiode and an amplifier for integrating photocurrent from the photodiode. The amplifier includes an input follower, a level shifter, and an output amplifier. The level shifter provides DC isolation between the follower output and the output amplifier. The input follower includes an input transistor connected to the photodiode, and the output amplifier has an input transistor connected to the level shifter. The sizes of these transistors are chosen such that the area of the input transistor in the input follower is less that the area of the input transistor in the output amplifier. The input follower preferably utilizes PMOS transistors.

Abstract: An analog-to-digital conversion scheme allows the conversion of a small dynamic range analog signal into a floating-point, digital representation with a larger dynamic range. A montonically changing analog signal is reset to a reference value at time t=0. The analog signal is then sub-converted by an analog-to-digital converter with maximum input signal level Ss to corresponding digital representations at several sub-conversion times t=T2>T1, t=T3>T2, . . . t=TM>TM−1, where TM≦T. These digital representations are then suitably combined to produce a cumulative, floating-point digital representation which accurately represents the analog signal even if the analog signal has a value greater than Ss at time t=T.

Abstract: An improved image sensor constructed from a photodiode and a transimpedance amplifier having an input connected to the photodiode. The present invention utilizes a clamping circuit to prevent the potential at the input of the transimpedance amplifier from causing the photodiode to become forward biased. In the preferred embodiment of the present invention, the transimpedance amplifier includes a transistor connecting the input to the output, and the clamping circuit includes a circuit for holding the gate of the transistor at a clamping potential.

Abstract: An imaging element and an imaging array constructed from such elements. The preferred imaging element is constructed from a photodiode having a parasitic capacitance Cpd; and an amplifier for measuring the charge stored on the parasitic capacitor. The amplifier includes an opamp having a signal input, reference input and output; the first terminal of the parasitic capacitor is connected to the signal input. The imaging element includes a reset switch for shorting the signal input and the output of the opamp, and capacitive network. The capacitive network connects the signal input and the output of the opamp, and provides a capacitance of CT between the signal input and the output of the opamp wherein CT<Cpd. The capacitive network is constructed from a plurality of component capacitors. Preferably each component capacitor has a capacitance greater than or equal to Cpd. An imaging array according to the invention includes a plurality of imaging elements, a signal bus, a reset bus, and a reset circuit.

Abstract: An analog-to-digital conversion scheme allows the conversion of a small dynamic range analog signal into a floating-point, digital representation with a larger dynamic range. A montonically changing analog signal is reset to a reference value at time t=0. The analog signal is then sub-converted by an analog-to-digital converter with maximum input signal level Ss to corresponding digital representations at several sub-conversion times t=T2>T1, t=T3>T2, . . . t=TM>TM−1, where TM≦T. These digital representations are then suitably combined to produce a cumulative, floating-point digital representation which accurately represents the analog signal even if the analog signal has a value greater than Ss at time t=T.

Abstract: Bandlimiting and capacitive feedback is used to reduce pixel reset noise in an image sensor without adding lag. An image sensor includes a reset circuit having a reset control loop for controlling pixel reset. The reset control loop includes, for example, a reset amplifier and a transistor. The reset amplifier has a first input coupled to a reset voltage and a second input coupled to a readout node (e.g., the source of a NMOS transistor). When the reset voltage exceeds the readout node voltage, the reset amplifier output voltage rises and turns on the transistor. The output voltage of the transistor then follows the reset voltage until the reset voltage stops rising and the readout node voltage overshoots the reset voltage. After the readout node voltage overshoots the reset voltage, the reset amplifier output voltage drops and turns the transistor off. With the transistor off, only the overlap capacitance of the transistor is used to control the reset control loop[.

Abstract: An imaging element and an imaging array constructed from such elements. The preferred imaging element is constructed from a photodiode having a parasitic capacitance Cpd; and an amplifier for measuring the charge stored on the parasitic capacitor. The amplifier includes an opamp having a signal input, reference input and output; the first terminal of the parasitic capacitor is connected to the signal input. The imaging element includes a reset switch for shorting the signal input and the output of the opamp, and capacitive network. The capacitive network connects the signal input and the output of the opamp, and provides a capacitance of CT between the signal input and the output of the opamp wherein CT<CPd. The capacitive network is constructed from a plurality of component capacitors. Preferably each component capacitor has a capacitance greater than or equal to Cpd. An imaging array according to the invention includes a plurality of imaging elements, a signal bus, a reset bus, and a reset circuit.

Abstract: An analog-to-digital conversion scheme allows the conversion of a small dynamic range analog signal into a floating-point, digital representation with a larger dynamic range. A montonically changing analog signal is reset to a reference value at time t=0. The analog signal is then sub-converted by an analog-to-digital converter with maximum input signal level Ss to corresponding digital representations at several sub-conversion times t=T2>T1t=T3>T2, . . . t=TM>TM−1, where TM≦T. These digital representations are then suitably combined to produce a cumulative, floating-point digital representation which accurately represents the analog signal even if the analog signal has a value greater than Ss at time t=T.