Abstract: A front-vehicle path-following system and a method thereof are applied to a host vehicle. The host vehicle receives front-vehicle information and detects the host-vehicle information of a front vehicle. The system generates two paths, one is a front-vehicle estimation path generated based on the host-vehicle information, and the other is a front-vehicle wheel speed path generated based on the front-vehicle information. The location of the host vehicle currently located on the front-vehicle wheel speed path is matched as a path following start point. A following path decision is made based on the states of the two paths. Finally, control the host vehicle to follow one of the two paths based on the tracking path decision. The present invention can follow the path of the front vehicle to achieve steering and following purposes when failing to detect lane lines.

Abstract: A packaging structure is provided. The packaging structure includes a first dielectric layer, a redistribution structure, a plurality of light-emitting elements, an integrated circuit element, and a cover layer. The first dielectric layer has a top surface and a side surface. The redistribution structure is disposed in the first dielectric layer. The plurality of light-emitting elements is disposed on the first dielectric layer. The integrated circuit element is disposed on the first dielectric layer and adjacent to the plurality of light-emitting elements. The cover layer is disposed on the plurality of light-emitting elements and the integrated circuit element. The cover layer surrounds the plurality of light-emitting elements and the integrated circuit element. The cover layer is in direct contact with the top surface and the side surface of the first dielectric layer.

Abstract: A fusion detection method, comprising: establishing a table corresponding to multiple blocks of a frame, where N is a natural number; determining a value of each cell of the table according to a historical first value of objection detections of corresponding blocks across from a 0-th first sensing data to a N-th first sensing data and a historical second value of objection detections of the corresponding blocks across from a 0-th second sensing data to a N-th second sensing data; and determining whether an object detection of the frame is presented or not based on the value of the cell corresponding to the block of the object detection, wherein the 0-th first sensing data to the N-th first sensing data are gathered from a first sensor, the 0-th second sensing data to the N-th second sensing data are gathered from a second sensor.

Abstract: A light-emitting diode includes an epitaxial unit, a first electrode, and a second electrode. One of the first electrode and the second electrode includes a first reflective layer, a wire-bonding electrode layer, a second reflective layer wrapping a portion of the wire-bonding electrode layer, and a stress adjustment layer which wraps around the first reflective layer. The first reflective layer includes platinum, and the second reflective layer includes a material which has a Mohs hardness of not less than 6. The stress adjustment layer has a Mohs hardness of not less than 6, and the stress adjustment layer has a thickness that is 65% to 75% of a thickness of the first reflective layer.

Abstract: A circuit includes a phase selector to generate an injection clock signal having an injection phase based on a phase of a digitally controlled oscillator clock signal generated within a phase-locking feedback loop. An injection-locked oscillator (ILO), coupled to an output of the phase selector, generates an ILO clock signal that is convertible to provide a feedback clock signal of the circuit. Logic, coupled between an output of the ILO and the phase selector, to, at each predetermined number of cycles of the DCO clock signal, cause the phase selector to output a phase shift in the injection clock signal that causes the ILO clock signal to comprise a rotated phase, relative to the injection phase, and that prevents a glitch in the injection clock signal.

Abstract: A light-emitting diode includes an epitaxial unit, a first electrode, and a second electrode. One of the first electrode and the second electrode includes a first reflective layer, a wire-bonding electrode layer, a second reflective layer wrapping a portion of the wire-bonding electrode layer, and a stress adjustment layer which wraps around the first reflective layer. The first reflective layer includes platinum, and the second reflective layer includes a material which has a Mohs hardness of not less than 6. The stress adjustment layer has a Mohs hardness of not less than 6, and the stress adjustment layer has a thickness that is 65% to 75% of a thickness of the first reflective layer.

Abstract: A circuit includes a phase selector to generate an injection clock signal having an injection phase based on a phase of a digitally controlled oscillator clock signal generated within a phase-locking feedback loop. An injection-locked oscillator (ILO), coupled to an output of the phase selector, generates an ILO clock signal that is convertible to provide a feedback clock signal of the circuit. Logic, coupled between an output of the ILO and the phase selector, to, at each predetermined number of cycles of the DCO clock signal, cause the phase selector to output a phase shift in the injection clock signal that causes the ILO clock signal to comprise a rotated phase, relative to the injection phase, and that prevents a glitch in the injection clock signal.

Abstract: A micro light-emitting diode package structure is provided. The micro light-emitting diode package structure includes a plurality of micro light-emitting diode chips, a light-transmitting layer, a first insulating layer, a driving element, and a redistribution layer. The micro light-emitting diode chips are disposed side by side, wherein each micro light-emitting diode chip includes an electrode surface and a light-emitting surface opposite to each other. The light-transmitting layer covers the light-emitting surfaces of the micro light-emitting diode chips. The first insulating layer is disposed below the micro light-emitting diode chips. The driving element is disposed in the first insulating layer, wherein the driving element includes a plurality of electrodes, and the electrodes are on the side of the driving element away from the micro light-emitting diode chips.

Abstract: This invention provides a method for detecting object, which comprises receiving an image; and executing a deep neural network architecture for the image to obtain one or more object bounding box, wherein the deep neural network architecture comprises a two-dimensional discrete wavelet transform.

Abstract: A method for object and key-point detection, comprising: receiving an image, executing a deep neural network architecture for the image to obtain one or more object bounding boxes; executing the deep neural network architecture for the one or more object bounding boxes to obtain one or more key-point positions corresponding to the one or more object bounding boxes; and outputting the one or more object bounding boxes and the one or more key-point positions.

Abstract: This disclosure provides a method for determining visual and auditory attentiveness of vehicle driver, which comprises: determining a visual attentiveness of a driver according to an image captured by a camera installed inside the vehicle; determining a recognition attentiveness of the driver according to sounds obtained by a microphone installed inside the vehicle; deciding whether to issue a reminder to the driver based on the visual attentiveness and the recognition attentiveness of the driver; when it is necessary to remind the driver after determining the driver's visual and recognition attentiveness, one or a combination of reminder steps will be executed; the reminder steps comprising: issuing a visual reminder by a display device in the vehicle; and issuing a auditory reminder by a speaker in the vehicle.

Abstract: A wafer with micro integrated circuits includes a transparent substrate and a plurality of micro components. The micro components are each attached to the transparent substrate by a plurality of transparent adhesive layers. Each of the micro components includes a bonding pad in direct contact with the transparent adhesive layer and an etching stop layer located on the side of the micro components opposite from the bonding pad.

Abstract: The present invention provides a driving assistance system and a driving assistance computation method that utilize a deep neural network architecture to achieve object detection and semantic segmentation functionalities in a single inference of the same model.

Abstract: A method for fabricating a high electron mobility transistor (HEMT) includes the steps of forming a buffer layer on a substrate, forming a barrier layer on the buffer layer, forming a p-type semiconductor layer on the barrier layer, forming a gate electrode layer on the p-type semiconductor layer, and patterning the gate electrode layer to form a gate electrode. Preferably, the gate electrode includes an inclined sidewall.

Abstract: A method for manufacturing a high electron mobility transistor device includes providing a substrate. A channel material, a barrier material, a polarization adjustment material and a conductive material are formed on the substrate. A hard mask layer is formed on the conductive material. The conductive material is patterned to form a conductive layer by using the hard mask layer as a mask. A plurality of protection layers is formed on sidewalls of the hard mask layer and the conductive layer. The polarization adjustment material is patterned to form a polarization adjustment layer by using the plurality of protection layers and the hard mask as masks. The plurality of protection layers is removed. A portion of the conductive layer is laterally removed to form a first gate conductive layer.

Abstract: A device includes feed-forward clock circuitry to provide a receiver (RX) clock to a sampler circuit that samples a data lane of a set of RX data lanes, the feed-forward clock circuitry having a temperature-induced delay. The device also includes an RX phase-locked loop (PLL) coupled between the feed-forward clock circuitry and the sampler circuit. The RX PLL includes a phase interpolator positioned in a feedback path of the RX PLL. The phase interpolator has a negative delay that matches the temperature-induced delay of the feed-forward clock circuitry to cause the sampler circuit to cancel out the common noise shared between the feed-forward clock circuitry and the data lane.

Abstract: A light-emitting device, including a mount substrate, at least one light emitting element, a first light transparent member, a second light transparent member and a covering member, is disclosed. The at least one light emitting element is disposed on the mount substrate in a flip-chip manner. The first light transparent member is configured to receive the incident light emitting from the light emitting element, wherein the first light transparent member is formed of an inorganic substance and an inorganic phosphor, and includes a top surface and a first side surface contiguous to the top surface. The second light transparent member is disposed on the top surface of the first light transparent member and is formed of the inorganic substance and contains no the inorganic phosphor, and includes an externally exposed light emission surface and a second side surface contiguous to the externally exposed light emission surface.

Abstract: A phase-locked loop (PLL) device includes a first phase detector to receive an in-phase reference clock and an in-phase feedback clock, the first phase detector to output a first phase error; a second phase detector to receive a quadrature reference clock and a quadrature feedback clock, the second phase detector to output a second phase error; a proportional path component to generate first current pulses from the first phase error and second current pulses from the second phase error; an integrator circuit coupled to the proportional path component, the integrator circuit to sum, within a current output signal, the first current pulses and the second current pulses; a ring oscillator to be driven by the current output signal; and a pair of phase interpolators coupled to an output of the ring oscillator, the pair of phase interpolators to respectively generate the in-phase feedback clock and the quadrature feedback clock.

Abstract: A device includes feed-forward clock circuitry to provide a receiver (RX) clock to a sampler circuit that samples a data lane of a set of RX data lanes, the feed-forward clock circuitry having a temperature-induced delay. The device also includes an RX phase-locked loop (PLL) coupled between the feed-forward clock circuitry and the sampler circuit. The RX PLL includes a phase interpolator positioned in a feedback path of the RX PLL. The phase interpolator has a negative delay that matches the temperature-induced delay of the feed-forward clock circuitry to cause the sampler circuit to cancel out the common noise shared between the feed-forward clock circuitry and the data lane.

Abstract: A phase-locked loop (PLL) device includes a first phase detector to receive an in-phase reference clock and an in-phase feedback clock, the first phase detector to output a first phase error; a second phase detector to receive a quadrature reference clock and a quadrature feedback clock, the second phase detector to output a second phase error; a proportional path component to generate first current pulses from the first phase error and second current pulses from the second phase error; an integrator circuit coupled to the proportional path component, the integrator circuit to sum, within a current output signal, the first current pulses and the second current pulses; a ring oscillator to be driven by the current output signal; and a pair of phase interpolators coupled to an output of the ring oscillator, the pair of phase interpolators to respectively generate the in-phase feedback clock and the quadrature feedback clock.