Patents by Inventor Brandon C. Hamilton
Brandon C. Hamilton has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).
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Patent number: 11749539Abstract: Systems and methods for selectively etching features in an electronic substrate via a precision dispense apparatus and precision etchant dispense tool are disclosed. The method includes creating a toolpath instruction for etching at least one feature in the substrate, programming the precision dispense apparatus to execute the created toolpath instruction, and causing the precision dispense tool to deposit etchant material onto the surface of the substrate to etch the substrate surface to produce the at least one feature according to the created toolpath instruction. The capabilities of the systems and methods disclosed herein extend to 3D substrates and post-build processing, among others.Type: GrantFiled: August 26, 2020Date of Patent: September 5, 2023Assignee: Rockwell Collins, Inc.Inventors: Richard Korneisel, Nathaniel P. Wyckoff, Brandon C. Hamilton, Kyle B. Snyder, Jenny Calubayan
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Patent number: 11631808Abstract: A system may include an array of interconnected memristors. Each memristor may include a first electrode, a second electrode, and a memristor material positioned between the first electrode and the second electrode. The system may further include a controller communicatively coupled to the array of interconnected memristors. The controller may be configured to tune the array of interconnected memristors.Type: GrantFiled: December 7, 2020Date of Patent: April 18, 2023Assignee: Rockwell Collins, Inc.Inventors: Kyle B. Snyder, Nathaniel P. Wyckoff, Brandon C. Hamilton, Bruce Rowenhorst, Steven J. Wiebers
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Patent number: 11626286Abstract: Systems and methods for custom photolithography masking via a precision dispense apparatus and process are disclosed. Methods include creating a toolpath instruction for depositing opaque onto a substrate, programming a precision dispense apparatus to execute the created toolpath instruction, and causing the precision dispense tool to deposit opaque material onto the substrate to form the photomask. The substrate may be an optically transparent plate or film or may be an electronic substrate where the opaque material is deposited directly onto a photoresist coating. Capabilities of the systems and methods disclosed herein extend to 3D substrates and custom photolithography masking, among others.Type: GrantFiled: August 25, 2020Date of Patent: April 11, 2023Assignee: Rockwell Collins, Inc.Inventors: Jenny Calubayan, Richard Korneisel, Nathaniel P. Wyckoff, Brandon C. Hamilton, Kyle B. Snyder
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Patent number: 11605570Abstract: A system and method. The system may include an integrated circuit (IC) die. The IC die may have two faces and sides. The system may further include mold material. The mold material may surround at least the sides of the IC die. The IC die may be mechanically interlocked with the mold material.Type: GrantFiled: September 10, 2020Date of Patent: March 14, 2023Assignee: Rockwell Collins, Inc.Inventors: Richard Korneisel, Nathaniel P. Wyckoff, Brandon C. Hamilton, Bret W. Simon, Jacob R. Mauermann
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Patent number: 11515225Abstract: A system and method. The system may include an integrated circuit (IC) die having two faces and sides. The system may further include mold material surrounding at least the sides of the IC die. The system may further include a redistribution layer and signal pads. The redistribution layer may be positioned between (a) the signal pads and (b) the mold material and the IC die. The redistribution layer may have conductive paths at least connecting the IC die and at least some of the signal pads. A surface of the mold material may abut the redistribution layer. The surface of the mold material may include at least one recessed area having at least one conductive feature connected to at least one of the conductive paths or the IC die.Type: GrantFiled: September 10, 2020Date of Patent: November 29, 2022Assignee: Rockwell Collins, Inc.Inventors: Richard Korneisel, Nathaniel P. Wyckoff, Brandon C. Hamilton, Bret W. Simon, Jacob R. Mauermann
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Patent number: 11474576Abstract: An electrical device with thermally controlled performance is disclosed. The electrical device includes at least one die with a plurality of device components disposed upon or at least partially embedded within the die. The electrical device further includes a plurality of signal paths interconnecting the plurality of device components. The electrical device further includes a plurality of temperature sensors disposed upon or at least partially embedded within the die. The temperature sensors are configured to detect thermal loads at respective portions of the die. The electrical device further includes at least one controller disposed upon or at least partially embedded within the die. The controller is configured to adjust one or more operating parameters for one or more of the device components based on the thermal loads detected by the temperature sensors.Type: GrantFiled: July 26, 2019Date of Patent: October 18, 2022Assignee: Rockwell Collins, Inc.Inventors: Alan P. Boone, Brandon C. Hamilton, Kyle B. Snyder, Bryan M. Jefferson
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Patent number: 11469373Abstract: A system may include a first conductive plate configured at least to receive an input signal. The system may include a second conductive plate configured at least to output an output signal. The system may further include a memristor material positioned between the first conductive plate and the second conductive plate.Type: GrantFiled: September 10, 2020Date of Patent: October 11, 2022Assignee: Rockwell Collins, Inc.Inventors: Kyle B. Snyder, Nathaniel P. Wyckoff, Brandon C. Hamilton, Bruce Rowenhorst, Steven J. Wiebers
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Patent number: 11462267Abstract: A system may include a multi-lead memristor. The multi-lead memristor may include a first lead, a second lead, a third lead, a first memristor material, and a second memristor material. The second lead may be positioned between the first lead and the third lead. The first memristor material may be positioned between the first lead and the second lead. The second memristor material may be positioned between the second lead and the third lead.Type: GrantFiled: December 7, 2020Date of Patent: October 4, 2022Assignee: Rockwell Collins, Inc.Inventors: Kyle B. Snyder, Nathaniel P. Wyckoff, Brandon C. Hamilton, Bruce Rowenhorst, Steven J. Wiebers
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Patent number: 11456418Abstract: A system may include a first conductive plate configured at least to receive an input signal and a second conductive plate configured at least to output an output signal. The system may further include a first memristor material positioned between the first conductive plate and the second conductive plate. The system may further include a second memristor material positioned between the first conductive plate and the second conductive plate. The first memristor material and the second memristor material may be in parallel electrically. The first memristor material may be different from the second memristor material.Type: GrantFiled: September 10, 2020Date of Patent: September 27, 2022Assignee: Rockwell Collins, Inc.Inventors: Kyle B. Snyder, Nathaniel P. Wyckoff, Brandon C. Hamilton, Bruce Rowenhorst, Steven J. Wiebers
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Publication number: 20220181548Abstract: A system may include an array of interconnected memristors. Each memristor may include a first electrode, a second electrode, and a memristor material positioned between the first electrode and the second electrode. The system may further include a controller communicatively coupled to the array of interconnected memristors. The controller may be configured to tune the array of interconnected memristors.Type: ApplicationFiled: December 7, 2020Publication date: June 9, 2022Applicant: Rockwell Collins, Inc.Inventors: Kyle B. Snyder, Nathaniel P. Wyckoff, Brandon C. Hamilton, Bruce Rowenhorst, Steven J. Wiebers
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Publication number: 20220180924Abstract: A system may include a multi-lead memristor. The multi-lead memristor may include a first lead, a second lead, a third lead, a first memristor material, and a second memristor material. The second lead may be positioned between the first lead and the third lead. The first memristor material may be positioned between the first lead and the second lead. The second memristor material may be positioned between the second lead and the third lead.Type: ApplicationFiled: December 7, 2020Publication date: June 9, 2022Applicant: Rockwell Collins, Inc.Inventors: Kyle B. Snyder, Nathaniel P. Wyckoff, Brandon C. Hamilton, Bruce Rowenhorst, Steven J. Wiebers
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Patent number: 11276641Abstract: An electronic device fabrication system may include, but is not limited to: a conductive material deposition device configured for deposition of a conductive material; at least one electronic device substrate configured to receive deposited conductive material; and at least one mask configured to selectively transmit the conductive material to the electronic device substrate, wherein the at least one mask configured to selectively transmit the conductive material to the electronic device substrate includes: at least a first side disposed at an angle relative to an adjacent second side.Type: GrantFiled: January 6, 2020Date of Patent: March 15, 2022Assignee: Rockwell Collins, Inc.Inventors: Kyle B. Snyder, Nathaniel P. Wyckoff, Brandon C. Hamilton, Bret W. Simon, Alexander Warren
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Publication number: 20220077390Abstract: A system may include a first conductive plate configured at least to receive an input signal and a second conductive plate configured at least to output an output signal. The system may further include a first memristor material positioned between the first conductive plate and the second conductive plate. The system may further include a second memristor material positioned between the first conductive plate and the second conductive plate. The first memristor material and the second memristor material may be in parallel electrically. The first memristor material may be different from the second memristor material.Type: ApplicationFiled: September 10, 2020Publication date: March 10, 2022Inventors: Kyle B. Snyder, Nathaniel P. Wyckoff, Brandon C. Hamilton, Bruce Rowenhorst, Steven J. Wiebers
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Publication number: 20220077016Abstract: A system and method. The system may include an integrated circuit (IC) die. The IC die may have two faces and sides. The system may further include mold material. The mold material may surround at least the sides of the IC die. The IC die may be mechanically interlocked with the mold material.Type: ApplicationFiled: September 10, 2020Publication date: March 10, 2022Inventors: Richard Korneisel, Nathaniel P. Wyckoff, Brandon C. Hamilton, Bret W. Simon, Jacob R. Mauermann
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Publication number: 20220077015Abstract: A system and method. The system may include an integrated circuit (IC) die having two faces and sides. The system may further include mold material surrounding at least the sides of the IC die. The system may further include a redistribution layer and signal pads. The redistribution layer may be positioned between (a) the signal pads and (b) the mold material and the IC die. The redistribution layer may have conductive paths at least connecting the IC die and at least some of the signal pads. A a surface of the mold material may abut the redistribution layer. The surface of the mold material may include at least one recessed area having at least one conductive feature connected to at least one of the conductive paths or the IC die.Type: ApplicationFiled: September 10, 2020Publication date: March 10, 2022Inventors: Richard Korneisel, Nathaniel P. Wyckoff, Brandon C. Hamilton, Bret W. Simon, Jacob R. Mauermann
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Publication number: 20220077388Abstract: A system may include a first conductive plate configured at least to receive an input signal. The system may include a second conductive plate configured at least to output an output signal. The system may further include a memristor material positioned between the first conductive plate and the second conductive plate.Type: ApplicationFiled: September 10, 2020Publication date: March 10, 2022Inventors: Kyle B. Snyder, Nathaniel P. Wyckoff, Brandon C. Hamilton, Bruce Rowenhorst, Steven J. Wiebers
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Patent number: 11239182Abstract: An integrated circuit (IC) package incorporating controlled induced warping is disclosed. The IC package includes an electronic substrate having an active side upon which semiconducting dies and functional circuits have been lithographed or otherwise fabricated, leading to an inherent warping in the direction of the active side. One or more corrective layers may be deposited to the opposing, or inactive, side of the semiconducting die via thin film deposition (TFD) instrumentation and techniques in order to induce corrective warping of the electronic substrate back toward the horizontal (e.g., in the direction of the inactive side) to a desired degree.Type: GrantFiled: January 23, 2020Date of Patent: February 1, 2022Assignee: Rockwell Collins, Inc.Inventors: Richard Korneisel, Nathaniel P. Wyckoff, Brandon C. Hamilton, Jacob R. Mauermann, Carlen R. Welty
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Patent number: 11236436Abstract: An integrated circuit (IC) package incorporating controlled induced warping is disclosed. The IC package includes an electronic substrate having an active side upon which semiconducting dies and functional circuits have been lithographed or otherwise fabricated, leading to an inherent warping in the direction of the active side. One or more corrective layers may be deposited to the opposing, or inactive, side of the semiconducting die via electroplating in order to induce corrective warping of the electronic substrate back toward the horizontal (e.g., in the direction of the inactive side) to a desired degree.Type: GrantFiled: September 10, 2020Date of Patent: February 1, 2022Assignee: Rockwell Collins, Inc.Inventors: Richard Korneisel, Nathaniel P. Wyckoff, Brandon C. Hamilton, Jacob R. Mauermann, Carlen R. Welty
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Patent number: 11233030Abstract: An electrical device with printed interconnects between packaged integrated circuit components and a substrate as well as a method for printing interconnects between packaged integrated circuit components and a substrate are disclosed. An electrical device with printed interconnects may include a dielectric layer forming a continuous surface between a substrate and a terminal face of an integrated circuit component. The electrical device may further include interconnects formed from a layer of material printed across the continuous surface formed by the dielectric layer to connect electrical terminals on the substrate to electrical terminals on the terminal face of the integrated circuit component.Type: GrantFiled: June 30, 2017Date of Patent: January 25, 2022Assignee: Rockwell Collins, Inc.Inventors: Brandon C. Hamilton, Kyle B. Snyder, Alan P. Boone
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Publication number: 20210233866Abstract: An integrated circuit (IC) package incorporating controlled induced warping is disclosed. The IC package includes an electronic substrate having an active side upon which semiconducting dies and functional circuits have been lithographed or otherwise fabricated, leading to an inherent warping in the direction of the active side. One or more corrective layers may be deposited to the opposing, or inactive, side of the semiconducting die via thin film deposition (TFD) instrumentation and techniques in order to induce corrective warping of the electronic substrate back toward the horizontal (e.g., in the direction of the inactive side) to a desired degree.Type: ApplicationFiled: January 23, 2020Publication date: July 29, 2021Inventors: Richard Korneisel, Nathaniel P. Wyckoff, Brandon C. Hamilton, Jacob R. Mauermann, Carlen R. Welty