Abstract: Disclosed is a system, method, and program for analyzing proposed interface ports to a device. For each proposed interface port, a determination is made of a number of single points of failure for the proposed interface port in common with interface ports currently used to access the device. For each proposed interface port, a determination is made of a relative availability rating based on the number of single points of failure for each proposed interface port.

Abstract: Disclosed is a system, method, and program for analyzing proposed interface ports to a device. Failure boundary data is read from the device indicating at least one failure boundary of a proposed interface to the device and a mask is accessed from the device. The accessed mask is applied to the failure boundary data for the proposed interface and existing interfaces to determine at least one failure boundary for the proposed interface and existing interfaces. A determination is made of a number of single points of failure for the proposed interface port from the determined failure boundaries the proposed interface has in common with interface ports currently used to access the device. A further determination is made of a relative availability rating based on the number of single points of failure for each proposed interface port.

Abstract: A method and apparatus for improving write performance in a disk array, wherein unnecessary track grouping is avoided during writes, by using a full track write counter. When a write request is received, the full track write counter for tracks in a stripe of tracks associated with the write request is analyzed to determine whether the write request involves a full track write. A cache destage is subsequently executed based on the analysis. When the write to cache is a full track write, a previous track full track count is fetched from a previous track's full write counter, a full track count of the tracks associated with the write request are set to be equal to the minimum of either the stripe width or the previous track's full track count plus one.

Abstract: Disclosed is a system and method for caching data. A processor receives data from a host to modify a track in a first storage device. The processor stores a copy of the modified data in a cache and indicates in a second storage device the tracks for which there is modified data in cache. During data recovery operations, the processor processes the second storage device and data therein to determine the tracks for which there was modified data in cache. The processor then marks the determined tracks as failed to prevent data at the determined tracks in the first storage device from being returned in response to a read request until the failure is resolved. In further embodiments, in response to detecting a partial failure within the storage system, the processor would scan the cache to determine tracks for which there is modified data stored in the cache.

Abstract: Provided is a method, system, and program for destaging data from a first computer readable medium to a second computer readable medium. A list of entries indicating data blocks in the first computer readable medium is scanned. For each entry scanned, a determination is made as to whether the data block indicated in the scanned entry satisfies a criteria. If the data block indicated in the scanned entry satisfies the criteria, then a destage operation is called to destage the data block in the scanned entry from the first computer readable medium to the second computer readable medium. If the called destage operation is not initiated, then the scanned entry is removed from the cache list. The removed scanned entry is added to one destage wait list. During one destage operation, data blocks indicated in entries in the destage wait list are destaged.

Abstract: Disclosed is a system and method for caching data. A processor receives data from a host to modify a track in a first storage device. The processor stores a copy of the modified data in a cache and indicates in a second storage device the tracks for which there is modified data in cache. During data recovery operations, the processor processes the second storage device and data therein to determine the tracks for which there was modified data in cache. The processor then marks the determined tracks as failed to prevent data at the determined tracks in the first storage device from being returned in response to a read request until the failure is resolved. In further embodiments, in response to detecting a partial failure within the storage system, the processor would scan the cache to determine tracks for which there is modified data stored in the cache.

Abstract: A method and system to verify the passage of one or more write commands sent from an originating location through a PCI bus system. An addressable data storage is located substantially at the end of the PCI bus system with respect to the originating location. A write command is sent by the originator subsequent to the one or more write commands, to a predetermined special end location address identifying the addressable storage. The command is accompanied by data comprising a predetermined special return address at the originating location. The PCI bus system transmits the write commands on a FIFO basis, so the one or more write commands precede the subsequently sent write command. Logic senses the subsequently sent write command, and responds to the command, sending a return echo write command to the predetermined special return address. The returning echo write command verifies the passage of the write commands and data through the PCI bus system.

Abstract: Disclosed is a method, system, and article of manufacture for managing meta data. The meta data provides information on data maintained in a storage device. The system receives a request for meta data from a process and determines whether the requested meta data is in cache. After determining that the requested meta data is not in cache, the system determines whether there are a sufficient number of allocatable segments in cache to stage in the meta data and allocates segments in cache to store the meta data after determining that there are enough allocatable segments in cache. The system stages the requested meta data into the allocated segments. Alternatively, after determining that the requested meta data is in cache, the system determines whether a second process has exclusive access to the meta data in cache. After determining that the second process does not have exclusive access, the system indicates to the first process that access to the meta data is permitted.

Abstract: In a PCI bus system, a method and system check for errors in rite data transferred from a PCI data source across a PCI bus to the PCI bus system, the data comprising a plurality of blocks. Redundancy calculation logic receives the write data across the PCI bus, calculates a check value for each block of the data transferred across the PCI bus, and updating any previously calculated check value with the calculated check value at a storage location of a storage memory. Data path logic is coupled to the PCI bus and to the storage memory, and responds to a unique identifier of a redundancy write command sent subsequent to completion of the transfer of the write data across the PCI interface. The data path logic responds to the write command unique identifier, detecting the updated calculated check value at the storage location of the storage memory.

Abstract: Provided is a method, system, and program for caching updates to one target storage device in a first and second memories, wherein the target storage device is one of a plurality of storage devices. A determination is made of an allocation of available space in the second memory to the storage devices, wherein a total of the allocation of the available space to all the storage devices exceeds one hundred percent of the available space in the second memory. An update to one target storage device is received and then a determination is made as to whether adding the update to the second memory will exceed the allocation of available space for the target storage device in the second memory. One copy of the update is written to the second memory if adding the update to the second memory will not exceed the allocation of available space for the target storage device.

Abstract: Disclosed is a system and method for caching data. A processor receives data from a host to modify a track in a first storage device. The processor stores a copy of the modified data in a cache and indicates in a second storage device the tracks for which there is modified data in cache. During data recovery operations, the processor processes the second storage device and data therein to determine the tracks for which there was modified data in cache. The processor then marks the determined tracks as failed to prevent data at the determined tracks in the first storage device from being returned in response to a read request until the failure is resolved. In further embodiments, in response to detecting a partial failure within the storage system, the processor would scan the cache to determine tracks for which there is modified data stored in the cache.

Abstract: Disclosed is a method, system, and article of manufacture for managing meta data. The meta data provides information on data maintained in a storage device. The system receives a request for meta data from a process and determines whether the requested meta data is in cache. After determining that the requested meta data is not in cache, the system determines whether there are a sufficient number of allocatable segments in cache to stage in the meta data and allocates segments in cache to store the meta data after determining that there are enough allocatable segments in cache. The system stages the requested meta data into the allocated segments. Alternatively, after determining that the requested meta data is in cache, the system determines whether a second process has exclusive access to the meta data in cache. After determining that the second process does not have exclusive access, the system indicates to the first process that access to the meta data is permitted.

Abstract: A shared bus hang prevention and recovery scheme for a data communication system is provided, where a shared bus is connected to a plurality of bus masters and corresponding slaves and located between an external bus connected to a system processor, and an internal bus connected to an internal processor. Some of the masters are associated with the external bus and others are associated with the internal bus, and one of the bus masters is a control master associated with the internal processor. The scheme utilizes a shared bus hang prevention and recovery device having a circuitry and a control code. The circuitry is timing each pending request of the control master for the shared bus and initiating bus recovery if the shared bus is hung up, when the control master exceeded a pre-determined time period allowed for waiting to acquire the shared bus control and complete the transfer on the shared bus.

Abstract: Disclosed is a method, system, and program for prestaging data into cache from a storage system in preparation for data transfer operations. A first processing unit communicates data transfer operations to a second processing unit that controls access to the storage system. The first processing unit determines addressable locations in the storage system of data to prestage into cache and generates a data structure capable of indicating contiguous and non-contiguous addressable locations addressable locations in the storage system including the data to prestage into the cache. The first processing unit transmits a prestage command to the second processing unit. The prestage command causes the second processing unit to prestage into cache the data at the addressable locations indicated in the data structure. The first processing unit then requests data at the addressable locations indicated in the data structure. In response, the second processing unit returns the requested data from the cache.

Abstract: Disclosed is a method, system, and article of manufacture for processing modified meta data for data recovery operations. The meta data provides information on user data maintained in a storage device. The system determines whether meta data tracks maintained in a cache were modified and indicates in a non-volatile memory that the determined meta data tracks were modified. Data recovery operations may be initiated as a result of a system failure, such as a warmstart or coldstart recovery. During such data recovery operations, the system processes the non-volatile memory and the indications of modified meta data tracks therein to rebuild lost meta data tracks in the cache.

Abstract: Disclosed is a method, system, and program for prestaging data into cache from a storage system in preparation for data transfer operations. A first processing unit communicates data transfer operations to a second processing unit that controls access to the storage system. The first processing unit determines addressable locations in the storage system of data to prestage into cache and generates a data structure capable of indicating contiguous and non-contiguous addressable locations addressable locations in the storage system including the data to prestage into the cache. The first processing unit transmits a prestage command to the second processing unit. The prestage command causes the second processing unit to prestage into cache the data at the addressable locations indicated in the data structure. The first processing unit then requests data at the addressable locations indicated in the data structure. In response, the second processing unit returns the requested data from the cache.

Abstract: Disclosed is a method, system, and article of manufacture for processing modified meta data for data recovery operations. The meta data provides information on user data maintained in a storage device. The system determines whether meta data tracks maintained in a cache were modified and indicates in a non-volatile memory that the determined meta data tracks were modified. Data recovery operations may be initiated as a result of a system failure, such as a warmstart or coldstart recovery. During such data recovery operations, the system processes the non-volatile memory and the indications of modified meta data tracks therein to rebuild lost meta data tracks in the cache.

Abstract: Disclosed is a method, system, and program for processing data access requests, such as read requests, to a storage location maintained in both a first storage, such as a cache, area and second storage area, such as a disk drive, during a destage operation. A destage operation is granted access to the storage location to destage data from the storage location in the first storage area to the second storage area. During the destage operation, a data access request is granted access to the storage location.

Abstract: Disclosed is a system for caching data. After determining a sequential access of a first memory area, such as a direct access storage device (DASD), a processing unit stages a group of data sets from the first memory area to a second memory, such as cache. The processing unit processes a data access request (DAR) for data sets in the first memory area that are included in the sequential access and reads the requested data sets from the second memory area. The processing unit determines trigger data set from a plurality of trigger data sets based on a trigger data set criteria. The processing unit then stages a next group of data sets from the first memory area to the second memory area in response to reading the determined trigger data set.

Abstract: A method and apparatus for improving write performance in a disk array is disclosed. The invention avoids unnecessary track grouping during writes by using a full track write counter. When a write request is received, the full track write counter for tracks in a stripe of tracks associated with the write request is analyzed, a determination of whether the write request involves a full track write is made and a cache destage is subsequently executed based on the analysis of the full track write counter for tracks in a stripe of tracks associated with the write request. The full track write counter is not incremented when the write to cache is not a full track write. When the write to cache is a full track write, a previous track full track count is fetched, a full track count of the tracks associated with the write request are set to be equal to the minimum of either the stripe width or the previous track's full track count plus 1.