Patents by Inventor Brent Cameron

Brent Cameron has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 5893918
    Abstract: A method for operating a controller for a plurality of direct access storage devices to minimize rotational misses during data transfer operations. Transferred data is staged into a controller cache when a rotational position sensing miss avoidance reconnection is made. Circumstances are detailed for qualifying an operation pending on direct access storage devices for treatment as miss avoidance candidates. Adjustment of controller response depending upon foreknowledge that a channel command word chain includes a write operation is also accomplished utilizing the present method.
    Type: Grant
    Filed: May 18, 1992
    Date of Patent: April 13, 1999
    Assignee: International Business Machines Corporation
    Inventors: Brent Cameron Beardsley, Michael Thomas Benhase, Susan Marie Wethington
  • Patent number: 5771367
    Abstract: An improved storage controller and method for storing and recovering data. The storage controller includes a first cluster for directing data from a host computer to a storage device and a second cluster for directing data from a host computer to a storage device. A first cache memory is connected to the first cluster and a second cache memory is connected to the second cluster. A first nonvolatile memory is connected to the second cluster and a second nonvolatile memory is connected to the first cluster. The first and second cache memories and the first and second nonvolatile stores are thus "cross-coupled" to the first and second clusters to provide improved data recovery capability. Data is directed to the first cache and backed up to the first nonvolatile memory in a first operational mode. In the event of failure of the first nonvolatile memory, data is recovered from the first cache memory.
    Type: Grant
    Filed: October 30, 1995
    Date of Patent: June 23, 1998
    Assignee: International Business Machines Corporation
    Inventors: Brent Cameron Beardsley, Lawrence Carter Blount, Gail Andrea Spear, Vern John Legvold
  • Patent number: 5721898
    Abstract: A method and system for enhancing the efficiency of communication between one or more host computers and a storage system controller during a data search within either the associated storage systems or within the storage system controller itself. A storage system controller, coupled to one or more host computers via multiple communication channels, is utilized to control access to one or more direct access storage devices. A host computer authorizes the storage system controller to search within a range of data locations within the storage system, sets an initial location from which the data search will begin, and specifies a key field argument to search for. The host computer then permits the storage system controller to independently search the authorized range of data locations within the storage system or within cache memory within the storage system controller.
    Type: Grant
    Filed: September 2, 1992
    Date of Patent: February 24, 1998
    Assignee: International Business Machines Corporation
    Inventors: Brent Cameron Beardsley, Michael Thomas Benhase, Lawrence Carter Blount, Susan Kay Candelaria, Joseph Smith Hyde
  • Patent number: 5694570
    Abstract: The invention teaches a system and method for temporarily buffering data written to a storage system by a host computer. The storage system includes direct access storage devices and a cache. The cache is used as the buffer for both caching and noncaching data records before destaging to a direct access storage device. Upon receipt of a channel program from a host computer containing data for records to be updated, the storage controller determines if the records are currently cached. If the records are not cached, a write miss has occurred. Upon a write miss the storage controller checks an attribute transmitted in the channel program to determine if the records have a regular format. Records having a known, regular format are buffered in cache until destaged by a background process.
    Type: Grant
    Filed: January 23, 1995
    Date of Patent: December 2, 1997
    Assignee: International Business Machines Corporation
    Inventors: Brent Cameron Beardsley, Susan Kay Candelaria, Joel Harvey Cord, Michael Howard Hartung, Joseph Smith Hyde, John Norbert McCauley, Jr.
  • Patent number: 5680580
    Abstract: A remote copy system incorporates dynamically modifiable ports on the storage controllers such that those ports can operate either as a control unit link-level facility or as a channel link-level facility. When configured as a channel link-level facility, a primary storage controller can appear as a host processor to a secondary storage controller. The primary storage controller can thereafter initiate multiple request connects (RQC) concurrently for servicing a single I/O request. In this manner, a first available path can be selected and system throughput thus improved since RQCs so not need to be sent serially from path to path looking for an available path.
    Type: Grant
    Filed: February 28, 1995
    Date of Patent: October 21, 1997
    Assignee: International Business Machines Corporation
    Inventors: Brent Cameron Beardsley, Roger Gregory Hathorn, Bret Wayne Holley, James Lincoln Iskiyan
  • Patent number: 5640530
    Abstract: A method and system for controlling data flow in a storage subsystem containing multiple cache and/or multiple NVS elements based on the operability of the cache arrays and NVS arrays. In a data processing system having a storage controller connecting a plurality of host processors and a plurality of storage devices, this invention provides a method and architecture for managing multiple storage elements within the controller, without a degradation in subsystem performance and without data integrity problems. A set of configuration registers is utilized by the microcontroller to direct cache and NVS access to the proper storage array. A configuration table is loaded with status information concerning the memory arrays at Initial Microcode Load(IML) and this information is periodically updated during controller operation.
    Type: Grant
    Filed: February 10, 1995
    Date of Patent: June 17, 1997
    Assignee: International Business Machines Corporation
    Inventors: Brent Cameron Beardsley, Ronald Robert Knowlden, Gail Andrea Spear