Patents by Inventor Brent S. Krusor

Brent S. Krusor has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 9912121
    Abstract: A device includes one or more reflector components. Each reflector component comprises layer pairs of epitaxially grown reflective layers and layers of a non-epitaxial material, such as air. Vias extend through at least some of the layers of the reflector components. The device may include a light emitting layer.
    Type: Grant
    Filed: May 9, 2016
    Date of Patent: March 6, 2018
    Assignee: PALO ALTO RESEARCH CENTER INCORPORATED
    Inventors: Thomas Wunderer, Christopher L. Chua, Brent S. Krusor, Noble M. Johnson
  • Publication number: 20170221795
    Abstract: Disclosed is an integrated circuit arrangement including a two sided circuit board, having a first surface and a second surface. A plurality of electrical conductors is incorporated as part of the two sided circuit board. An array of through holes extend through the first surface and the second surface, arranged in a pattern and are configured to provide a common electrical connection area, wherein the common electrical connection area is associated with a portion of a particular one of the plurality of electrical conductors.
    Type: Application
    Filed: January 29, 2016
    Publication date: August 3, 2017
    Applicant: Palo Alto Research Center Incorporated
    Inventors: Ping Mei, Brent S. Krusor, David K. Biegelsen
  • Publication number: 20170171958
    Abstract: Provided is a manufacturing process for electronic circuit components such as bare dies, and packaged integrated chips, among other configurations, to form electronic assemblies. The surface of the electronic circuit component carries electronic elements such as conductive traces and/or other configurations including contact pads. A method for forming an electronic assembly includes providing a tacky layer. Then an electronic circuit component is provided having a first side and a second side, where the first side carries the electronic elements. The first side of the electronic circuit component is positioned into contact with the tacky layer. A bonding material is then deposited to a portion of the adhesive layer that is not covered by the first side of the electronic circuit component, to a depth which is sufficient to cover at least a portion of the electronic circuit component. The bonding material is then fixed or cured into a fixed or cured bonding material, and the tacky layer is removed.
    Type: Application
    Filed: December 10, 2015
    Publication date: June 15, 2017
    Applicant: Palo Alto Research Center Incorporated
    Inventors: Tse Nga Ng, Ping Mei, Brent S. Krusor, Gregory L. Whiting, Steven E. Ready, Janos Veres
  • Patent number: 9577047
    Abstract: An article includes a support substrate bonded to heterostructure epitaxial layers that include one or more electronic devices. The support substrate has a bonding surface and the heterostructure epitaxial layers have a surface with the epitaxial growth direction of the heterostructure epitaxial layers towards the surface. The surface of the heterostructure epitaxial layers is bonded at the bonding surface of the support substrate by ion exchange between the surface of the heterostructure epitaxial layers and the bonding surface of the support substrate.
    Type: Grant
    Filed: July 10, 2015
    Date of Patent: February 21, 2017
    Assignee: PALO ALTO RESEARCH CENTER INCORPORATED
    Inventors: Christopher L. Chua, Qian Wang, Brent S. Krusor, JengPing Lu, Scott J. Limb
  • Publication number: 20170048986
    Abstract: Provided is a manufacturing process for electronic circuit components such as bare dies, and packaged integrated chips, among others, where the surface of the electronic circuit component is at the same level as the associated substrate, the surface of the electronic circuit component holding connection pads. A gap exists between the electronic circuit component, and the end of an opening within the substrate. This gap is filled with a filler material, such as a bonding material. The bonding material also used to encapsulate or bond together the back side of the substrate and electronic circuit component. During the manufacturing process, the front surface of the electronic circuit component (which includes the contact pads) and the front surface of the substrate which includes electronic circuitry are held in an adhesive relationship by a flat material having an upper surface which includes adhesive or sticky material (such as PDMS).
    Type: Application
    Filed: December 10, 2015
    Publication date: February 16, 2017
    Applicant: Palo Alto Research Center Incorporated
    Inventors: Ping Mei, Gregory L. Whiting, Brent S. Krusor
  • Publication number: 20170012101
    Abstract: An article includes a support substrate bonded to heterostructure epitaxial layers that include one or more electronic devices. The support substrate has a bonding surface and the heterostructure epitaxial layers have a surface with the epitaxial growth direction of the heterostructure epitaxial layers towards the surface. The surface of the heterostructure epitaxial layers is bonded at the bonding surface of the support substrate by ion exchange between the surface of the heterostructure epitaxial layers and the bonding surface of the support substrate.
    Type: Application
    Filed: July 10, 2015
    Publication date: January 12, 2017
    Inventors: Christopher L. Chua, Qian Wang, Brent S. Krusor, JengPing Lu, Scott J. Limb
  • Patent number: 9486996
    Abstract: A process including selecting a printing system; selecting an ink composition having ink properties that match the printing system; depositing the ink composition onto a substrate to form an image, to form deposited features, or a combination thereof; optionally, heating the deposited features to form conductive features on the substrate; and performing a post-printing treatment after depositing the ink composition.
    Type: Grant
    Filed: February 25, 2015
    Date of Patent: November 8, 2016
    Assignees: Xerox Corporation, Palo Alto Research Center Incorporated
    Inventors: Tse Nga Ng, Brent S. Krusor, Adela Goredema, Yiliang Wu
  • Publication number: 20160254648
    Abstract: A device includes one or more reflector components. Each reflector component comprises layer pairs of epitaxially grown reflective layers and layers of a non-epitaxial material, such as air. Vias extend through at least some of the layers of the reflector components. The device may include a light emitting layer.
    Type: Application
    Filed: May 9, 2016
    Publication date: September 1, 2016
    Inventors: Thomas Wunderer, Christopher L. Chua, Brent S. Krusor, Noble M. Johnson
  • Publication number: 20160243816
    Abstract: A process including selecting a printing system; selecting an ink composition having ink properties that match the printing system; depositing the ink composition onto a substrate to form an image, to form deposited features, or a combination thereof; optionally, heating the deposited features to form conductive features on the substrate; and performing a post-printing treatment after depositing the ink composition.
    Type: Application
    Filed: February 25, 2015
    Publication date: August 25, 2016
    Inventors: Tse Nga Ng, Brent S. Krusor, Adela Goredema, Yiliang Wu
  • Patent number: 9335262
    Abstract: A device includes one or more reflector components. Each reflector component comprises layer pairs of epitaxially grown reflective layers and layers of a non-epitaxial material, such as air. Vias extend through at least some of the layers of the reflector components. The device may include a light emitting layer.
    Type: Grant
    Filed: August 25, 2011
    Date of Patent: May 10, 2016
    Assignee: PALO ALTO RESEARCH CENTER INCORPORATED
    Inventors: Thomas Wunderer, Christopher L. Chua, Brent S. Krusor, Noble M. Johnson
  • Patent number: 9064980
    Abstract: One or more layers are epitaxially grown on a bulk crystalline AlN substrate. The epitaxial layers include a surface which is the initial surface of epitaxial growth of the epitaxial layers. The AlN substrate is substantially removed over a majority of the initial surface of epitaxial growth.
    Type: Grant
    Filed: August 25, 2011
    Date of Patent: June 23, 2015
    Assignee: PALO ALTO RESEARCH CENTER INCORPORATED
    Inventors: Christopher L. Chua, Brent S. Krusor, Thomas Wunderer, Noble M. Johnson
  • Patent number: 8908161
    Abstract: Approaches for substantially removing bulk aluminum nitride (AlN) from one or more layers epitaxially grown on the bulk AlN are discussed. The bulk AlN is exposed to an etchant during an etching process. During the etching process, the thickness of the bulk AlN can be measured and used to control etching.
    Type: Grant
    Filed: August 25, 2011
    Date of Patent: December 9, 2014
    Assignee: Palo Alto Research Center Incorporated
    Inventors: Brent S. Krusor, Christopher L. Chua, Thomas Wunderer, Noble M. Johnson, Bowen Cheng
  • Patent number: 8796112
    Abstract: A method of forming a three-dimensional electronic device includes forming at least one electronic device on a two-dimensional, flexible substrate, the electronic device being formed according to a three-dimensional structure, cutting the two-dimensional, flexible substrate, the cuts being located to allow the two-dimensional substrate to be shaped, the cuts having at least one stress relief feature, and shaping the two-dimensional, flexible substrate to form the three-dimensional structure, the stress relief features arranged to alleviate stress in the three-dimensional structure.
    Type: Grant
    Filed: June 28, 2013
    Date of Patent: August 5, 2014
    Assignee: Palo Alto Research Center Incorporated
    Inventors: William S. Wong, Brent S. Krusor, Robert A. Street
  • Publication number: 20140000108
    Abstract: A method of forming a three-dimensional electronic device includes forming at least one electronic device on a two-dimensional, flexible substrate, the electronic device being formed according to a three-dimensional structure, cutting the two-dimensional, flexible substrate, the cuts being located to allow the two-dimensional substrate to be shaped, the cuts having at least one stress relief feature, and shaping the two-dimensional, flexible substrate to form the three-dimensional structure, the stress relief features arranged to alleviate stress in the three-dimensional structure.
    Type: Application
    Filed: June 28, 2013
    Publication date: January 2, 2014
    Inventors: WILLIAM S. WONG, BRENT S. KRUSOR, ROBERT A. STREET
  • Patent number: 8492876
    Abstract: A method of forming a three-dimensional electronic device includes forming at least one electronic device on a two-dimensional, flexible substrate, the electronic device being formed according to a three-dimensional structure, cutting the two-dimensional, flexible substrate, the cuts being located to allow the two-dimensional substrate to be shaped, the cuts having at least one stress relief feature, and shaping the two-dimensional, flexible substrate to form the three-dimensional structure, the stress relief features arranged to alleviate stress in the three-dimensional structure.
    Type: Grant
    Filed: October 17, 2008
    Date of Patent: July 23, 2013
    Assignee: Palo Alto Research Center Incorporated
    Inventors: William S. Wong, Brent S. Krusor, Robert A. Street
  • Publication number: 20130050686
    Abstract: A device includes one or more reflector components. Each reflector component comprises layer pairs of epitaxially grown reflective layers and layers of a non-epitaxial material, such as air. Vias extend through at least some of the layers of the reflector components. The device may include a light emitting layer.
    Type: Application
    Filed: August 25, 2011
    Publication date: February 28, 2013
    Applicant: PALO ALTO RESEARCH CENTER INCORPORATED
    Inventors: Thomas Wunderer, Christopher L. Chua, Brent S. Krusor, Noble M. Johnson
  • Publication number: 20130049005
    Abstract: One or more layers are epitaxially grown on a bulk crystalline AlN substrate. The epitaxial layers include a surface which is the initial surface of epitaxial growth of the epitaxial layers. The AlN substrate is substantially removed over a majority of the initial surface of epitaxial growth.
    Type: Application
    Filed: August 25, 2011
    Publication date: February 28, 2013
    Applicant: PALO ALTO RESEARCH CENTER INCORPORATED
    Inventors: Christopher L. Chua, Brent S. Krusor, Thomas Wunderer, Noble M. Johnson
  • Publication number: 20130052758
    Abstract: Approaches for substantially removing bulk aluminum nitride (AlN) from one or more layers epitaxially grown on the bulk AlN are discussed. The bulk AlN is exposed to an etchant during an etching process. During the etching process, the thickness of the bulk AlN can be measured and used to control etching.
    Type: Application
    Filed: August 25, 2011
    Publication date: February 28, 2013
    Applicant: PALO ALTO RESEARCH CENTER INCORPORATED
    Inventors: Brent S. Krusor, Christopher L. Chua, Thomas Wunderer, Noble M. Johnson, Bowen Cheng
  • Patent number: 8137900
    Abstract: An electrophoretic display device includes a multiplicity of individual reservoirs containing a display medium between conductive substrates, at least one of which is transparent, wherein the display medium includes one or more set of colored particles in a dielectric fluid, and wherein the multiplicity of individual reservoirs are defined by a unitary grid whose walls segregate the reservoirs. The gird may be formed via photolithography or from a master stamp derived from a mold of the grid pattern.
    Type: Grant
    Filed: May 14, 2008
    Date of Patent: March 20, 2012
    Assignee: Xerox Corporation
    Inventors: Naveen Chopra, Jurgen H. Daniel, Brent S. Krusor, San-Ming Yang, Peter M. Kazmaier, Gabriel Iftime
  • Publication number: 20100096729
    Abstract: A method of forming a three-dimensional electronic device includes forming at least one electronic device on a two-dimensional, flexible substrate, the electronic device being formed according to a three-dimensional structure, cutting the two-dimensional, flexible substrate, the cuts being located to allow the two-dimensional substrate to be shaped, the cuts having at least one stress relief feature, and shaping the two-dimensional, flexible substrate to form the three-dimensional structure, the stress relief features arranged to alleviate stress in the three-dimensional structure.
    Type: Application
    Filed: October 17, 2008
    Publication date: April 22, 2010
    Applicant: Palo Alto Research Center Incorporated
    Inventors: William S. Wong, Brent S. Krusor, Robert A. Street