Patents by Inventor Bret Street

Bret Street has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20050007141
    Abstract: Flip-chip semiconductor assemblies, each including integrated circuit (IC) dice and an associated substrate, are electrically tested before encapsulation using an in-line or in-situ test socket or probes at a die-attach station. Those assemblies using “wet” quick-cure epoxies for die attachment may be tested prior to the epoxy being cured by pressing the integrated circuit (IC) dice against interconnection points on the substrate for electrical connection, while those assemblies using “dry” epoxies may be cured prior to testing. In either case, any failures in the dice or in the interconnections between the dice and the substrates can be easily fixed, and the need for the use of known-good-die (KGD) rework procedures during repair is eliminated.
    Type: Application
    Filed: July 27, 2004
    Publication date: January 13, 2005
    Inventors: Chad Cobbley, John VanNortwick, Bret Street, Tongbi Jiang
  • Publication number: 20050007142
    Abstract: Flip-chip semiconductor assemblies, each including integrated circuit (IC) dice and an associated substrate, are electrically tested before encapsulation using an in-line or in-situ test socket or probes at a die-attach station. Those assemblies using “wet” quick-cure epoxies for die attachment may be tested prior to the epoxy being cured by pressing the integrated circuit (IC) dice against interconnection points on the substrate for electrical connection, while those assemblies using “dry” epoxies may be cured prior to testing. In either case, any failures in the dice or in the interconnections between the dice and the substrates can be easily fixed, and the need for the use of known-good-die (KGD) rework procedures during repair is eliminated.
    Type: Application
    Filed: July 27, 2004
    Publication date: January 13, 2005
    Inventors: Chad Cobbley, John VanNortwick, Bret Street, Tongbi Jiang
  • Patent number: 6833510
    Abstract: Semiconductor package support elements including cover members attached to one or more reject die sites are provided. Methods for making the support elements of the present invention and for making semiconductor packages using the same are also provided. Reject die sites on defective substrates of a support element are covered prior to the encapsulation process using a cover member. The cover member comprises, for example, pressure-sensitive or temperature-activated tape, reject dies, or the like. The support elements and methods of the present invention virtually eliminate bleeding or flashing during encapsulation due to the presence of reject die sites. The support elements and methods of the present invention further ensure that functional dice are not sacrificed by being attached to reject die sites, thereby decreasing manufacturing costs while increasing yield of functional semiconductor packages.
    Type: Grant
    Filed: October 4, 2001
    Date of Patent: December 21, 2004
    Assignee: Micron Technology, Inc.
    Inventors: Casey Prindiville, Tongbi Jiang, Bret Street
  • Patent number: 6779258
    Abstract: Semiconductor package support elements including cover members attached to one or more reject die sites are provided. Methods for making the support elements of the present invention and for making semiconductor packages using the same are also provided. Reject die sites on defective substrates of a support element are covered prior to the encapsulation process using a cover member. The cover member comprises, for example, pressure-sensitive or temperature-activated tape, reject dies, or the like. The support elements and methods of the present invention virtually eliminate bleeding or flashing during encapsulation due to the presence of reject die sites. The support elements and methods of the present invention further ensure that functional dice are not sacrificed by being attached to reject die sites, thereby decreasing manufacturing costs while increasing yield of functional semiconductor packages.
    Type: Grant
    Filed: October 4, 2001
    Date of Patent: August 24, 2004
    Assignee: Micron Technology, Inc.
    Inventors: Casey Prindiville, Tongbi Jiang, Bret Street
  • Patent number: 6548764
    Abstract: Semiconductor package support elements including cover members attached to one or more reject die sites are provided. Methods for making the support elements of the present invention and for making semiconductor packages using the same are also provided. Reject die sites on defective substrates of a support element are covered prior to the encapsulation process using a cover member. The cover member comprises, for example, pressure-sensitive or temperature-activated tape, reject dies, or the like. The support elements and methods of the present invention virtually eliminate bleeding or flashing during encapsulation due to the presence of reject die sites. The support elements and methods of the present invention further ensure that functional dice are not sacrificed by being attached to reject die sites, thereby decreasing manufacturing costs while increasing yield of functional semiconductor packages.
    Type: Grant
    Filed: June 7, 2000
    Date of Patent: April 15, 2003
    Assignee: Micron Technology, Inc.
    Inventors: Casey Prindiville, Tongbi Jiang, Bret Street
  • Publication number: 20020043401
    Abstract: Semiconductor package support elements including cover members attached to one or more reject die sites are provided. Methods for making the support elements of the present invention and for making semiconductor packages using the same are also provided. Reject die sites on defective substrates of a support element are covered prior to the encapsulation process using a cover member. The cover member comprises, for example, pressure-sensitive or temperature-activated tape, reject dies, or the like. The support elements and methods of the present invention virtually eliminate bleeding or flashing during encapsulation due to the presence of reject die sites. The support elements and methods of the present invention further ensure that functional dice are not sacrificed by being attached to reject die sites, thereby decreasing manufacturing costs while increasing yield of functional semiconductor packages.
    Type: Application
    Filed: October 4, 2001
    Publication date: April 18, 2002
    Applicant: Micron Technology, Inc.
    Inventors: Casey Prindiville, Tongbi Jiang, Bret Street
  • Publication number: 20020030575
    Abstract: Semiconductor package support elements including cover members attached to one or more reject die sites are provided. Methods for making the support elements of the present invention and for making semiconductor packages using the same are also provided. Reject die sites on defective substrates of a support element are covered prior to the encapsulation process using a cover member. The cover member comprises, for example, pressure-sensitive or temperature-activated tape, reject dies, or the like. The support elements and methods of the present invention virtually eliminate bleeding or flashing during encapsulation due to the presence of reject die sites. The support elements and methods of the present invention further ensure that functional dice are not sacrificed by being attached to reject die sites, thereby decreasing manufacturing costs while increasing yield of functional semiconductor packages.
    Type: Application
    Filed: October 4, 2001
    Publication date: March 14, 2002
    Applicant: Micron Technology, Inc.
    Inventors: Casey Prindiville, Tongbi Jiang, Bret Street
  • Publication number: 20020020908
    Abstract: Semiconductor package support elements including cover members attached to one or more reject die sites are provided. Methods for making the support elements of the present invention and for making semiconductor packages using the same are also provided. Reject die sites on defective substrates of a support element are covered prior to the encapsulation process using a cover member. The cover member comprises, for example, pressure sensitive or temperature-activated tape, reject dies, or the like. The support elements and methods of the present invention virtually eliminate bleeding or flashing during encapsulation due to the presence of reject die sites. The support elements and methods of the present invention further ensure that functional dice are not sacrificed by being attached to reject die sites, thereby decreasing manufacturing costs while increasing yield of functional semiconductor packages.
    Type: Application
    Filed: October 4, 2001
    Publication date: February 21, 2002
    Applicant: Micron Technology, Inc.
    Inventors: Casey Prindiville, Tongbi Jiang, Bret Street
  • Publication number: 20020020902
    Abstract: Semiconductor package support elements including cover members attached to one or more reject die sites are provided. Methods for making the support elements of the present invention and for making semiconductor packages using the same are also provided. Reject die sites on defective substrates of a support element are covered prior to the encapsulation process using a cover member. The cover member comprises, for example, pressure-sensitive or temperature-activated tape, reject dies, or the like. The support elements and methods of the present invention virtually eliminate bleeding or flashing during encapsulation due to the presence of reject die sites. The support elements and methods of the present invention further ensure that functional dice are not sacrificed by being attached to reject die sites, thereby decreasing manufacturing costs while increasing yield of functional semiconductor packages.
    Type: Application
    Filed: October 4, 2001
    Publication date: February 21, 2002
    Applicant: Micron Technology, Inc.
    Inventors: Casey Prindiville, Tongbi Jiang, Bret Street