Patents by Inventor Brett ARNOLD

Brett ARNOLD has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 9013011
    Abstract: A staggered die MEMS package includes a substrate having a converter cavity formed therein. A converter electronic component is mounted within the converter cavity. Further, a MEMS electronic component is mounted to both the substrate and the converter electronic component in a staggered die arrangement. By staggering the MEMS electronic component directly on the converter electronic component instead of locating the MEMS electronic component in a side by side arrangement with the converter electronic component, the total package width of the staggered die MEMS package is minimized. Further, by locating the converter electronic component within the converter cavity and staggering the MEMS electronic component directly on the converter electronic component, the total package height, sometimes called Z-height, of the staggered die MEMS package is minimized.
    Type: Grant
    Filed: March 11, 2011
    Date of Patent: April 21, 2015
    Assignee: Amkor Technology, Inc.
    Inventors: Bob Shih-Wei Kuo, Brett Arnold Dunlap, Louis B. Troche, Jr., Ahmer Syed, Russell Shumway
  • Patent number: 8941250
    Abstract: A redistribution pattern is formed on active surfaces of electronic components while still in wafer form. The redistribution pattern routes bond pads of the electronic components to redistribution pattern terminals on the active surfaces of the electronic components. The bond pads are routed to the redistribution pattern terminals while still in wafer form, which is a low cost and high throughput process, i.e., very efficient process.
    Type: Grant
    Filed: February 17, 2014
    Date of Patent: January 27, 2015
    Inventors: Robert Francis Darveaux, Brett Arnold Dunlap, Ronald Patrick Huemoeller
  • Patent number: 8937381
    Abstract: A fan out buildup substrate stackable package includes an electronic component having an active surface having bond pads. A package body encloses the electronic component. A first die side buildup dielectric layer is applied to the active surface of the electronic component and to a first surface of the package body. A first die side circuit pattern is formed on the first die side buildup dielectric layer and electrically connected to the bond pads. Through vias extend through the package body and the first die side buildup dielectric layer, the through vias being electrically connected to the first die side circuit pattern. The fan out buildup substrate stackable package is extremely thin and provides a high density interconnect on both sides of the package allowing additional devices to be stacked thereon.
    Type: Grant
    Filed: December 3, 2009
    Date of Patent: January 20, 2015
    Assignee: Amkor Technology, Inc.
    Inventors: Brett Arnold Dunlap, Alexander William Copia
  • Patent number: 8753730
    Abstract: A method of fabricating a plurality of electronic component packages includes coupling a tape to a panel. Electronic components are coupled to the tape and encapsulated to form a molded wafer. The molded wafer is mechanically separated from the panel without heating by breaking a mechanical separation adhesive of the tape. By mechanically separating the molded wafer from the panel without heating, warpage of the molded wafer associated with heating is avoided.
    Type: Grant
    Filed: November 19, 2012
    Date of Patent: June 17, 2014
    Inventors: Brett Arnold Dunlap, Robert Francis Darveaux
  • Patent number: 8653674
    Abstract: A redistribution pattern is formed on active surfaces of electronic components while still in wafer form. The redistribution pattern routes bond pads of the electronic components to redistribution pattern terminals on the active surfaces of the electronic components. The bond pads are routed to the redistribution pattern terminals while still in wafer form, which is a low cost and high throughput process, i.e., very efficient process.
    Type: Grant
    Filed: September 15, 2011
    Date of Patent: February 18, 2014
    Inventors: Robert Francis Darveaux, Brett Arnold Dunlap, Ronald Patrick Huemoeller
  • Patent number: 8535961
    Abstract: A method of forming a light emitting diode (LED) package includes mounting a LED structure to a carrier, overmolding the LED structure in a package body, backgrinding the package body to expose the LED structure, removing the carrier, and forming a redistribution layer (RDL) buildup structure comprising a RDL circuit pattern coupled to a LED of the LED structure. The LED package is formed without a substrate in one embodiment. By forming the LED package without a substrate, the thickness of the LED package is minimized. Further, by forming the LED package without a substrate, heat removal from the LED is maximized as is electrical performance. Further still, by forming the LED package without a substrate, the fabrication cost of the LED package is minimized.
    Type: Grant
    Filed: December 9, 2010
    Date of Patent: September 17, 2013
    Assignee: Amkor Technology, Inc.
    Inventors: Bob Shih-Wei Kuo, Brett Arnold Dunlap, David Bolognia
  • Patent number: 8337657
    Abstract: A method of fabricating a plurality of electronic component packages includes coupling a tape to a panel. Electronic components are coupled to the tape and encapsulated to form a molded wafer. The molded wafer is mechanically separated from the panel without heating by breaking a mechanical separation adhesive of the tape. By mechanically separating the molded wafer from the panel without heating, warpage of the molded wafer associated with heating is avoided.
    Type: Grant
    Filed: October 27, 2010
    Date of Patent: December 25, 2012
    Assignee: Amkor Technology, Inc.
    Inventors: Brett Arnold Dunlap, Robert Francis Darveaux