Patents by Inventor Brian A. Day

Brian A. Day has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 7496691
    Abstract: A method and circuit for enhancing the performance in a serial ATA interface uses a standard ATA queue automation circuitry that handles all the transmit/receive frame information structure (FIS) operations for ATA queue commands without interrupting the higher-level software and associated hardware, firmware, and drivers. If the standard ATA queue automation circuitry and command queues are not provided, then every FIS operation will interrupt the higher layer application program. The standard ATA queuing automation circuit preprocesses higher layer commands to write into the task file registers before initiating the transport layer for an FIS transmission and provides information regarding the success or failure of a command. Commands to be executed and completion command queues are preferably used to improve the performance further.
    Type: Grant
    Filed: July 28, 2003
    Date of Patent: February 24, 2009
    Assignee: LSI Corporation
    Inventors: Vetrivel Ayyavu, Brian A. Day, Ganesan Viswanathan
  • Publication number: 20080162773
    Abstract: Apparatus and methods for enabling multiple, unidirectional, virtual connections between a first SAS device and multiple other SAS devices in a SAS domain. An enhanced first SAS device may be substantially simultaneously coupled to each of two other SAS devices through one or more appropriately enhanced SAS expanders to allow substantially simultaneous unidirectional virtual connections from the first SAS device to both of the second and third SAS devices. Each virtual connection is, in essence, a half-duplex connection such that the first device is transmitting information to a second SAS device substantially simultaneous with the first device receiving information from a third SAS device. The enhancements are provided in a manner to allow backward compatibility with current SAS specifications for connectivity among devices not suitably enhanced in accordance with features and aspects hereof (e.g., with legacy devices).
    Type: Application
    Filed: March 6, 2007
    Publication date: July 3, 2008
    Inventors: Roger T. Clegg, Brian Day
  • Publication number: 20080113956
    Abstract: The present invention relates, in general, to a method of modulating physiological and pathological processes and, in particular, to a method of modulating cellular levels of oxidants and thereby processes in which such oxidants are a participant. The invention also relates to compounds and compositions suitable for use in such methods.
    Type: Application
    Filed: January 17, 2008
    Publication date: May 15, 2008
    Inventors: Irwin Fridovich, Ines Batinic-Haberle, James Crapo, Brian Day
  • Patent number: 7370139
    Abstract: Methods and structures for efficiently storing task file information for a significant number of SATA devices coupled to a SATA storage controller. A RAM memory within the SATA storage controller may store task file information for virtually any number of SATA devices coupled to a SAS communication domain. An arbiter and multiplexing logic is coupled to multiple client logic blocks or processes of the controller each operable to control one or more corresponding SATA devices. The arbiter and associated multiplexing logic grants each client process an opportunity to control its corresponding devices by retrieving saved state information from the task file RAM storage.
    Type: Grant
    Filed: November 19, 2004
    Date of Patent: May 6, 2008
    Assignee: LSI Logic Corporation
    Inventors: Patrick R. Bashford, Brian A. Day
  • Publication number: 20080085883
    Abstract: The present invention relates, in one embodiment, to a method of preventing or treating diabetes using low molecular weight antioxidants. In a further embodiment, the invention relates to a method of protecting and/or enhancing viability of cells/tissues/organs during isolation (harvesting), preservation, expansion and/or transplantation. In yet another embodiment, the present invention relates to a method of inducing immune tolerance. The invention also relates to compounds and compositions suitable for use in such methods.
    Type: Application
    Filed: September 19, 2007
    Publication date: April 10, 2008
    Applicants: AEOLUS SCIENCES, INC., National Jewish Medical and Research Center, University of Colorado Health Sciences Center, Children's Hospital of Pittsburgh
    Inventors: Jon PIGANELLI, Kathryn HASKINS, Sonia FLORES, James CRAPO, Brian DAY, Ronald GILL, Richard GAMMANS, Manisha PATEL
  • Patent number: 7346742
    Abstract: Methods and associated structures for bypassing virtual memory and memory mapping management features provided in a memory controller applied to simpler computing applications. In one aspect hereof, simpler, embedded computing applications may utilize standard memory controllers including cash management and memory component interfacing features but may bypass virtual memory management features within the same memory controller component. Rather, features and aspects hereof intercept memory accesses generated by the memory controller for address translation features and perform simpler address substitution to apply an appropriate translated address to the system bus.
    Type: Grant
    Filed: November 18, 2004
    Date of Patent: March 18, 2008
    Assignee: LSI Logic Corporation
    Inventors: Brian A. Day, Bradley Dean Besmer, Jana Lynn Richards
  • Patent number: 7334042
    Abstract: Methods and structures for managing connection requests within a SAS controller operating as an initiator device. A SAS initiator device maintains a table of information regarding known SAS devices in the SAS domain. An index value is used by each of a plurality of link layer processing elements in the SAS controller to access information in the table. The index value is fewer bits than the complete eight byte SAS address and the logic to manipulate and compare the index value is therefore simpler than that required to directly manipulate a full SAS address. Further, the information table is shared by each of the link layer processing elements to further reduce complexity from replication of circuits and logic in the SAS controller.
    Type: Grant
    Filed: August 18, 2004
    Date of Patent: February 19, 2008
    Assignee: LSI Logic Corporation
    Inventors: Brian A. Day, Silvia Jaeckel
  • Patent number: 7330989
    Abstract: The present invention is directed to a method and apparatus of automatic power management control for a Serial ATA interface that utilizes a combination of IOP control and specialized hardware control. The method may include steps as follows. It is determined, preferably based on a value of the Automate bit in a Task File Ram of a Serial ATA interface, whether a Serial ATA device of the Serial ATA interface is being controlled via the IOP or controlled by the specialized Serial ATA automation hardware. When the Serial ATA device is controlled via the IOP, the IOP may decide when to power up/down the Serial ATA interface. When the Serial ATA device is controlled by the specialized Serial ATA automation hardware, the method may proceed as follows. An idle or active condition of a Serial ATA interface utilizing a combination of IOP control and specialized hardware control is then automatically detected.
    Type: Grant
    Filed: July 29, 2004
    Date of Patent: February 12, 2008
    Assignee: LSI Logic Corporation
    Inventors: Patrick R. Bashford, Brian A. Day, Vetrivel Ayyavu, Ganesan Viswanathan
  • Patent number: 7299384
    Abstract: A method and mechanism for managing dynamically allocated memory. Portions of memory which are available for allocation have additional information stored in association with each portion which indicates whether the portion has been previously identified as being prematurely freed. In addition, a checksum is stored with each portion of memory. In response to a request for deallocation of a portion of memory, the portion of memory is not deallocated if it is identified as having been prematurely freed. Otherwise, the a checksum is calculated for the portion and it is freed. In response to an allocation request, a candidate portion of memory is identified for allocation and a checksum is calculated for the candidate portion. If the calculated checksum does not match a checksum previously stored for the candidate portion, the portion is identified as having been prematurely freed and is not returned for allocation.
    Type: Grant
    Filed: August 17, 2004
    Date of Patent: November 20, 2007
    Assignee: Symantec Operating Corporation
    Inventors: Gustavo Rodriguez-Rivera, Michael P. Spertus, Charles Fiterman, Jim Polubinski, Brian Day, Daryl Hoyt, Christopher D. Metcalf
  • Patent number: 7296094
    Abstract: Disclosed is a system using a SAS host controller and SAS expanders to control multiple SATA end devices where the memory contained on the SAS host controller is fixed to ease the cost and power consumption of the SAS host controller device, but where there is an expanded ability to support additional SATA end devices by configuring the allowed native command queue depth to be smaller for each SATA end device, thus allowing more SATA end devices to be supported by a single SAS host controller. An embodiment of the invention has three possible preset configuration states: thirty-two SATA end devices with a native command queue depth of thirty-two; sixty-four SATA end devices with a native command queue depth of sixteen; and one-hundred-twenty-eight SATA end devices with a native command queue depth of eight.
    Type: Grant
    Filed: August 20, 2004
    Date of Patent: November 13, 2007
    Assignee: LSI Corporation
    Inventors: Patrick R. Bashford, Brian A. Day, Jeffrey M. Rogers
  • Publication number: 20070197496
    Abstract: The present invention relates, in general, to a method of modulating physiological and pathological processes and, in particular, to a method of modulating cellular levels of oxidants and thereby processes in which such oxidants are a participant. The invention also relates to compounds and compositions suitable for use in such methods.
    Type: Application
    Filed: June 16, 2006
    Publication date: August 23, 2007
    Inventors: James Crapo, Brian Day, Michael Trova, Polvina Gauuan, Douglas Kitchen, Irwin Fridovich, Ines Batinic-Haberle
  • Patent number: 7259584
    Abstract: Methods and apparatus for selectively allowing and disallowing changes to an impedance control signal applied to bus driver circuits coupling a device or system to a common, shared bus where impedance of the bus may vary over time. Well known impedance sensing circuits may be coupled to a common bus, such as a PCI bus, and may be used to generate an impedance control signal to be applied to well-known bus driver circuits, including, for example, PCI bus driver circuits, to vary the drive level of such bus driver circuits in accordance with the present electrical impedance sensed on the bus. Features and aspects hereof permit selectively allowing and disallowing changes to such impedance control signals as applied to the driver circuits based upon the present state of the bus and/or the present state of signals driven on the bus by the system embodying the features and aspects hereof.
    Type: Grant
    Filed: February 18, 2005
    Date of Patent: August 21, 2007
    Assignee: LSI Corporation
    Inventors: Brian Day, Richard Solomon
  • Patent number: 7254732
    Abstract: The present invention is directed to a method and apparatus of automatic power management control for a Serial ATA device directly attached to a SAS/SATA host controller. In an exemplary aspect of the present invention, it is determined whether a Serial ATA device is directly attached to a SAS/SATA host controller without using a SAS expander. When it is determined that the Serial ATA device is directly attached to the SAS/SATA host controller, an idle or active condition of a Serial ATA interface including the Serial ATA device and the SAS/SATA host controller is automatically detected. When the Serial ATA interface is in an idle condition, idle time of the Serial ATA interface is measured using a power down counter whose frequency is determined by a programmable register based on an input clock. When a power down counter value is equal to a first value, a request for a Partial power state is asserted, and Serial ATA interface is put into a Partial power state.
    Type: Grant
    Filed: July 29, 2004
    Date of Patent: August 7, 2007
    Assignee: LSI Corporation
    Inventors: Patrick R. Bashford, Brian A. Day, Vetrivel Ayyavu, Ganesan Viswanathan
  • Publication number: 20070179124
    Abstract: The present invention relates, in general, to a method of modulating physiological and pathological processes and, in particular, to a method of modulating cellular levels of oxidants and thereby processes in which such oxidants are a participant. The invention also relates to compounds and compositions suitable for use in such methods.
    Type: Application
    Filed: September 15, 2006
    Publication date: August 2, 2007
    Inventors: Irwin Fridovich, Ines Batinic-Haberle, James Crapo, Brian Day
  • Publication number: 20070149498
    Abstract: The present invention relates, in general, to cancer therapy, and, in particular, to a method of preventing or treating cancer using low molecular weight antioxidants (e.g., mimetics of superoxide dismutase (SOD)) as the active agent or as a chemo- and/or radio-protectant. The invention also relates to compounds and compositions suitable for use in such a method.
    Type: Application
    Filed: November 9, 2006
    Publication date: June 28, 2007
    Applicants: Aeolus Sciences, Inc., National Jewish Medical and Research Center, Duke University
    Inventors: James Crapo, Brian Day, Ines Batinic-Haberle, Richard Gammans, Zeljko Vusjaskovic
  • Patent number: 7171500
    Abstract: Methods and structures for managing connection requests within a SAS controller operating as a target device. A SAS target device maintains a table of information regarding known SAS initiator devices in the SAS domain. An index value is supplied in transport layer requests and used by each of a plurality of link layer processing elements in the SAS controller to access information in the table. The index value is fewer bits than the complete eight byte SAS address and the logic to manipulate and compare the index value is therefore simpler than that required to directly manipulate a full SAS address. Further, the information table is shared by each of the link layer processing elements to further reduce complexity from replication of circuits and logic in the SAS controller.
    Type: Grant
    Filed: August 18, 2004
    Date of Patent: January 30, 2007
    Assignee: LSI Logic Corporation
    Inventors: Brian A. Day, Silvia Jaeckel
  • Publication number: 20070014723
    Abstract: The present invention concerns methods and compositions for making and using Be complexes of defined compositions, which may have multiple functionalities and/or binding specificities. In various embodiment, Beryllium (Be) complexes may include Be such as 10Be and 7Be complexes. Such complexes find use in a wide variety of applications, particularly in the field of treatment, detection and/or diagnosis of infections, diseases and other health-related conditions, including but not limited to cancer, autoimmune disease, cardiovascular disease, metabolic diseases, degenerative diseases, and organ transplant rejection.
    Type: Application
    Filed: July 14, 2006
    Publication date: January 18, 2007
    Inventors: Richard Sawyer, Brian Day, Lee Newman
  • Patent number: 7127646
    Abstract: Test circuitry for supporting real-time testing of data exception software may be included on an integrated circuit. The circuitry supports the identification of a data unit or data group other than a next data unit or data group to be transferred in a data sequence and the generation of an erroneous data verification parameter that does not verify the data content of the identified data unit or data group. The identified data unit or group is later transmitted with the erroneous data verification parameter in real-time following the transmission of other data units and/or data groups having valid data verification parameters. In this manner, a data receiver may be tested to verify the detection of a data content error in real-time and the execution of the software or firmware for processing an exception may be verified. Circuitry for implementing the method of the present invention may be included on the substrate of an integrated circuit.
    Type: Grant
    Filed: June 7, 2000
    Date of Patent: October 24, 2006
    Assignee: LSI Logic Corporation
    Inventor: Brian A. Day
  • Patent number: 7076504
    Abstract: A system is disclosed that facilitates web-based a virtually ubiquitous network interface is created by obtaining user profile information from a user and activity information from a user device, storing the user profile information and activity information in a database, providing access to the database from any Internet enabled device with appropriate security clearance for altering the database, receiving permission from the user to allow a third party to access the user profile, providing the third party access to a public subset of the user profile, receiving and storing content from the third party, and synchronizing the database and an Internet enabled device. The system responds to unsolicited updates from Internet enabled devices such as gas meters, electrical meters and household appliances to keep a user profile current.
    Type: Grant
    Filed: November 19, 1998
    Date of Patent: July 11, 2006
    Assignee: Accenture LLP
    Inventors: Sean Handel, Brian Day, Miya Yuen
  • Publication number: 20060135585
    Abstract: Methods for therapy of cystic fibrosis and other conditions such as cancer are provided. The methods comprise one or more agents capable of increasing thiol-containing compound transport via a transporter system (i.e. ABC transporters such as MDR-1 or MRP-2) in cells. Other embodiments include the use of agents to modulate transport of thiol-containing compounds within the cell. Therapeutic methods involve the administration of such agents to a patient afflicted with cystic fibrosis, cancer and/or another condition responsive to stimulation of thiol-containing compound transport.
    Type: Application
    Filed: November 15, 2005
    Publication date: June 22, 2006
    Applicant: National Jewish Medical and Research Center
    Inventors: Brian Day, Remy Kachadourian