Patents by Inventor Brian A. Floyd
Brian A. Floyd has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).
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Patent number: 8269671Abstract: A radio-frequency integrated circuit chip package has N integrated patch antennas, N being at least one. The package includes a cover portion with N generally planar patches, and a main portion coupled to the cover portion. The main portion in turn includes at least one generally planar ground plane spaced inwardly from the N generally planar patches and parallel thereto. The ground plane is formed without any coupling apertures therein. The main portion also includes N feed lines spaced inwardly from the N generally planar patches and parallel thereto, and spaced outwardly from the generally planar ground plane and parallel thereto. Furthermore, the main portion includes at least one radio frequency chip coupled to the feed lines and the ground plane. The cover portion and the main portion cooperatively define an antenna cavity, and the N generally planar patches and the chip are located in the antenna cavity. The package is formed without reflectors. Fabrication techniques are also described.Type: GrantFiled: January 27, 2009Date of Patent: September 18, 2012Assignees: International Business Machines Corporation, Media TekInventors: Ho Chung Chen, Brian A. Floyd, Duixian Liu
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Patent number: 8256685Abstract: A radio-frequency integrated circuit chip package has at least one integrated antenna. The package includes at least one generally planar ground plane formed with at least one slot therein. A first substrate structure has an outer surface and an inner surface. The at least one generally planar ground plane is formed on the outer surface of the first substrate structure. At least one feed line is spaced inwardly from the ground plane and parallel thereto. The at least one feed line has an inner surface and an outer surface and is a transmission line formed on the inner surface of the first substrate structure with the outer surface of the at least one feed line adjacent the inner surface of the first substrate structure. At least one radio frequency chip is coupled to the feed line and the ground plane. A second substrate structure, spaced inwardly from the feed line, defines a chip-receiving cavity. The chip is located in the chip-receiving cavity.Type: GrantFiled: June 30, 2009Date of Patent: September 4, 2012Assignees: International Business Machines Corporation, MediatekInventors: Ho Chung Chen, Brian A. Floyd, Duixian Liu
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Publication number: 20120203822Abstract: Apparatus and methods for control of bandwidth reclamation in a content distribution network. In one embodiment, the invention provides a network operator or subscriber with the ability to disable or otherwise control reclamation in a switched digital video (SDV) network. A controller uses rules in determining whether to reclaim bandwidth. These rules designate certain carriers, content, devices and/or subscribers as high priority (or protected from reclamation). In one variant, the rules determine which subscribers are queried (“pinged”) in order to evaluate whether delivered content is actually being utilized by these subscribers. Alternatively, selected ones of the devices are configured so as to generate an automatic response to any ping messages. In another variant, the rules for disabling bandwidth reclamation are entered via user interaction with an application running on a client device and in communication with the controller via a network proxy, or with the SDV server directly.Type: ApplicationFiled: February 9, 2011Publication date: August 9, 2012Inventors: Brian Floyd, Matt Smith, Stephanie Trotter
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Publication number: 20120090458Abstract: A staged rocket apparatus includes first and second stages connected by a releasable connector. A plurality of pressurized gas struts are connected between the first and second stages and provide a separating force urging the first and second stages apart. The gas struts are held in a telescopingly collapsed first position by the releasable connector. The separating force is maintained at a minimum value so long as the releasable connector holds the struts in their first position. When the releasable connector is disconnected the separating force increases due to gas flow through a metering passage having a progressively increasing flow area from a high pressure chamber to a low pressure chamber.Type: ApplicationFiled: December 10, 2011Publication date: April 19, 2012Inventor: Brian A. Floyd
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Patent number: 8091481Abstract: A staged rocket apparatus includes first and second stages connected by a releasable connector. A plurality of pressurized gas struts are connected between the first and second stages and provide a separating force urging the first and second stages apart. The gas struts are held in a telescopingly collapsed first position by the releasable connector. The separating force is maintained at a minimum value so long as the releasable connector holds the struts in their first position. When the releasable connector is disconnected the separating force increases due to gas flow through a metering passage having a progressively increasing flow area from a high pressure chamber to a low pressure chamber.Type: GrantFiled: May 1, 2009Date of Patent: January 10, 2012Inventor: Brian A. Floyd
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Publication number: 20110187585Abstract: A system and method is shown for receiving microwave/millimeter-wave signals. The system and method are balanced and can be effectively implemented on a silicon substrate using single pole double throw switches.Type: ApplicationFiled: February 4, 2010Publication date: August 4, 2011Applicant: INTERNATIONAL BUSINESS MACHINES CORPORATIONInventors: Brian A. Floyd, Vipul Jain, Arun S. Natarajan, Scott K. Reynolds
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Publication number: 20110063169Abstract: A phased-array transmitter and receiver that may be effectively implemented on a silicon substrate. The transmitter distributes to front-ends, and the receiver combines signals from front-ends, using a power distribution/combination tree that employs both passive and active elements. By monitoring the power inputs and outputs, a digital control is able to rapidly provide phase and gain correction information to the front-ends. Such a transmitter/receiver includes a plurality of radio frequency (RF) front-ends and a power splitting/combining network that includes active and passive components configured to distribute signals to/from the front-ends.Type: ApplicationFiled: March 30, 2010Publication date: March 17, 2011Applicant: INTERNATIONAL BUSINESS MACHINES CORPORATIONInventors: PING-YU CHEN, Brian A. Floyd, Jie-Wei Lai, Arun S. Natarajan, Sean T. Nicolson, Scott K. Reynolds, Ming-Dai Tsai, Alberto Valdes-Garcia, Jing-Hong C. Zhan
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Publication number: 20100327068Abstract: A radio-frequency integrated circuit chip package has at least one integrated antenna. The package includes at least one generally planar ground plane formed with at least one slot therein. A first substrate structure has an outer surface and an inner surface. The at least one generally planar ground plane is formed on the outer surface of the first substrate structure. At least one feed line is spaced inwardly from the ground plane and parallel thereto. The at least one feed line has an inner surface and an outer surface and is a transmission line formed on the inner surface of the first substrate structure with the outer surface of the at least one feed line adjacent the inner surface of the first substrate structure. At least one radio frequency chip is coupled to the feed line and the ground plane. A second substrate structure, spaced inwardly from the feed line, defines a chip-receiving cavity. The chip is located in the chip-receiving cavity.Type: ApplicationFiled: June 30, 2009Publication date: December 30, 2010Applicant: INTERNATIONAL BUSINESS MACHINES CORPORATIONInventors: Ho Chung Chen, Brian A. Floyd, Duixian Liu
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Publication number: 20100190464Abstract: A radio-frequency integrated circuit chip package has N integrated patch antennas, N being at least one. The package includes a cover portion with N generally planar patches, and a main portion coupled to the cover portion. The main portion in turn includes at least one generally planar ground plane spaced inwardly from the N generally planar patches and parallel thereto. The ground plane is formed without any coupling apertures therein. The main portion also includes N feed lines spaced inwardly from the N generally planar patches and parallel thereto, and spaced outwardly from the generally planar ground plane and parallel thereto. Furthermore, the main portion includes at least one radio frequency chip coupled to the feed lines and the ground plane. The cover portion and the main portion cooperatively define an antenna cavity, and the N generally planar patches and the chip are located in the antenna cavity. The package is formed without reflectors. Fabrication techniques are also described.Type: ApplicationFiled: January 27, 2009Publication date: July 29, 2010Applicant: International Business Machines CorporationInventors: Ho Chung Chen, Brian A. Floyd, Duxian Liu
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Patent number: 7728774Abstract: A radio-frequency integrated circuit chip package with N integrated aperture-coupled patch antennas, N being at least one, includes a cover portion with N generally planar patches, and a main portion coupled to the cover portion. The main portion in turn comprises at least one generally planar ground plane spaced inwardly from the N generally planar patches and substantially parallel thereto. The ground plane is formed with at least N coupling aperture slots therein. The slots are substantially opposed to the patches. The main portion also includes N feed lines spaced inwardly from the N generally planar patches and substantially parallel thereto, and at least one radio frequency chip coupled to the feed lines and the ground plane. The cover portion and the main portion cooperatively define an antenna cavity, with the N generally planar patches located in the antenna cavity. Fabrication techniques are also described. In some embodiments, N is two or more and a phased array is formed.Type: GrantFiled: July 7, 2008Date of Patent: June 1, 2010Assignee: International Business Machines CorporationInventors: Johannes A. G. Akkermans, Brian A. Floyd, Duixian Liu
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Patent number: 7696930Abstract: A radio-frequency integrated circuit chip package has N integrated aperture-coupled patch antennas, N being at least two, and includes N generally planar patches, and at least one generally planar ground plane spaced inwardly from the N generally planar patches and substantially parallel thereto. The ground plane is formed with at least N coupling aperture slots therein, and the slots are substantially opposed to the patches. N feed lines are spaced inwardly from the ground plane and substantially parallel thereto, and at least one radio frequency chip is spaced inwardly from the feed lines and coupled to the feed lines and the ground plane. A first substrate layer is spaced inwardly from the feed lines, and is formed with a chip-receiving cavity, with the chip located in the chip-receiving cavity.Type: GrantFiled: April 14, 2008Date of Patent: April 13, 2010Assignee: International Business Machines CorporationInventors: Johannes A. G. Akkermans, Brian A. Floyd, Duixian Liu
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Patent number: 7692590Abstract: A radio-frequency integrated circuit chip package with at least one integrated aperture-coupled patch antenna includes at least one generally planar patch and at least one generally planar ground plane spaced inwardly from the generally planar patch and substantially parallel thereto. The ground plane is formed with at least one coupling aperture slot therein. The slot is substantially opposed to the patch. Also included are at least one feed line spaced inwardly from the ground plane and substantially parallel thereto, at least one radio frequency chip spaced inwardly from the feed line and coupled to the feed line and the ground plane, and a first substrate layer spaced inwardly from the feed line. The first substrate layer is formed with a chip-receiving cavity. The chip is located in the chip-receiving cavity.Type: GrantFiled: February 20, 2008Date of Patent: April 6, 2010Assignee: International Business Machines CorporationInventors: Brian Floyd, Duixian Liu
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Publication number: 20100001906Abstract: A radio-frequency integrated circuit chip package with N integrated aperture-coupled patch antennas, N being at least one, includes a cover portion with N generally planar patches, and a main portion coupled to the cover portion. The main portion in turn comprises at least one generally planar ground plane spaced inwardly from the N generally planar patches and substantially parallel thereto. The ground plane is formed with at least N coupling aperture slots therein. The slots are substantially opposed to the patches. The main portion also includes N feed lines spaced inwardly from the N generally planar patches and substantially parallel thereto, and at least one radio frequency chip coupled to the feed lines and the ground plane. The cover portion and the main portion cooperatively define an antenna cavity, with the N generally planar patches located in the antenna cavity. Fabrication techniques are also described. In some embodiments, N is two or more and a phased array is formed.Type: ApplicationFiled: July 7, 2008Publication date: January 7, 2010Inventors: Johannes A.G. Akkermans, Brian A. Floyd, Duixian Liu
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Patent number: 7629852Abstract: Circuits and methods are provided for building integrated transformer-coupled amplifiers with on-chip transformers that are designed to resonate or otherwise tune parasitic capacitances to achieve frequency tuning of amplifiers at millimeter wave operating frequencies.Type: GrantFiled: August 14, 2008Date of Patent: December 8, 2009Assignee: International Business Machines CorporationInventors: Brian A. Floyd, David Goren, Ullrich R. Pfeiffer, Scott Kevin Reynolds
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Publication number: 20090256752Abstract: A radio-frequency integrated circuit chip package has N integrated aperture-coupled patch antennas, N being at least two, and includes N generally planar patches, and at least one generally planar ground plane spaced inwardly from the N generally planar patches and substantially parallel thereto. The ground plane is formed with at least N coupling aperture slots therein, and the slots are substantially opposed to the patches. N feed lines are spaced inwardly from the ground plane and substantially parallel thereto, and at least one radio frequency chip is spaced inwardly from the feed lines and coupled to the feed lines and the ground plane. A first substrate layer is spaced inwardly from the feed lines, and is formed with a chip-receiving cavity, with the chip located in the chip-receiving cavity.Type: ApplicationFiled: April 14, 2008Publication date: October 15, 2009Applicant: International Business Machines CorporationInventors: Johannes A.G. Akkermans, Brian A. Floyd, Duixian Liu
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Publication number: 20090207080Abstract: A radio-frequency integrated circuit chip package with at least one integrated aperture-coupled patch antenna includes at least one generally planar patch and at least one generally planar ground plane spaced inwardly from the generally planar patch and substantially parallel thereto. The ground plane is formed with at least one coupling aperture slot therein. The slot is substantially opposed to the patch. Also included are at least one feed line spaced inwardly from the ground plane and substantially parallel thereto, at least one radio frequency chip spaced inwardly from the feed line and coupled to the feed line and the ground plane, and a first substrate layer spaced inwardly from the feed line. The first substrate layer is formed with a chip-receiving cavity. The chip is located in the chip-receiving cavity.Type: ApplicationFiled: February 20, 2008Publication date: August 20, 2009Applicant: International Business Machines CorporationInventors: Brian Floyd, Duixian Liu
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Patent number: 7566952Abstract: Shielded circuit pad is provided where the parasitic capacitance is tuned out by the inclusion of a shunt transmission line stub which reduces the substrate induced loss in millimeter-wave applications. The circuit pad is located on the substrate, with a shield located beneath the circuit pad, and the shunt transmission line stub attached to the circuit pad. Accordingly, controlled impedance is obtained for millimeter-wave applications. The spacing between the circuit pad and the shield may then be minimized.Type: GrantFiled: January 5, 2005Date of Patent: July 28, 2009Assignee: International Business Machines CorporationInventors: Brian A. Floyd, Ullrich R. Pfeiffer, Scott K. Reynods
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Patent number: 7486145Abstract: Circuits and methods are provided for implementing programmable sub-integer N frequency dividers for use in, e.g., frequency synthesizer applications, providing glitch free outputs signals with minimal fractional spurs. Phase-rotating sub-integer N frequency dividers are programmable to provide multi-modulus division with a wide range of arbitrary sub-integer division ratios.Type: GrantFiled: January 10, 2007Date of Patent: February 3, 2009Assignee: International Business Machines CorporationInventors: Brian A. Floyd, Sergey V. Rylov
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Publication number: 20080297261Abstract: Circuits and methods are provided for building integrated transformer-coupled amplifiers with on-chip transformers that are designed to resonate or otherwise tune parasitic capacitances to achieve frequency tuning of amplifiers at millimeter wave operating frequencies.Type: ApplicationFiled: August 14, 2008Publication date: December 4, 2008Inventors: Brian A. Floyd, David Goren, Ullrich R. Pfeiffer, Scott Kevin Reynolds
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Patent number: 7459981Abstract: Circuits and methods are provided for building integrated transformer-coupled amplifiers with on-chip transformers that are designed to resonate or otherwise tune parasitic capacitances to achieve frequency tuning of amplifiers at millimeter wave operating frequencies.Type: GrantFiled: July 30, 2007Date of Patent: December 2, 2008Assignee: International Business Machines CorporationInventors: Brian A. Floyd, David Goren, Ullrich R. Pfeiffer, Scott Kevin Reynolds