Patents by Inventor Brian A. Rinaldi

Brian A. Rinaldi has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20200082076
    Abstract: Provided are a computer program product, system, and method for using trap cache segments to detect malicious processes. A trap cache segment to the cache for data in the storage and indicated as a trap cache segment. Cache segments are added to the cache having data from the storage that are not indicated as trap cache segments. A memory function call from a process executing in the computer system reads data from a region of a memory device to output the read data to a buffer of the memory device. A determination is made as to whether the region of the memory device includes the trap cache segment. The memory function call is blocked and the process is treated as a potentially malicious process in response to determining that the region includes the trap cache segment.
    Type: Application
    Filed: September 12, 2018
    Publication date: March 12, 2020
    Inventors: Brian A. Rinaldi, Clint A. Hardy, Lokesh M. Gupta, Kevin J. Ash
  • Publication number: 20200081702
    Abstract: Provided are techniques for concurrent Input/Output (I/O) enclosure firmware/Field-Programmable Gate Array (FPGA) update in a multi-node environment. First notifications are sent to each I/O enclosure management engine on each of a plurality of server nodes that code activation for a first set of I/O enclosures is starting. An update image is distributed to the first set of I/O enclosures. The update image on the first set of I/O enclosures is activated by sending an activate reset command to each of the first set of I/O enclosures, wherein a reset is not propagated to other devices within each I/O enclosure in the first set of I/O enclosures in response to determining that the reset is an activate reset. In response to the activate reset command completing, second notifications are sent to each I/O enclosure management engine that code activation for the first set of I/O enclosures has completed.
    Type: Application
    Filed: November 14, 2019
    Publication date: March 12, 2020
    Inventors: Gary W. Batchelor, Veronica S. Davila, Enrique Q. Garcia, Robin Han, Jay T. Kirch, Ronald D. Martens, Trung N. Nguyen, Brian A. Rinaldi, Todd C. Sorenson
  • Patent number: 10564867
    Abstract: A peer to peer remote copy operation is performed between a primary storage controller and a secondary storage controller, to establish a peer to peer remote copy relationship between a primary storage volume and a secondary storage volume. Subsequent to indicating completion of the peer to peer remote copy operation to a host, a determination is made as to whether the primary storage volume and the secondary storage volume have identical data, by performing operations of staging data of the primary storage volume from auxiliary storage of the primary storage controller to local storage of the primary storage controller, and transmitting the data of the primary storage volume that is staged, to the secondary storage controller for comparison with data of the secondary storage volume stored in an auxiliary storage of the secondary storage controller.
    Type: Grant
    Filed: November 29, 2017
    Date of Patent: February 18, 2020
    Assignee: INTERNATIONAL BUSINESS MACHINES CORPORATION
    Inventors: Matthew G. Borlick, Lokesh M. Gupta, Brian A. Rinaldi, Micah Robison
  • Patent number: 10552324
    Abstract: Provided are a computer program product, system, and method for populating a second cache with tracks from a first cache when transferring management of the tracks from a first node to a second node. Management of a first group of tracks in the storage managed by the first node is transferred to the second node managing access to a second group of tracks in the storage. After the transferring the management of the tracks, the second node manages access to the first and second groups of tracks and caches accessed tracks from the first and second groups in the second cache of the second node. The second cache of the second node is populated with the tracks in a first cache of the first node.
    Type: Grant
    Filed: September 7, 2018
    Date of Patent: February 4, 2020
    Assignee: International Business Machines Corporation
    Inventors: Kevin J. Ash, Matthew G. Borlick, Lokesh M. Gupta, Matthew J. Kalos, Brian A. Rinaldi
  • Patent number: 10540170
    Abstract: Provided are techniques for concurrent Input/Output (I/O) enclosure firmware/Field-Programmable Gate Array (FPGA) update in a multi-node environment. First notifications are sent to each I/O enclosure management engine on each of a plurality of server nodes that code activation for a first set of I/O enclosures is starting. An update image is distributed to the first set of I/O enclosures. The update image on the first set of I/O enclosures is activated by sending an activate reset command to each of the first set of I/O enclosures, wherein a reset is not propagated to other devices within each I/O enclosure in the first set of I/O enclosures in response to determining that the reset is an activate reset. In response to the activate reset command completing, second notifications are sent to each I/O enclosure management engine that code activation for the first set of I/O enclosures has completed.
    Type: Grant
    Filed: September 12, 2018
    Date of Patent: January 21, 2020
    Assignee: INTERNATIONAL BUSINESS MACHINES CORPORATION
    Inventors: Gary W. Batchelor, Veronica S. Davila, Enrique Q. Garcia, Robin Han, Jay T. Kirch, Ronald D. Martens, Trung N. Nguyen, Brian A. Rinaldi, Todd C. Sorenson
  • Patent number: 10528412
    Abstract: In one aspect, multiple data path error collection is provided in a storage management system. In one embodiment, an error condition in a main data path between the storage controller and at least one of a host and a storage unit is detected, and in response, a sequence of error data collection operations to collect error data through a main path is initiated. In response to a failure to collect error data at a level of the sequential error data collection operations, error data is collected through an alternate data path as a function of the error data collection level at which the failure occurred. Other aspects are described.
    Type: Grant
    Filed: November 6, 2017
    Date of Patent: January 7, 2020
    Assignee: INTERNATIONAL BUSINESS MACHINES CORPORATION
    Inventors: Gary W. Batchelor, Matthew D. Carson, Enrique Q. Garcia, Larry Juarez, Jay T. Kirch, Tony Leung, Trung N. Nguyen, Brian A. Rinaldi, Todd C. Sorenson
  • Publication number: 20190384509
    Abstract: A method for avoiding data loss in a storage system is disclosed. In one embodiment, such a method includes monitoring a degradation level associated with a battery. The battery provides backup power to a storage system in the event of a primary power outage. The storage system includes volatile storage media storing modified data to destage to more persistent storage media, such as an array of storage drives. In the event the degradation level crosses a designated threshold, the method automatically takes steps to alter a time period needed to completely copy the modified data off of the volatile storage media. A corresponding system and computer program product are also disclosed.
    Type: Application
    Filed: June 17, 2018
    Publication date: December 19, 2019
    Applicant: International Business Machines Corporation
    Inventors: Matthew G. Borlick, Micah Robison, John C. Elliott, Kevin J. Ash, Lokesh M. Gupta, Brian A. Rinaldi
  • Publication number: 20190347200
    Abstract: Provided are a computer program product, system, and method for populating a second cache with tracks from a first cache when transferring management of the tracks from a first node to a second node. Management of a first group of tracks in the storage managed by the first node is transferred to the second node managing access to a second group of tracks in the storage. After the transferring the management of the tracks, the second node manages access to the first and second groups of tracks and caches accessed tracks from the first and second groups in the second cache of the second node.
    Type: Application
    Filed: July 24, 2019
    Publication date: November 14, 2019
    Inventors: Kevin J. Ash, Matthew G. Borlick, Lokesh M. Gupta, Matthew J. Kalos, Brian A. Rinaldi
  • Publication number: 20190258424
    Abstract: Provided are a computer program product, system, and method for using a delay timer to delay code load operations to process queued write requests. A code load is performed to a selected storage device in a storage array comprised of a plurality of the storage devices. Writes are queued to the storage array in a non-volatile storage while performing the code load. A determination is made as to whether the queued writes to the storage array exceed a threshold. A delay timer is started in response to determining that the queued writes to the storage array exceed the threshold. An additional code load is initiated to an additional selected storage device in the storage array in response to determining that the delay timer has expired. The additional code load is initiated to the additional selected storage device in response to determining that the queued writes are less than the threshold.
    Type: Application
    Filed: February 20, 2018
    Publication date: August 22, 2019
    Inventors: Brian A. Rinaldi, Clint A. Hardy, Samantha A. Utter, Kevin J. Ash, Karl A. Nielsen, Matthew J. Kalos
  • Publication number: 20190258578
    Abstract: A determination is made in a multi-processor system that a cache storage is storing a first type of elements and a second type of elements, wherein on an average each of the first type of elements takes a longer time to destage to secondary storage in comparison to each of the second type of elements. A determination is made of how many tasks to run for scanning the cache storage and destaging the first type of elements and the second type of elements from the cache storage, based on how many of first type of elements and how many of the second type of elements are stored in the cache storage, and how many processors are available in the multi-processor system.
    Type: Application
    Filed: April 29, 2019
    Publication date: August 22, 2019
    Inventors: Kevin J. Ash, Lokesh M. Gupta, Brian A. Rinaldi, Micah Robison
  • Publication number: 20190222669
    Abstract: Provided are a computer program product, system, and method for populating a secondary cache with unmodified tracks in a primary cache when redirecting host access from a primary server to a secondary server. Host access to tracks is redirected from the primary server to the secondary server. Prior to the redirecting, updates to tracks in the primary storage were replicated to the secondary server. After the redirecting host access to the secondary server, host access is directed to the secondary server and the secondary storage. A secondary cache at the secondary server is populated with unmodified tracks in a primary cache at the primary server when the host access was redirected to the secondary server to make available to the host access redirected to the secondary server.
    Type: Application
    Filed: March 25, 2019
    Publication date: July 18, 2019
    Inventors: Kevin J. Ash, Matthew G. Borlick, Lokesh M. Gupta, Matthew J. Kalos, Brian A. Rinaldi
  • Patent number: 10324780
    Abstract: For efficient data system error recovery, an error threshold is dynamically adjusted from a default error threshold to one of a plurality of error threshold values comprising at least high threshold values, medium threshold values, and low threshold values, for a particular error associated with an event object indicating a responsive action for handling the particular error in a data system. The responsive action to the event object comprises determining whether the error threshold needs to be adjusted for the particular error, and if it is determined the error threshold for the particular error does not need adjustment, the default error threshold is used.
    Type: Grant
    Filed: July 14, 2017
    Date of Patent: June 18, 2019
    Assignee: INTERNATIONAL BUSINESS MACHINES CORPORATION
    Inventors: Herve G. P. Andre, Larry Juarez, Brian A. Rinaldi, Todd C. Sorenson, Liang H. Wu
  • Patent number: 10318429
    Abstract: A determination is made in a multi-processor system that a cache storage is storing a first type of elements and a second type of elements, wherein on an average each of the first type of elements takes a longer time to destage to secondary storage in comparison to each of the second type of elements. A determination is made of how many tasks to run for scanning the cache storage and destaging the first type of elements and the second type of elements from the cache storage, based on how many of first type of elements and how many of the second type of elements are stored in the cache storage, and how many processors are available in the multi-processor system.
    Type: Grant
    Filed: November 10, 2016
    Date of Patent: June 11, 2019
    Assignee: International Business Machines Corporation
    Inventors: Kevin J. Ash, Lokesh M Gupta, Brian A. Rinaldi, Micah Robison
  • Patent number: 10320936
    Abstract: Provided are a computer program product, system, and method for populating a secondary cache with unmodified tracks in a primary cache when redirecting host access from a primary server to a secondary server. Host access to tracks is redirected from the primary server to the secondary server. Prior to the redirecting, updates to tracks in the primary storage were replicated to the secondary server. After the redirecting host access to the secondary server, host access is directed to the secondary server and the secondary storage. A secondary cache at the secondary server is populated with unmodified tracks in a primary cache at the primary server when the host access was redirected to the secondary server to make available to the host access redirected to the secondary server.
    Type: Grant
    Filed: October 20, 2015
    Date of Patent: June 11, 2019
    Assignee: INTERNATIONAL BUSINESS MACHINES CORPORATION
    Inventors: Kevin J. Ash, Matthew G. Borlick, Lokesh M. Gupta, Matthew J. Kalos, Brian A. Rinaldi
  • Patent number: 10257258
    Abstract: A processor may receive a request to transmit a logical volume to a cloud-based server. The logical volume may be stored in a data storage subsystem that includes one or more ranks. Each rank may include one or more extents, which may include one or more stride. The processor may determine an extent of the one or more extents that includes data of the logical volume. The processor may determine a set of strides associated with the extent. The processor may copy the set of strides into a stride buffer and combine the set of strides into a block extent file. The processor may transmit the block extent file to the cloud server.
    Type: Grant
    Filed: October 31, 2016
    Date of Patent: April 9, 2019
    Assignee: International Business Machines Corporation
    Inventors: Xue Dong Gao, Karl A. Nielsen, Yao Peng, Brian A. Rinaldi, Tang Ren Yao
  • Publication number: 20190052698
    Abstract: Provided is a method, computer program product, and system for transferring data between block and file storage systems. A remote server may receive, from a host device, a request to restore data to the host device. The remote server may store the data as one or more objects, with each object corresponding to an extent of a logical volume on the host device. A set of strides on the host device that correspond to the one or more objects may be determined using metadata for the one or more objects. Each of the one or more objects may be split into a set of data pieces using the metadata. Each data piece may then be transmitted from the remote server to the host device.
    Type: Application
    Filed: October 17, 2018
    Publication date: February 14, 2019
    Inventors: Xue Dong Gao, Karl A. Nielsen, Yao Peng, Brian A. Rinaldi, Tang Ren Yao
  • Publication number: 20190012165
    Abstract: Provided are techniques for concurrent Input/Output (I/O) enclosure firmware/Field-Programmable Gate Array (FPGA) update in a multi-node environment. First notifications are sent to each I/O enclosure management engine on each of a plurality of server nodes that code activation for a first set of I/O enclosures is starting. An update image is distributed to the first set of I/O enclosures. The update image on the first set of I/O enclosures is activated by sending an activate reset command to each of the first set of I/O enclosures, wherein a reset is not propagated to other devices within each I/O enclosure in the first set of I/O enclosures in response to determining that the reset is an activate reset. In response to the activate reset command completing, second notifications are sent to each I/O enclosure management engine that code activation for the first set of I/O enclosures has completed.
    Type: Application
    Filed: September 12, 2018
    Publication date: January 10, 2019
    Inventors: Gary W. Batchelor, Veronica S. Davila, Enrique Q. Garcia, Robin Han, Jay T. Kirch, Ronald D. Martens, Trung N. Nguyen, Brian A. Rinaldi, Todd C. Sorenson
  • Publication number: 20190004951
    Abstract: Provided are a computer program product, system, and method for populating a second cache with tracks from a first cache when transferring management of the tracks from a first node to a second node. Management of a first group of tracks in the storage managed by the first node is transferred to the second node managing access to a second group of tracks in the storage. After the transferring the management of the tracks, the second node manages access to the first and second groups of tracks and caches accessed tracks from the first and second groups in the second cache of the second node.
    Type: Application
    Filed: September 7, 2018
    Publication date: January 3, 2019
    Inventors: Kevin J. Ash, Matthew G. Borlick, Lokesh M. Gupta, Matthew J. Kalos, Brian A. Rinaldi
  • Patent number: 10146452
    Abstract: A method for maintaining intelligent write ordering in an asynchronous data replication system is disclosed. In one embodiment, such a method includes performing the following, in order, for each extent of each rank of the primary storage device: (1) determining which primary volume the extent is associated with on the primary storage device; (2) if the primary volume that is associated with the extent is in a mirroring relationship with a corresponding secondary volume on the secondary storage device, scanning an out-of sync bitmap associated with the primary volume; and (3) sending, from the primary volume to the secondary volume, tracks in the extent having corresponding bits set in the out-of sync bitmap. A corresponding system and computer program product are also disclosed.
    Type: Grant
    Filed: April 22, 2016
    Date of Patent: December 4, 2018
    Assignee: International Business Machines Corporation
    Inventors: Kevin J. Ash, Matthew J. Kalos, Brian A. Rinaldi
  • Publication number: 20180341541
    Abstract: Provided are a method, a system, and a computer program product in which a storage controller determines one or more resources that are impacted by an error. A cleanup of tasks associated with the one or more resources that are impacted by the error is performed, to recover from the error, wherein host input/output (I/O) operations continue to be processed, and wherein tasks associated with other resources continue to execute.
    Type: Application
    Filed: August 2, 2018
    Publication date: November 29, 2018
    Inventors: Wang Ping He, Larry Juarez, Matthew J. Kalos, John N. McCauley, Louis A. Rasor, Brian A. Rinaldi, Todd C. Sorenson