Patents by Inventor Brian Brecht

Brian Brecht has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 11340260
    Abstract: A probe card in an automated test equipment (ATE) and methods for operating the same for testing electronic devices. The probe card may be a portion of a vertical-type probe card assembly in which pads on a circuit board are contacted by probe pins. The probe card has a pad geometry that compensates for misalignment with corresponding probe pins due to manufacturing error or a mismatch of coefficient of thermal expansion, enabling reliable operation of the ATE over a wide range of test temperatures. The pad array may have a plurality of elongated pads, each of uniquely designed size, tilt angle, and/or center location, with the characteristics of each pad being dependent on a distance between each pad and a centroid of the pad array, such that a probe pin to pad location errors can be mitigated.
    Type: Grant
    Filed: December 24, 2019
    Date of Patent: May 24, 2022
    Assignee: Teradyne, Inc.
    Inventors: Brian Brecht, Steve Ledford
  • Patent number: 11333683
    Abstract: A probe card in an automated test equipment (ATE) is disclosed. The probe card may be a portion of a vertical-type probe card assembly in which pads on a circuit board are contacted by probe pins, with vertical vias in the circuit board interconnecting various conductive elements. Disclosed herein is a transposed via arrangement within a circuit board for a probe card, where adjacent vias are offset towards each other such that the inductance between the adjacent vias may be reduced to provide a desirable impedance during high frequency signal and/or power transmission.
    Type: Grant
    Filed: December 24, 2019
    Date of Patent: May 17, 2022
    Assignee: Teradyne, Inc.
    Inventor: Brian Brecht
  • Patent number: 11272616
    Abstract: An example apparatus includes a first printed circuit board (PCB) having a power layer, a ground layer, and a slot. The slot includes a first power electrical contact that is electrically connected to the power layer and a first ground electrical contact that is connected to the ground layer. The slot extends orthogonally or obliquely through multiple layers of the first PCB. A second PCB includes a second power electrical contact, a second ground electrical contact, and capacitors electrically connected between the second power electrical contact and the second ground electrical contact. The second PCB is configured for insertion into the slot to form an electrical connection between the first power electrical contact and the second power electrical contact and between the first ground electrical contact and the second ground electrical contact.
    Type: Grant
    Filed: July 24, 2020
    Date of Patent: March 8, 2022
    Assignee: TERADYNE, INC.
    Inventors: Brian Brecht, Roger A. Plante, Richard Pye, Julie Robison, Alfred M. Zakarian, William Patti, Mark Garcia, Shih-Fan Chen, Kenneth L. Degan, Heng-Kit Too
  • Publication number: 20220030718
    Abstract: An example apparatus includes a first printed circuit board (PCB) having a power layer, a ground layer, and a slot. The slot includes a first power electrical contact that is electrically connected to the power layer and a first ground electrical contact that is connected to the ground layer. The slot extends orthogonally or obliquely through multiple layers of the first PCB. A second PCB includes a second power electrical contact, a second ground electrical contact, and capacitors electrically connected between the second power electrical contact and the second ground electrical contact. The second PCB is configured for insertion into the slot to form an electrical connection between the first power electrical contact and the second power electrical contact and between the first ground electrical contact and the second ground electrical contact.
    Type: Application
    Filed: July 24, 2020
    Publication date: January 27, 2022
    Inventors: Brian Brecht, Roger A. Plante, Richard Pye, Julie Robison, Alfred M. Zakarian, William Patti, Mark Garcia, Shih-Fan Chen, Kenneth L. Degan, Heng-Kit Too
  • Patent number: 11215641
    Abstract: Probe pin arrangements in a vertical-type probe card assembly for an automated test equipment (ATE) are disclosed. In some embodiments, one or more additional conductive regions are provided in between adjacent probe pins. The additional conductive regions may reduce spacing between probe pins connected to adjacent probe card pads, and may in turn reduce or adjust inductance between the two probe cards pads to provide improved signal impedance matching or lower power impedance. In one embodiment, the additional conductive region is a short probe pin. In another embodiment, the additional conductive region is a protrusion on a vertical probe pin.
    Type: Grant
    Filed: December 24, 2019
    Date of Patent: January 4, 2022
    Assignee: Teradyne, Inc.
    Inventor: Brian Brecht
  • Patent number: 11162980
    Abstract: A probe card in an automated test equipment (ATE) is disclosed. The probe card may be a portion of a vertical-type probe card assembly in which pads on a circuit board are contacted by probe pins, with vertical vias in the circuit board interconnecting various conductive elements. Disclosed herein is a probe card having ground vias in a coaxial arrangement around a signal via that provide electromagnetic shielding to a signal via to reduce crosstalk between adjacent signal vias.
    Type: Grant
    Filed: December 24, 2019
    Date of Patent: November 2, 2021
    Assignee: Teradyne, Inc.
    Inventor: Brian Brecht
  • Publication number: 20210190825
    Abstract: A probe card in an automated test equipment (ATE) is disclosed. The probe card may be a portion of a vertical-type probe card assembly in which pads on a circuit board are contacted by probe pins, with vertical vias in the circuit board interconnecting various conductive elements. Disclosed herein is a probe card having ground vias in a coaxial arrangement around a signal via that provide electromagnetic shielding to a signal via to reduce crosstalk between adjacent signal vias.
    Type: Application
    Filed: December 24, 2019
    Publication date: June 24, 2021
    Applicant: Teradyne, Inc.
    Inventor: Brian Brecht
  • Publication number: 20210190828
    Abstract: A probe card in an automated test equipment (ATE) is disclosed. The probe card may be a portion of a vertical-type probe card assembly in which pads on a circuit board are contacted by probe pins, with vertical vias in the circuit board interconnecting various conductive elements. Disclosed herein is a transposed via arrangement within a circuit board for a probe card, where adjacent vias are offset towards each other such that the inductance between the adjacent vias may be reduced to provide a desirable impedance during high frequency signal and/or power transmission.
    Type: Application
    Filed: December 24, 2019
    Publication date: June 24, 2021
    Applicant: Teradyne, Inc.
    Inventor: Brian Brecht
  • Publication number: 20210190827
    Abstract: Probe pin arrangements in a vertical-type probe card assembly for an automated test equipment (ATE) are disclosed. In some embodiments, one or more additional conductive regions are provided in between adjacent probe pins. The additional conductive regions may reduce spacing between probe pins connected to adjacent probe card pads, and may in turn reduce or adjust inductance between the two probe cards pads to provide improved signal impedance matching or lower power impedance. In one embodiment, the additional conductive region is a short probe pin. In another embodiment, the additional conductive region is a protrusion on a vertical probe pin.
    Type: Application
    Filed: December 24, 2019
    Publication date: June 24, 2021
    Applicant: Teradyne, Inc.
    Inventor: Brian Brecht
  • Publication number: 20210190826
    Abstract: A probe card in an automated test equipment (ATE) and methods for operating the same for testing electronic devices. The probe card may be a portion of a vertical-type probe card assembly in which pads on a circuit board are contacted by probe pins. The probe card has a pad geometry that compensates for misalignment with corresponding probe pins due to manufacturing error or a mismatch of coefficient of thermal expansion, enabling reliable operation of the ATE over a wide range of test temperatures. The pad array may have a plurality of elongated pads, each of uniquely designed size, tilt angle, and/or center location, with the characteristics of each pad being dependent on a distance between each pad and a centroid of the pad array, such that a probe pin to pad location errors can be mitigated.
    Type: Application
    Filed: December 24, 2019
    Publication date: June 24, 2021
    Applicant: Teradyne, Inc.
    Inventors: Brian Brecht, Steve Ledford
  • Publication number: 20200253041
    Abstract: An example system for maintaining the shape of a circuit board includes metal balls that are configured not to collapse in whole or part in response to a force below a predefined force and a temperature below a predefined temperature. The metal balls are configured to support a substrate and are part of electrical connections between the substrate and a circuit board. The system includes a fixture configured to apply force to the substrate while the substrate is subjected to the temperature. The fixture is configured to distribute the force across a surface of the substrate that is not in contact with the metal balls such that the force applied by the fixture and the support of the substrate by the metal balls maintains a shape of the substrate at the temperature.
    Type: Application
    Filed: February 26, 2019
    Publication date: August 6, 2020
    Inventors: Heng-Kit Too, Xue-Bin Tan, Max Zhang, Rocky Tao, Brian Brecht, Iris Weng, Hale Deng
  • Patent number: 7541819
    Abstract: The traditional device interface board is replaced by a number of smaller strips containing one or more electrical components for interfacing the device under test and the test head. The device interface modules may mount to a stiffening member having a back bone and multiple ribs running through the stiffening member. The device interface strips can create a lattice-like structure for the interface circuitry. Individual circuits may be disposed on the interface strips to perform functionality relating to the device under test and/or the test head.
    Type: Grant
    Filed: October 28, 2005
    Date of Patent: June 2, 2009
    Assignee: Teradyne, Inc.
    Inventors: Frank B. Parrish, Brian Brecht, Derek Castellano
  • Publication number: 20070096755
    Abstract: The traditional device interface board is replaced by a number of smaller strips containing one or more electrical components for interfacing the device under test and the test head. The device interface modules may mount to a stiffening member having a back bone and multiple ribs running through the stiffening member. The device interface strips can create a lattice-like structure for the interface circuitry. Individual circuits may be disposed on the interface strips to perform functionality relating to the device under test and/or the test head.
    Type: Application
    Filed: October 28, 2005
    Publication date: May 3, 2007
    Inventors: Frank Parrish, Derek Castellano, Brian Brecht
  • Patent number: 6916990
    Abstract: In one embodiment a high power interface apparatus is provided having a multilayer laminated cable including force conductor planes having flush and recessed portions and return conductor planes having flush and recessed portions. The flush portions of the conductor planes extend to a contact end of the laminated cable and the recessed portions are removed from the contact end. The flush portions are aligned along axes at the contact end. The flush portions of the return conductor planes are aligned at the contact end along axes aligned within recessed portions of the force conductor planes. A dielectric material separates the force and return conductor planes. Surface contact pads may be provided on the contact end including force contact pads, each contacting and extending along aligned flush portions of the force conductor planes, and including return conductor pads, each contacting and extending along aligned flush portions of the return conductor planes.
    Type: Grant
    Filed: September 30, 2002
    Date of Patent: July 12, 2005
    Assignee: Teradyne, Inc.
    Inventors: Arash Behziz, Frank Parrish, Donald Thompson, Arthur LeColst, Keith Breinlinger, Brian Brecht, Gerald H. Johnson
  • Publication number: 20040060725
    Abstract: In one embodiment a high power interface apparatus is provided having a multilayer laminated cable including force conductor planes having flush and recessed portions and return conductor planes having flush and recessed portions. The flush portions of the conductor planes extend to a contact end of the laminated cable and the recessed portions are removed from the contact end. The flush portions are aligned along axes at the contact end. The flush portions of the return conductor planes are aligned at the contact end along axes aligned within recessed portions of the force conductor planes. A dielectric material separates the force and return conductor planes. Surface contact pads may be provided on the contact end including force contact pads, each contacting and extending along aligned flush portions of the force conductor planes, and including return conductor pads, each contacting and extending along aligned flush portions of the return conductor planes.
    Type: Application
    Filed: September 30, 2002
    Publication date: April 1, 2004
    Inventors: Arash Behziz, Frank Parrish, Donald Thompson, Arthur LeColst, Keith Breinlinger, Brian Brecht, Gerald H. Johnson