Patents by Inventor Brian Carey

Brian Carey has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20100076881
    Abstract: A system and method for producing a valuation for real property that allows the rating of various metrics that contribute to a determination of value for the subject property, the rating being based on the quality and applicability to the subject property of the data sources from which data is gathered for each metric, such that the final valuation is based on a weighted average of each of the metrics, thereby eliminating the human bias from the actual valuation result, but providing an improved result over a valuation based solely on results from an automated valuation model.
    Type: Application
    Filed: September 19, 2008
    Publication date: March 25, 2010
    Inventors: Thomas Liam O'Grady, Christopher Brian Carey
  • Patent number: 7474129
    Abstract: A dual mode comparator circuit is disclosed. The dual mode comparator includes a plurality of differential transistor pairs. Each differential transistor pair includes a plurality of inputs and outputs. The outputs of the differential transistor pairs are coupled to inputs of a multiplexor. The multiplexor includes at least one control input for selecting between the multiplexor inputs and provides the selected input to the multiplexor output. The dual mode comparator further includes a comparator back end that is coupled to the output of the multiplexor. The comparator back end may include a folded cascode and additional gain stages. The comparator back end provides the comparator output to the next stage. The dual mode comparator may be used in automatic testing equipment embodiments.
    Type: Grant
    Filed: April 24, 2006
    Date of Patent: January 6, 2009
    Assignee: Analog Devices, Inc.
    Inventor: Brian Carey
  • Publication number: 20060250165
    Abstract: A dual mode comparator circuit is disclosed. The dual mode comparator includes a plurality of differential transistor pairs. Each differential transistor pair includes a plurality of inputs and outputs. The outputs of the differential transistor pairs are coupled to inputs of a multiplexor. The multiplexor includes at least one control input for selecting between the multiplexor inputs and provides the selected input to the multiplexor output. The dual mode comparator further includes a comparator back end that is coupled to the output of the multiplexor. The comparator back end may include a folded cascode and additional gain stages. The comparator back end provides the comparator output to the next stage. The dual mode comparator may be used in automatic testing equipment embodiments.
    Type: Application
    Filed: April 24, 2006
    Publication date: November 9, 2006
    Inventor: Brian Carey
  • Patent number: 5652755
    Abstract: Monitor (11) includes a microcontroller (51) programmed in a first mode of operation to drive various loads (59), (69) which operate to perform tests on patient samples. The results of the tests are sensed by sensors (61), (75) and digitally stored in storage (67) for display on display (21). The microcontroller (51) is programmed in a second mode of operation to transmit the stored displayed information to a printer (13) over the line (23) transmitting power to the monitor (11) by selectively routing current through the load (69). A data transmission interface (15) includes circuitry (37) (39) (43) for sensing the changing current provided to the monitor (11) for decoding the information to be printed and for sending print information to printer (13). Error checking is performed by microprocessor (39) which inhibits all printing if any errors occur in the received message.
    Type: Grant
    Filed: February 3, 1994
    Date of Patent: July 29, 1997
    Assignee: Boehringer Mannheim Corporation
    Inventor: Brian Carey