Abstract: A method for reducing emissions from a vessel includes isolating the vessel from a downstream fluid flow line, purging a fluid from the vessel by injecting purging media into the vessel to push the fluid through a check valve of a vent tubing and into the downstream fluid flow line, and draining the purging media from the vessel. A first end of the vent tubing is coupled to the housing of the vessel, and a second end of the vent tubing is coupled to the downstream fluid flow line. Further, the vent tubing includes a check valve disposed between the first end and the second end, and the check valve is configured to allow fluid to flow from the housing to the downstream fluid flow line.

Abstract: An integrated circuit includes a first source region, a first drain region, a first fin having (i) a first upper region laterally between the first source region and the first drain region and (ii) a first lower region below the first upper region, and a first gate structure on at least top and side surfaces of the first upper region. The integrated circuit further includes a second source region, a second drain region, a second fin having (i) a second upper region laterally between the second source region and the second drain region and (ii) a second lower region below the second upper region, and a second gate structure on at least top and side surfaces of the second upper region. In an example, a first vertical height of the first lower region is different from a second vertical height of the second lower region by at least 2 nanometers (nm).

Abstract: A method for reducing emissions from a vessel includes isolating the vessel from a downstream fluid flow line, purging a fluid from the vessel by injecting purging media into the vessel to push the fluid through a check valve of a vent tubing and into the downstream fluid flow line, and draining the purging media from the vessel. A first end of the vent tubing is coupled to the housing of the vessel, and a second end of the vent tubing is coupled to the downstream fluid flow line. Further, the vent tubing includes a check valve disposed between the first end and the second end, and the check valve is configured to allow fluid to flow from the housing to the downstream fluid flow line.

Abstract: A transistor structure includes a channel region including first sidewall. A gate electrode includes a first layer having a first portion adjacent to the first sidewall and a second portion adjacent to a gate electrode boundary sidewall. The gate electrode includes a second layer between the first and second portions of the first layer. The first layer has a first composition associated with a first work function material, and has a first lateral thickness from the first sidewall. The second layer has a second composition associated with a second work function material. Depending one a second lateral thickness of the second layer, the second layer may modulate a threshold voltage (VT) of the transistor structure by more or less. In some embodiments, a ratio of the second lateral thickness to the first lateral thickness is less than three.

Abstract: A security system for a vehicle network of a vehicle is provided. The vehicle network includes a gateway and domain controllers for specific areas of the vehicle. The security system may validate messages sent from the gateway. The security system may also utilize split decryption keys in order to decrypt messages in the vehicle network. The security system may also utilize asymmetrical encryption keys in order to secure data within the vehicle network.

Abstract: The present invention relates to the field of firefighter facial masks. More specifically, the present invention relates to a firefighter respirator mask device that is preferably comprised of a body, a facial covering over an opening of an SCBA mask, a fastening mechanism and a filter. The body of the device preferably resembles an ovular shape, or any shape that sufficiently covers the hole left over the mouth of an SCBA mask when not attached to an oxygenated hose, normally present under hazardous conditions. The device is comprised of color-changing technology that allows the facial mask to turn colors in response to pathogenic exposure, indicating to the user that it is no longer sterile. In this manner, the device can be applied to any firefighter or industrial worker requiring the use of an SCBA without risk of possible pathogenic exposure when not attached to an oxygenated hose.

Abstract: A system and method for digital imaging and communications in security (DICOS) standard compliance validation. The system and method may validate both communication messages and files for compliance with the DICOS standard. In some embodiments, the system includes a processor for communicating with a test subject and a memory having program instructions stored thereon for performing a compliance test of the test subject to determine if the test subject is complaint with the DICOS standard. Execution of the instructions by the processor causes the processor to carry out the steps of: confirming that a transmitted DICOS message, e.g., a response or request, from the test subject is compliant with the DICOS standard; logging any errors in the transmitted DICOS message from the test subject in a validation report; and transmitting a simulated DICOS message, e.g., a response or request, to the test subject.

Abstract: Systems, methods, and devices for humidifying a breathing gas are presented. The system includes a base unit, a vapor transfer unit, a nasal cannula, and a liquid container. The base unit includes a blower. The vapor transfer unit is external to the base unit and includes a gas passage, a liquid passage, a gas outlet, and a membrane separating the gas passage and the liquid passage. The membrane permits transfer of vapor into the gas passage from liquid in the liquid passage. The nasal cannula is coupled to the gas outlet. The liquid container is configured to reversibly mate with the base unit.

Abstract: Gate-all-around integrated circuit structures including varactors are described. For example, an integrated circuit structure includes a varactor structure on a semiconductor substrate. The varactor structure includes a plurality of discrete vertical arrangements of horizontal nanowires. A plurality of gate stacks is over and surrounding corresponding ones of the plurality of discrete vertical arrangements of horizontal nanowires. The integrated circuit structure also includes a tap structure adjacent to the varactor structure on the semiconductor substrate. The tap structure includes a plurality of merged vertical arrangements of horizontal nanowires. A plurality of semiconductor structures is over and surrounding corresponding ones of the plurality of merged vertical arrangements of horizontal nanowires.

Abstract: A method of mass spectrometry determines if a mutated variant of a target protein is present in a sample. The method includes subjecting the sample to fragmentation so as to cause the target protein to fragment to form second generation fragment ions, and then mass analysing these fragment ions to obtain spectral data. The method determines if a mutated variant is present in the sample by determining that an ion in the spectral data has a mass to charge ratio that differs from the mass to charge ratio of an ion that would be observed if the target protein was a normal unmutated version of the target protein, and by an amount that corresponds to a mass difference that would be caused by the target protein being a mutated variant of the target protein.

Abstract: Integrated circuitry comprising high voltage (HV) and low voltage (LV) ribbon or wire (RoW) transistor stack structures. In some examples, a gate electrode of the HV and LV transistor stack structures may include the same work function metal. A metal oxide may be deposited around one or more channels of the HV transistor stack, thereby altering the dipole properties of the gate insulator stack from those of the LV transistor stack structure.

Abstract: Systems, methods, and devices for humidifying a breathing gas are presented. The system includes a base unit, a vapor transfer unit, a nasal cannula, and a liquid container. The base unit includes a blower. The vapor transfer unit is external to the base unit and includes a gas passage, a liquid passage, a gas outlet, and a membrane separating the gas passage and the liquid passage. The membrane permits transfer of vapor into the gas passage from liquid in the liquid passage. The nasal cannula is coupled to the gas outlet. The liquid container is configured to reversibly mate with the base unit.

Abstract: A transistor structure includes a first channel layer over a second channel layer, where the first and the second channel layers include monocrystalline silicon. An epitaxial source material is coupled to a first end of the first and second channel layers. An epitaxial drain material is coupled to a second end of the first and second channel layers, a gate electrode is between the epitaxial source material and the epitaxial drain material, and around the first channel layer and around the second channel layer. The transistor structure further includes a first gate dielectric layer between the gate electrode and each of the first channel layer and the second channel layer, where the first gate dielectric layer has a first dielectric constant. A second gate dielectric layer is between the first gate dielectric layer and the gate electrode, where the second gate dielectric layer has a second dielectric constant.

Abstract: Embodiments of the disclosure can include systems, methods, computer-readable media, techniques and methodologies for transactional document processing. Users can utilize documents to complete transactions. A user device, such as a point of sale (POS) device may be used to enter user information as well as capture an image of a check. A financial service server, in communication with the POS device, may forward the request to a document analysis server. The document analysis server may use the information received from the POS device to determine whether the document is approved to be used in a transaction. The document analysis server may obtain financial information from an image of the check. The document analysis server may use the user information and financial information to obtain additional information (e.g., credit history, transaction history, etc.).

Abstract: A security system for a vehicle network of a vehicle is provided. The vehicle network includes a gateway and domain controllers for specific areas of the vehicle. The security system may validate messages sent from the gateway. The security system may also utilize split decryption keys in order to decrypt messages in the vehicle network. The security system may also utilize asymmetrical encryption keys in order to secure data within the vehicle network.

Abstract: This disclosure generally relates to a car seat blanket having one or more slits to accommodate shoulder straps of a car seat and a buckle of a car seat. The slits may include one or more connectors which connect automatically when a child is removed from a car seat. Further, the blanket may include a hood and a foot pocket which may be closed around a child's legs by one or more lengths of ribbon. The blanket may be conveniently rolled and stored by wrapping the ribbon around the blanket and tying a knot in the ribbon.

Abstract: Structures that include a passive device, such as a metal-based resistor, and methods of forming a structure that includes a passive device. The structure includes a semiconductor substrate, an interconnect structure including a passive device, and a dummy fill region arranged between the passive device and the semiconductor substrate. The dummy fill region includes a plurality of shallow trench isolation regions in the semiconductor substrate, a plurality of semiconductor fins, a plurality of source/drain regions in the plurality of semiconductor fins, and a plurality of contacts arranged over the plurality of shallow trench isolation regions.

Abstract: Structures for testing a field effect-transistor or Kelvin field-effect transistor, and methods of forming a structure for testing a field-effect transistor or Kelvin field-effect transistor. The structure includes a device-under-testing that has one or more source/drain regions and a first metallization level arranged over the device-under-testing. The first metallization level includes one or more first interconnect lines. The structure further includes a contact level having one or more first contacts arranged between the first metallization level and the device-under-testing. The one or more first contacts directly connect the one or more first interconnect lines with the one or more source/drain regions. The structure further includes a second metallization level arranged over the first metallization level. The second metallization level has a first test pad and one or more second interconnect lines connecting the one or more first interconnect lines with the first test pad.

Abstract: Structures for testing a field effect-transistor or Kelvin field-effect transistor, and methods of forming a structure for testing a field-effect transistor or Kelvin field-effect transistor. The structure includes a test pad, a device-under-testing having one or more source/drain regions, and a metallization level arranged over the device-under-testing. The metallization level includes one or more interconnect lines that are connected with the test pad. One or more contacts, which are arranged between the metallization level and the device-under-testing, directly connect the one or more interconnect lines with the one or more source/drain regions.

Abstract: Structures that include a passive device, such as a metal-based resistor, and methods of forming a structure that includes a passive device. The structure includes a semiconductor substrate, an interconnect structure including a passive device, and a dummy fill region arranged between the passive device and the semiconductor substrate. The dummy fill region includes a plurality of shallow trench isolation regions in the semiconductor substrate, a plurality of semiconductor fins, a plurality of source/drain regions in the plurality of semiconductor fins, and a plurality of contacts arranged over the plurality of shallow trench isolation regions.