Patents by Inventor Brian LYNN ROWDEN

Brian LYNN ROWDEN has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 10770382
    Abstract: A modular electronics package is disclosed that includes a first and second electronics packages, with each of the first and second electronics packages including a metallized insulating substrate and a solid-state switching device positioned on the metallized insulating substrate, the solid-state switching device comprising a plurality of contact pads electrically coupled to the first conductor layer of the metallized insulating substrate. A conductive joining material is positioned between the first electronics package and the second electronics package to electrically connect them together. The first electronics package and the second electronics package are stacked with one another to form a half-bridge unit cell, with the half-bridge unit cell having a current path through the solid-state switching device in the first electronics package and a close coupled return current path through the solid-state switching device in the second electronics package in opposite flow directions.
    Type: Grant
    Filed: November 29, 2018
    Date of Patent: September 8, 2020
    Assignee: General Electric Company
    Inventors: Christopher James Kapusta, Ramanujam Ramabhadran, Kum-Kang Huh, Brian Lynn Rowden, Glenn Scott Claydon, Ahmed Elasser
  • Publication number: 20200176360
    Abstract: A modular electronics package is disclosed that includes a first and second electronics packages, with each of the first and second electronics packages including a metallized insulating substrate and a solid-state switching device positioned on the metallized insulating substrate, the solid-state switching device comprising a plurality of contact pads electrically coupled to the first conductor layer of the metallized insulating substrate. A conductive joining material is positioned between the first electronics package and the second electronics package to electrically connect them together. The first electronics package and the second electronics package are stacked with one another to form a half-bridge unit cell, with the half-bridge unit cell having a current path through the solid-state switching device in the first electronics package and a close coupled return current path through the solid-state switching device in the second electronics package in opposite flow directions.
    Type: Application
    Filed: November 29, 2018
    Publication date: June 4, 2020
    Inventors: Christopher James Kapusta, Ramanujam Ramabhadran, Kum-Kang Huh, Brian Lynn Rowden, Glenn Scott Claydon, Ahmed Elasser
  • Patent number: 10559553
    Abstract: A power module includes a first bus bar having a first plurality of tabs, wherein each of the first plurality of tabs is electrically coupled to a respective conductive trace of a plurality of conductive traces disposed on a first side; a second bus bar having a second plurality of tabs, wherein each of the second plurality of tabs is electrically coupled to a respective conductive trace of a plurality of conductive traces disposed on a second side; and a third bus bar having a third plurality of tabs, wherein at least one tab of the third plurality of tabs is electrically coupled to a respective conductive trace of the plurality of conductive traces disposed on the first side and at least one tab of the third plurality of tabs is electrically coupled to a respective conductive trace of the plurality of conductive traces disposed on the second side.
    Type: Grant
    Filed: April 9, 2019
    Date of Patent: February 11, 2020
    Assignee: General Electric Company
    Inventors: Brian Lynn Rowden, Ljubisa Dragoljub Stevanovic
  • Publication number: 20190237440
    Abstract: A power module may include a first bus bar having a first plurality of tabs, wherein each of the first plurality of tabs is electrically coupled to a respective conductive trace of a plurality of conductive traces disposed on a first side; a second bus bar having a second plurality of tabs, wherein each of the second plurality of tabs is electrically coupled to a respective conductive trace of a plurality of conductive traces disposed on a second side; and a third bus bar having a third plurality of tabs, wherein at least one tab of the third plurality of tabs is electrically coupled to a respective conductive trace of the plurality of conductive traces disposed on the first side and at least one tab of the third plurality of tabs is electrically coupled to a respective conductive trace of the plurality of conductive traces disposed on the second side.
    Type: Application
    Filed: April 9, 2019
    Publication date: August 1, 2019
    Inventors: Brian Lynn Rowden, Ljubisa Dragoljub Stevanovic
  • Patent number: 10347608
    Abstract: A power module includes a first bus bar having a first plurality of tabs, wherein each of the first plurality of tabs is electrically coupled to a respective conductive trace of a plurality of conductive traces disposed on a first side; a second bus bar having a second plurality of tabs, wherein each of the second plurality of tabs is electrically coupled to a respective conductive trace of a plurality of conductive traces disposed on a second side; and a third bus bar having a third plurality of tabs, wherein at least one tab of the third plurality of tabs is electrically coupled to a respective conductive trace of the plurality of conductive traces disposed on the first side and at least one tab of the third plurality of tabs is electrically coupled to a respective conductive trace of the plurality of conductive traces disposed on the second side.
    Type: Grant
    Filed: May 25, 2017
    Date of Patent: July 9, 2019
    Assignee: GENERAL ELECTRIC COMPANY
    Inventors: Brian Lynn Rowden, Ljubisa Dragoljub Stevanovic
  • Patent number: 9972569
    Abstract: A method and system for a power module is provided. The power module includes a first substrate including a first conductive substrate having a first plurality of power semiconductor switches arranged thereon, and at least one second conductive substrate electrically coupled to the first conductive substrate. A first terminal is electrically coupled to the first conductive substrate. The power module also includes a second substrate including a third conductive substrate having a second plurality of power semiconductor switches arranged thereon, and at least one fourth conductive substrate electrically coupled to the third conductive substrate. The third conductive substrate is electrically coupled to the second conductive substrate. A second terminal is electrically coupled to the fourth conductive substrate.
    Type: Grant
    Filed: April 7, 2017
    Date of Patent: May 15, 2018
    Assignee: GENERAL ELECTRIC COMPANY
    Inventors: Brian Lynn Rowden, Ljubisa Dragoljub Stevanovic
  • Patent number: 9893646
    Abstract: A method and system for a power module device is provided. The device includes a base, a circuit board including a plurality of gated switches formed of a semiconductor material, and an electrical bus member configured to connect to a voltage source having a first polarity. The bus member includes a length that is substantially greater than a width of the bus member and the width is substantially greater than a thickness of the bus member. The power module device also includes a second bus member configured to connect to a voltage source having a second polarity. The second bus member is positioned in a nested face-to-face configuration with respect to the first bus member. The power module device further includes a layer of electrical insulation positioned between the first bus member and the second bus member.
    Type: Grant
    Filed: September 30, 2015
    Date of Patent: February 13, 2018
    Assignee: General Electric Company
    Inventors: Brian Lynn Rowden, Ljubisa Dragoljub Stevanovic
  • Publication number: 20170345799
    Abstract: A power module may include a first bus bar having a first plurality of tabs, wherein each of the first plurality of tabs is electrically coupled to a respective conductive trace of a plurality of conductive traces disposed on a first side; a second bus bar having a second plurality of tabs, wherein each of the second plurality of tabs is electrically coupled to a respective conductive trace of a plurality of conductive traces disposed on a second side; and a third bus bar having a third plurality of tabs, wherein at least one tab of the third plurality of tabs is electrically coupled to a respective conductive trace of the plurality of conductive traces disposed on the first side and at least one tab of the third plurality of tabs is electrically coupled to a respective conductive trace of the plurality of conductive traces disposed on the second side.
    Type: Application
    Filed: May 25, 2017
    Publication date: November 30, 2017
    Inventors: Brian Lynn ROWDEN, Ljubisa Dragoljub STEVANOVIC
  • Publication number: 20170294373
    Abstract: A method and system for a power module is provided. The power module includes a first substrate including a first conductive substrate having a first plurality of power semiconductor switches arranged thereon, and at least one second conductive substrate electrically coupled to the first conductive substrate. A first terminal is electrically coupled to the first conductive substrate. The power module also includes a second substrate including a third conductive substrate having a second plurality of power semiconductor switches arranged thereon, and at least one fourth conductive substrate electrically coupled to the third conductive substrate. The third conductive substrate is electrically coupled to the second conductive substrate. A second terminal is electrically coupled to the fourth conductive substrate.
    Type: Application
    Filed: April 7, 2017
    Publication date: October 12, 2017
    Inventors: Brian Lynn Rowden, Ljubisa Dragoljub Stevanovic
  • Publication number: 20170093302
    Abstract: A method and system for a power module device is provided. The device includes a base, a circuit board including a plurality of gated switches formed of a semiconductor material, and an electrical bus member configured to connect to a voltage source having a first polarity. The bus member includes a length that is substantially greater than a width of the bus member and the width is substantially greater than a thickness of the bus member. The power module device also includes a second bus member configured to connect to a voltage source having a second polarity. The second bus member is positioned in a nested face-to-face configuration with respect to the first bus member. The power module device further includes a layer of electrical insulation positioned between the first bus member and the second bus member.
    Type: Application
    Filed: September 30, 2015
    Publication date: March 30, 2017
    Inventors: Brian Lynn Rowden, Ljubisa Dragoljub Stevanovic
  • Patent number: 9337163
    Abstract: A surface mount package includes at least one semiconductor device and a POL packaging and interconnect system formed about the at least one semiconductor device that is configured enable mounting of the surface mount package to an external circuit. The POL system includes a dielectric layer overlying a first surface of the semiconductor device(s) and a metal interconnect structure extending through vias formed through the dielectric layer so as to be electrically coupled to connection pads on the semiconductor device(s). A metallization layer is formed over the metal interconnect structure that comprises a flat planar structure, and a double-sided ceramic substrate is positioned on a second surface of the semiconductor device(s), with the double-sided ceramic substrate being configured to electrically isolate a drain of the semiconductor device(s) from an external circuit when the surface mount package is joined thereto and to conduct heat away from the semiconductor device(s).
    Type: Grant
    Filed: November 13, 2012
    Date of Patent: May 10, 2016
    Assignee: General Electric Company
    Inventors: Eladio Clemente Delgado, John Stanley Glaser, Brian Lynn Rowden
  • Patent number: 9142484
    Abstract: An integrated power module includes a substantially planar insulated metal substrate having at least one cut-out region; at least one substantially planar ceramic substrate disposed within the cut-out region, wherein the ceramic substrate is framed on at least two sides by the insulated metal substrate, the ceramic substrate including a first metal layer on a first side and a second metal layer on a second side; at least one power semiconductor device coupled to the first side of the ceramic substrate; at least one control device coupled to a first surface of the insulated metal substrate; a power overlay electrically connecting the at least one semiconductor power device and the at least one control device; and a cooling fluid reservoir operatively connected to the second metal layer of the at least one ceramic substrate, wherein a plurality of cooling fluid passages are provided in the cooling fluid reservoir.
    Type: Grant
    Filed: October 8, 2014
    Date of Patent: September 22, 2015
    Assignee: General Electric Company
    Inventors: Eladio Clemente Delgado, John Stanley Glaser, Brian Lynn Rowden
  • Publication number: 20150024553
    Abstract: An integrated power module includes a substantially planar insulated metal substrate having at least one cut-out region; at least one substantially planar ceramic substrate disposed within the cut-out region, wherein the ceramic substrate is framed on at least two sides by the insulated metal substrate, the ceramic substrate including a first metal layer on a first side and a second metal layer on a second side; at least one power semiconductor device coupled to the first side of the ceramic substrate; at least one control device coupled to a first surface of the insulated metal substrate; a power overlay electrically connecting the at least one semiconductor power device and the at least one control device; and a cooling fluid reservoir operatively connected to the second metal layer of the at least one ceramic substrate, wherein a plurality of cooling fluid passages are provided in the cooling fluid reservoir.
    Type: Application
    Filed: October 8, 2014
    Publication date: January 22, 2015
    Inventors: Eladio Clemente Delgado, John Stanley Glaser, Brian Lynn Rowden
  • Patent number: 8872328
    Abstract: An integrated power module includes a substantially planar insulated metal substrate having at least one cut-out region; at least one substantially planar ceramic substrate disposed within the cut-out region, wherein the ceramic substrate is framed on at least two sides by the insulated metal substrate, the ceramic substrate including a first metal layer on a first side and a second metal layer on a second side; at least one power semiconductor device coupled to the first side of the ceramic substrate; at least one control device coupled to a first surface of the insulated metal substrate; a power overlay electrically connecting the at least one semiconductor power device and the at least one control device; and a cooling fluid reservoir operatively connected to the second metal layer of the at least one ceramic substrate, wherein a plurality of cooling fluid passages are provided in the cooling fluid reservoir.
    Type: Grant
    Filed: December 19, 2012
    Date of Patent: October 28, 2014
    Assignee: General Electric Company
    Inventors: Eladio Clemente Delgado, John Stanley Glaser, Brian Lynn Rowden
  • Publication number: 20140167248
    Abstract: An integrated power module includes a substantially planar insulated metal substrate having at least one cut-out region; at least one substantially planar ceramic substrate disposed within the cut-out region, wherein the ceramic substrate is framed on at least two sides by the insulated metal substrate, the ceramic substrate including a first metal layer on a first side and a second metal layer on a second side; at least one power semiconductor device coupled to the first side of the ceramic substrate; at least one control device coupled to a first surface of the insulated metal substrate; a power overlay electrically connecting the at least one semiconductor power device and the at least one control device; and a cooling fluid reservoir operatively connected to the second metal layer of the at least one ceramic substrate, wherein a plurality of cooling fluid passages are provided in the cooling fluid reservoir.
    Type: Application
    Filed: December 19, 2012
    Publication date: June 19, 2014
    Applicant: General Electric Company
    Inventors: Eladio Clemente Delgado, John Stanley Glaser, Brian Lynn Rowden
  • Publication number: 20140133104
    Abstract: A surface mount package includes at least one semiconductor device and a POL packaging and interconnect system formed about the at least one semiconductor device that is configured enable mounting of the surface mount package to an external circuit. The POL system includes a dielectric layer overlying a first surface of the semiconductor device(s) and a metal interconnect structure extending through vias formed through the dielectric layer so as to be electrically coupled to connection pads on the semiconductor device(s). A metallization layer is formed over the metal interconnect structure that comprises a flat planar structure, and a double-sided ceramic substrate is positioned on a second surface of the semiconductor device(s), with the double-sided ceramic substrate being configured to electrically isolate a drain of the semiconductor device(s) from an external circuit when the surface mount package is joined thereto and to conduct heat away from the semiconductor device(s).
    Type: Application
    Filed: November 13, 2012
    Publication date: May 15, 2014
    Applicant: GENERAL ELECTRIC COMPANY
    Inventors: Eladio Clemente Delgado, John Stanley Glaser, Brian Lynn Rowden
  • Patent number: 8622754
    Abstract: A flexible power connector is presented.
    Type: Grant
    Filed: July 31, 2011
    Date of Patent: January 7, 2014
    Assignee: General Electric Company
    Inventors: Eladio Clemente Delgado, Richard Alfred Beaupre, Brian Lynn Rowden
  • Patent number: 8592986
    Abstract: A high melting point soldering layer includes a low melting point metal layer, a first high melting point metal layer disposed on a surface of the low melting point metal layer, and a second high melting point metal layer disposed at a back side of the low melting point metal layer. The low melting point metal layer, the first high melting point metal layer, and the second high melting point metal layer are mutually alloyed by transient liquid phase bonding, by annealing not less than a melting temperature of the low melting point metal layer, diffusing the metal of the low melting point metal layer into an alloy of the first high melting point metal layer and the second high melting point metal layer. The high melting point soldering layer has a higher melting point temperature than that of the low melting point metal layer.
    Type: Grant
    Filed: November 9, 2010
    Date of Patent: November 26, 2013
    Assignees: Rohm Co., Ltd., The Board of Trustees of the University of Arkansas
    Inventors: Takukazu Otsuka, Keiji Okumura, Brian Lynn Rowden
  • Patent number: 8487416
    Abstract: A power module includes at least one semiconductor die holding structure. Each die holding structure has a substantially cylindrical outer profile and a central axis. Each die holding structure is disposed within a common cylindrical EMI shield. A plurality of semiconductor devices are mounted to each die holding structure to form a substantially symmetric die mounting pattern respect to the central axis of the die holding structure.
    Type: Grant
    Filed: September 28, 2011
    Date of Patent: July 16, 2013
    Assignee: General Electric Company
    Inventors: Eladio Clemente Delgado, Arun Virupaksha Gowda, Antonio Caiafa, Brian Lynn Rowden, Ljubisa Dragoljub Stevanovic, Richard Alfred Beaupre
  • Publication number: 20130075878
    Abstract: A power module includes at least one semiconductor die holding structure. Each die holding structure has a substantially cylindrical outer profile and a central axis. Each die holding structure is disposed within a common cylindrical EMI shield. A plurality of semiconductor devices are mounted to each die holding structure to form a substantially symmetric die mounting pattern respect to the central axis of the die holding structure.
    Type: Application
    Filed: September 28, 2011
    Publication date: March 28, 2013
    Applicant: GENERAL ELECTRIC COMPANY
    Inventors: Eladio Clemente Delgado, Arun Virupaksha Gowda, Antonio Caiafa, Brian Lynn Rowden, Ljubisa Dragoljub Stevanovic, Richard Alfred Beaupre