Patents by Inventor Brian T. Vanderpool

Brian T. Vanderpool has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 9832030
    Abstract: An approach is described for routing data to a plurality of output terminals via a integrated switch router including a crossbar switch having both a crossbar and a plurality of crossbar bypass lines. Whereas the crossbar may connect each input of the crossbar switch to each output of the crossbar switch, each of the plurality of crossbar bypass lines may connect a single input of the crossbar switch to a corresponding single output of the crossbar switch. According to such approach, a replicated copy of a multicast packet may be forwarded to an output terminal via a crossbar bypass line in parallel with other data forwarded via the crossbar, thus increasing integrated switch router bandwidth.
    Type: Grant
    Filed: January 21, 2014
    Date of Patent: November 28, 2017
    Assignee: INTERNATIONAL BUSINESS MACHINES CORPORATION
    Inventors: Claude Basso, Nikolaos Chrysos, Cyriel J. Minkenberg, Mark L. Rudquist, David A. Shedivy, Brian T. Vanderpool
  • Patent number: 9722810
    Abstract: A method for synchronizing multicast message subflows in a switched network includes associating, with a processing device, a first destination identifier corresponding to a multicast message with a first queue that corresponds to a first output port of a switching device, associating, with a processing device, a second destination identifier corresponding to the multicast message with a second queue that corresponds to a second output port of the switching device, pausing the first queue in response to a message counter corresponding to the first queue crossing a first predetermined threshold, and unpausing the first queue in response to the message counter crossing a second predetermined threshold, wherein the message counter indicates a quantity of data that has been forwarded by the first queue but remains to be forwarded by the second queue.
    Type: Grant
    Filed: February 3, 2014
    Date of Patent: August 1, 2017
    Assignee: INTERNATIONAL BUSINESS MACHINES CORPORATION
    Inventors: Claude Basso, Nikolaos Chrysos, Cyriel Minkenberg, David A. Shedivy, Kenneth M. Valk, Brian T. Vanderpool
  • Patent number: 9684618
    Abstract: A sideband PCI Express (PCIe) packet initiator in a distributed PCIe switch fabric verifies a PCIe connection between a host device and a PCIe endpoint device without having to power on the host device. The packet initiator assembles a PCIe test packet that acts as a ping for testing reachability of the endpoint device, from the perspective of the host device. The test packet may also verify configurations and settings of the path to the endpoint device. The distributed switch fabric is configured to compare completion data with expected results to verify the PCIe connection, without having to boot the host device.
    Type: Grant
    Filed: April 11, 2014
    Date of Patent: June 20, 2017
    Assignee: INTERNATIONAL BUSINESS MACHINES CORPORATION
    Inventors: Elizabeth A. McGlone, Brian T. Vanderpool, Jeffrey B. Williams, Curtis C. Wollbrink
  • Patent number: 9678906
    Abstract: A method for scheduling a crossbar using distributed request-grant-accept arbitration between input group arbiters and output group arbiters in a switch unit is provided. Each input group arbiter and output group arbiter maintains an ordered queue of links in an input group or an output group. The ordered queue prioritizes links in the output group or output group that was least recently selected. To satisfy an arbitration slot won on the group-level, the input group arbiter or output group arbiter starts a search from the oldest link that was selected and maintains fairness among links in the group.
    Type: Grant
    Filed: March 26, 2014
    Date of Patent: June 13, 2017
    Assignee: INTERNATIONAL BUSINESS MACHINES CORPORATION
    Inventors: Nikolaos Chrysos, Brian T. Vanderpool
  • Patent number: 9678907
    Abstract: A method for scheduling a crossbar using distributed request-grant-accept arbitration between input group arbiters and output group arbiters in a switch unit is provided. Each input group arbiter and output group arbiter maintains an ordered queue of links in an input group or an output group. The ordered queue prioritizes links in the output group or output group that was least recently selected. To satisfy an arbitration slot won on the group-level, the input group arbiter or output group arbiter starts a search from the oldest link that was selected and maintains fairness among links in the group.
    Type: Grant
    Filed: April 14, 2014
    Date of Patent: June 13, 2017
    Assignee: INTERNATIONAL BUSINESS MACHINES CORPORATION
    Inventors: Nikolaos Chrysos, Brian T. Vanderpool
  • Patent number: 9667564
    Abstract: A method and system are provided for implementing a hierarchical high radix switch with a time-sliced crossbar. The hierarchical high radix switch includes a plurality of inputs and a plurality of outputs. Each input belongs to one input group; each input group sends consolidated requests to each output, by ORing the requests from the local input ports in that input group. Each output port belongs to one output group; each output port grants one of the requesting input groups using a rotating priority defined by a next-to-serve pointer. Each output group consolidates the output port grants and allows one grant to pass back to an input group. Each input port in an input group evaluates all incoming grants in an oldest packet first manner to form an accept. Each input group consolidates the input port accepts and selects one accept to send to the output port.
    Type: Grant
    Filed: August 28, 2013
    Date of Patent: May 30, 2017
    Assignee: International Business Machines Corporation
    Inventors: Nikolaos Chrysos, Girish G. Kurup, Cyriel J. Minkenberg, Anil Pothireddy, Mark L. Rudquist, Vibhor K. Srivastava, Brian T. Vanderpool
  • Patent number: 9571292
    Abstract: An approach is described for routing data to a plurality of output terminals via a integrated switch router including a crossbar switch having both a crossbar and a plurality of crossbar bypass lines. Whereas the crossbar may connect each input of the crossbar switch to each output of the crossbar switch, each of the plurality of crossbar bypass lines may connect a single input of the crossbar switch to a corresponding single output of the crossbar switch. According to such approach, a replicated copy of a multicast packet may be forwarded to an output terminal via a crossbar bypass line in parallel with other data forwarded via the crossbar, thus increasing integrated switch router bandwidth.
    Type: Grant
    Filed: January 31, 2014
    Date of Patent: February 14, 2017
    Assignee: INTERNATIONAL BUSINESS MACHINES CORPORATION
    Inventors: Claude Basso, Nikolaos Chrysos, Cyriel J. Minkenberg, Mark L. Rudquist, David A. Shedivy, Brian T. Vanderpool
  • Patent number: 9563591
    Abstract: A sideband PCI Express (PCIe) packet initiator in a distributed PCIe switch fabric verifies a PCIe connection between a host device and a PCIe endpoint device without having to power on the host device. The packet initiator assembles a PCIe test packet that acts as a ping for testing reachability of the endpoint device, from the perspective of the host device. The test packet may also verify configurations and settings of the path to the endpoint device. The distributed switch fabric is configured to compare completion data with expected results to verify the PCIe connection, without having to boot the host device.
    Type: Grant
    Filed: March 6, 2014
    Date of Patent: February 7, 2017
    Assignee: INTERNATIONAL BUSINESS MACHINES CORPORATION
    Inventors: Elizabeth A. McGlone, Brian T. Vanderpool, Jeffrey B. Williams, Curtis C. Wollbrink
  • Patent number: 9479455
    Abstract: A method for scheduling a crossbar using distributed request-grant-accept arbitration between input group arbiters and output group arbiters in a switch unit is provided. The switch unit may be a hierarchical high radix switch with a timesliced crossbar that is configured to transfer packets between a plurality of input ports and a plurality of output ports, organized into groups, using wide words. The timesliced crossbar transfers data for a given packet once per supercycle, in a designated timeslice of that supercycle. Multiple buffered packets from one input port to multiple output ports are transferred by utilizing different timeslices of the supercycle.
    Type: Grant
    Filed: April 25, 2014
    Date of Patent: October 25, 2016
    Assignee: INTERNATIONAL BUSINESS MACHINES CORPORATION
    Inventors: Nikolaos Chrysos, Girish Gopala Kurup, Cyriel J. Minkenberg, Anil Pothireddy, Vibhor K. Srivastava, Brian T. Vanderpool
  • Patent number: 9467396
    Abstract: A method for scheduling a crossbar using distributed request-grant-accept arbitration between input group arbiters and output group arbiters in a switch unit is provided. The switch unit may be a hierarchical high radix switch with a timesliced crossbar that is configured to transfer packets between a plurality of input ports and a plurality of output ports, organized into groups, using wide words. The timesliced crossbar transfers data for a given packet once per supercycle, in a designated timeslice of that supercycle. Multiple buffered packets from one input port to multiple output ports are transferred by utilizing different timeslices of the supercycle.
    Type: Grant
    Filed: April 11, 2014
    Date of Patent: October 11, 2016
    Assignee: INTERNATIONAL BUSINESS MACHINES CORPORATION
    Inventors: Nikolaos Chrysos, Girish Gopala Kurup, Cyriel J. Minkenberg, Anil Pothireddy, Vibhor K. Srivastava, Brian T. Vanderpool
  • Patent number: 9455926
    Abstract: To prevent buffer overflow, a receiving entity may use credits to control the total amount of packets any single transmitting entity can forward. Once the assigned credits are spent, the transmitting entity cannot send data portions to the receiving entity until additional credits are provided. However, the logic in the receiving entity may be designed to manage a maximum number of credits that is less than the capacity of the buffer in the transmitting entity. For example, the receiving entity is designed to manage a maximum of eight credits but the buffer has room for twelve data portions. To use the buffer efficiently, the transmitting entity may identify when extra buffer storage is available and provide additional credits. In addition, the transmitting entity may control when the credits are provided such that the receiving entity is not allocated more credits that it was designed to manage.
    Type: Grant
    Filed: December 8, 2014
    Date of Patent: September 27, 2016
    Assignee: GLOBALFOUNDRIES INC.
    Inventors: Prakash B. Baratam, Brian T. Vanderpool
  • Patent number: 9444758
    Abstract: Techniques are disclosed to transmit packets by a network switch and according to a link protocol while reducing incidence of intra-packet transmission gaps unsupported by the link protocol. Whether a packet satisfies an underflow risk condition is determined by evaluating, for each of one or more cycles since receipt of one or more flits of the packet, a respective count of flits of the packet received by the network switch in the respective cycle. Only upon determining that the packet satisfies the underflow risk condition is selective underflow protection performed for the packet, including buffering an increased count of flits of the packet, prior to commencing transmission of the packet.
    Type: Grant
    Filed: February 24, 2014
    Date of Patent: September 13, 2016
    Assignee: INTERNATIONAL BUSINESS MACHINES CORPORATION
    Inventors: Prakash B. Baratam, Brian T. Vanderpool
  • Patent number: 9419912
    Abstract: Techniques are disclosed to transmit packets by a network switch and according to a link protocol while reducing incidence of intra-packet transmission gaps unsupported by the link protocol. Whether a packet satisfies an underflow risk condition is determined by evaluating, for each of one or more cycles since receipt of one or more flits of the packet, a respective count of flits of the packet received by the network switch in the respective cycle. Only upon determining that the packet satisfies the underflow risk condition is selective underflow protection performed for the packet, including buffering an increased count of flits of the packet, prior to commencing transmission of the packet.
    Type: Grant
    Filed: February 11, 2014
    Date of Patent: August 16, 2016
    Assignee: INTERNATIONAL BUSINESS MACHINES CORPORATION
    Inventors: Prakash B. Baratam, Brian T. Vanderpool
  • Patent number: 9336169
    Abstract: Techniques are disclosed to provide arbitration between input ports and output ports of a switch. For each of at least one input port of a group of input ports, a respective request is received specifying for the respective input port to be allocated a clock cycle in which to send data to a group of output ports. A grant of the request of a primary input port is issued at each clock cycle, the primary input port including a first input port of the at least one input port. Upon a determination, subsequent to a first clock cycle count elapsing, that an input arbiter has not yet accepted any grant of the request of the primary input port, a grant is issued at each clock cycle, including alternating between issuing a grant of the request of the primary input port and of an alternate input port, respectively.
    Type: Grant
    Filed: October 2, 2013
    Date of Patent: May 10, 2016
    Assignee: International Business Machines Corporation
    Inventors: Vibhor K. Srivastava, Brian T. Vanderpool
  • Patent number: 9323703
    Abstract: Techniques are disclosed to provide arbitration between input ports and output ports of a switch. For each of at least one input port of a group of input ports, a respective request is received specifying for the respective input port to be allocated a clock cycle in which to send data to a group of output ports. A grant of the request of a primary input port is issued at each clock cycle, the primary input port including a first input port of the at least one input port. Upon a determination, subsequent to a first clock cycle count elapsing, that an input arbiter has not yet accepted any grant of the request of the primary input port, a grant is issued at each clock cycle, including alternating between issuing a grant of the request of the primary input port and of an alternate input port, respectively.
    Type: Grant
    Filed: October 17, 2013
    Date of Patent: April 26, 2016
    Assignee: International Business Machines Corporation
    Inventors: Vibhor K. Srivastava, Brian T. Vanderpool
  • Patent number: 9207999
    Abstract: Programmable data recorders are provided in a network semiconductor chip to monitor and record all or portions of data from various interfaces, including the input and output interfaces of network links interfacing the chip. A data recorder is provided for each network link. The data recorders store captured data in storage arrays. Data may be compressed and associated with time stamps to conserve space in the storage arrays. A data recorder manager in the chip may start and stop the data recorders at approximately the same time. The programmable mode of the data recorders determines which interfaces are monitored, the portion of data captured, and the format of the data in the storage arrays.
    Type: Grant
    Filed: October 16, 2013
    Date of Patent: December 8, 2015
    Assignee: International Business Machines Corporation
    Inventors: Scott D. Clark, Ashish A. More, Anil Pothireddy, Sudheendra K. Srivathsa, Brian T. Vanderpool
  • Patent number: 9178832
    Abstract: To prevent buffer overflow, a receiving entity may use credits to control the total amount of packets any single transmitting entity can forward. Once the assigned credits are spent, the transmitting entity cannot send data portions to the receiving entity until additional credits are provided. However, the logic in the receiving entity may be designed to manage a maximum number of credits that is less than the capacity of the buffer in the transmitting entity. For example, the receiving entity is designed to manage a maximum of eight credits but the buffer has room for twelve data portions. To use the buffer efficiently, the transmitting entity may identify when extra buffer storage is available and provide additional credits. In addition, the transmitting entity may control when the credits are provided such that the receiving entity is not allocated more credits that it was designed to manage.
    Type: Grant
    Filed: July 11, 2013
    Date of Patent: November 3, 2015
    Assignee: International Business Machines Corporation
    Inventors: Prakash B. Baratam, Brian T. Vanderpool
  • Publication number: 20150295857
    Abstract: A method for scheduling a crossbar using distributed request-grant-accept arbitration between input group arbiters and output group arbiters in a switch unit is provided. The switch unit may be a hierarchical high radix switch with a timesliced crossbar that is configured to transfer packets between a plurality of input ports and a plurality of output ports, organized into groups, using wide words. The timesliced crossbar transfers data for a given packet once per supercycle, in a designated timeslice of that supercycle. Multiple buffered packets from one input port to multiple output ports are transferred by utilizing different timeslices of the supercycle.
    Type: Application
    Filed: April 25, 2014
    Publication date: October 15, 2015
    Applicant: INTERNATIONAL BUSINESS MACHINES CORPORATION
    Inventors: Nikolaos CHRYSOS, Girish GOPALA KURUP, Cyriel J. MINKENBERG, Anil POTHIREDDY, Vibhor K. SRIVASTAVA, Brian T. VANDERPOOL
  • Publication number: 20150295858
    Abstract: A method for scheduling a crossbar using distributed request-grant-accept arbitration between input group arbiters and output group arbiters in a switch unit is provided. The switch unit may be a hierarchical high radix switch with a timesliced crossbar that is configured to transfer packets between a plurality of input ports and a plurality of output ports, organized into groups, using wide words. The timesliced crossbar transfers data for a given packet once per supercycle, in a designated timeslice of that supercycle. Multiple buffered packets from one input port to multiple output ports are transferred by utilizing different timeslices of the supercycle.
    Type: Application
    Filed: April 11, 2014
    Publication date: October 15, 2015
    Applicant: INTERNATIONAL BUSINESS MACHINES CORPORATION
    Inventors: Nikolaos CHRYSOS, Girish GOPALA KURUP, Cyriel J. MINKENBERG, Anil POTHIREDDY, Vibhor K. SRIVASTAVA, Brian T. VANDERPOOL
  • Publication number: 20150278136
    Abstract: A method for scheduling a crossbar using distributed request-grant-accept arbitration between input group arbiters and output group arbiters in a switch unit is provided. Each input group arbiter and output group arbiter maintains an ordered queue of links in an input group or an output group. The ordered queue prioritizes links in the output group or output group that was least recently selected. To satisfy an arbitration slot won on the group-level, the input group arbiter or output group arbiter starts a search from the oldest link that was selected and maintains fairness among links in the group.
    Type: Application
    Filed: April 14, 2014
    Publication date: October 1, 2015
    Applicant: International Business Machines Corporation
    Inventors: Nikolaos CHRYSOS, Brian T. VANDERPOOL