Patents by Inventor Brijesh Tripathi

Brijesh Tripathi has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20200192500
    Abstract: An electronic device may be provided with a display. The display may be a variable frame rate display capable of adaptively adjusting a frame rate at which display frames are displayed in response to information associated with the current state of operation of the device. The information may be gathered using control circuitry in the electronic device. The control circuitry may gather the information for adjusting the frame rate by monitoring the electronic device power supply configuration, other device components, the type of content to be displayed, and user-input signals. The control circuitry may adjust the frame rate based on the gathered information by increasing or decreasing the frame rate. The control circuitry may be formed as a portion of display control circuitry for the device such as a display driver integrated circuit or may be formed as a portion of storage and processing circuitry external to the display.
    Type: Application
    Filed: February 26, 2020
    Publication date: June 18, 2020
    Inventors: Brijesh Tripathi, Jean-Pierre S. Guillou
  • Publication number: 20200149932
    Abstract: In an embodiment, a system on a chip (SOC) includes a component that remains powered when the remainder of the SOC is powered off. The component may include a sensor capture unit to capture data from various device sensors, and may filter the captured sensor data. Responsive to the filtering, the component may wake up the remainder of the SOC to permit the processing. The component may store programmable configuration data, matching the state at the time the SOC was most recently powered down, for the other components of the SOC, in order to reprogram them after wakeup. In some embodiments, the component may be configured to wake up the memory controller within the SOC and the path to the memory controller, in order to write the data to memory. The remainder of the SOC may remain powered down.
    Type: Application
    Filed: November 20, 2019
    Publication date: May 14, 2020
    Inventors: Brijesh Tripathi, Shane J. Keil, Manu Gulati, Jung Wook Cho, Erik P. Machnicki, Gilbert H. Herbeck, Timothy J. Millet, Joshua P. de Cesare, Anand Dalal
  • Publication number: 20200127941
    Abstract: A method of communication in a vehicle network is provided. An example method includes transmitting a network allocation map in a TDMA cycle, indicating reservation of time slots in the TDMA cycle. The method further includes transmitting a synchronization signal in the TDMA cycle, to synchronize the timing of nodes in the vehicle network. Each of the reserved time slots is identified by at least a network ID of a transmitting node in the vehicle network, and a slot type comprising one of a low latency traffic slot, and a bulk traffic slot. Further, the low latency traffic slots are repeated in the TDMA cycle at least as frequently as a guaranteed QoS latency parameter. Further, the bulk traffic slots are at least as long as a guaranteed QoS throughput parameter.
    Type: Application
    Filed: October 21, 2019
    Publication date: April 23, 2020
    Inventors: Adnan Esmail, Prashant Joshi, Sundar Balasubramaniam, Brijesh Tripathi, Gaurav Chandra
  • Publication number: 20200128061
    Abstract: A method and system of aggregating and converting data in a vehicle network is provided. An example method includes receiving a plurality of streams of sensor data over two or more Camera Serial Interface (CSI). The method further includes rearranging the plurality of streams of sensor data into an aggregate stream. The method further includes packetizing the aggregate stream by arranging transmission format bits at appropriate bit positions of the aggregate stream to form a packet data stream. The method further includes transmitting the packet data stream over a vehicle on-board packet data link.
    Type: Application
    Filed: October 21, 2019
    Publication date: April 23, 2020
    Inventors: Adnan Esmail, Prashant Joshi, Sundar Balasubramaniam, Brijesh Tripathi
  • Patent number: 10592021
    Abstract: An electronic device may be provided with a display. The display may be a variable frame rate display capable of adaptively adjusting a frame rate at which display frames are displayed in response to information associated with the current state of operation of the device. The information may be gathered using control circuitry in the electronic device. The control circuitry may gather the information for adjusting the frame rate by monitoring the electronic device power supply configuration, other device components, the type of content to be displayed, and user-input signals. The control circuitry may adjust the frame rate based on the gathered information by increasing or decreasing the frame rate. The control circuitry may be formed as a portion of display control circuitry for the device such as a display driver integrated circuit or may be formed as a portion of storage and processing circuitry external to the display.
    Type: Grant
    Filed: July 5, 2018
    Date of Patent: March 17, 2020
    Assignee: Apple Inc.
    Inventors: Brijesh Tripathi, Jean-Pierre S. Guillou
  • Publication number: 20190391587
    Abstract: An image captured using a sensor on a vehicle is received and decomposed into a plurality of component images. Each component image of the plurality of component images is provided as a different input to a different layer of a plurality of layers of an artificial neural network to determine a result. The result of the artificial neural network is used to at least in part autonomously operate the vehicle.
    Type: Application
    Filed: June 20, 2018
    Publication date: December 26, 2019
    Inventors: Timofey Uvarov, Brijesh Tripathi, Evgene Fainstain
  • Patent number: 10515028
    Abstract: An apparatus and method for encoding data are disclosed that may allow for performing periodic calibration operations on a communication link. A controller may determine multiple possible values for a reference voltage used with the communication link based on an initial value. Calibration operations may be performed using each possible value, and the results of the operations scored based on the width of data eyes measured during the calibration operations. The controller may then select a new value for the reference voltage from the multiple possible values dependent upon the scores of each of the multiple possible values.
    Type: Grant
    Filed: July 9, 2018
    Date of Patent: December 24, 2019
    Assignee: Apple Inc.
    Inventors: Robert E. Jeter, Brijesh Tripathi, Kiran Kattel, Rakesh L. Notani, Fabien S. Faure, Sukalpa Biswas, Kai Lun Hsiung, Neeraj Parik, Venkata Ramana Malladi, Shiva Kumar, Chaitanya Polapragada, Allen Kim
  • Patent number: 10488230
    Abstract: In an embodiment, a system on a chip (SOC) includes a component that remains powered when the remainder of the SOC is powered off. The component may include a sensor capture unit to capture data from various device sensors, and may filter the captured sensor data. Responsive to the filtering, the component may wake up the remainder of the SOC to permit the processing. The component may store programmable configuration data, matching the state at the time the SOC was most recently powered down, for the other components of the SOC, in order to reprogram them after wakeup. In some embodiments, the component may be configured to wake up the memory controller within the SOC and the path to the memory controller, in order to write the data to memory. The remainder of the SOC may remain powered down.
    Type: Grant
    Filed: June 26, 2018
    Date of Patent: November 26, 2019
    Assignee: Apple Inc.
    Inventors: Brijesh Tripathi, Shane J. Keil, Manu Gulati, Jung Wook Cho, Erik P. Machnicki, Gilbert H. Herbeck, Timothy J. Millet, Joshua P. de Cesare, Anand Dalal
  • Publication number: 20190248310
    Abstract: A wiring system for an automobile connecting a processor and a plurality of devices, using one or more backbone sections. The processor and devices are connected to one another to form a first loop and a second loop, such that data may be transmitted along the first loop and data may be transmitted along the second loop.
    Type: Application
    Filed: February 8, 2019
    Publication date: August 15, 2019
    Applicant: Tesla, Inc.
    Inventors: Adnan Esmail, In Jae Chung, Lakshya Jain, Brijesh Tripathi
  • Publication number: 20190214164
    Abstract: A cable includes a plurality of differential conductors and a plurality of drain conductors. The differential conductors and the drain conductors are arranged in the form of groups such that each group comprises a pair of differential conductors and a pair of drain conductors and defines a communication pathway for communicating signals. The cable includes a body formed around the plurality of differential conductors and the plurality of drain conductors.
    Type: Application
    Filed: December 21, 2018
    Publication date: July 11, 2019
    Applicant: Tesla, Inc.
    Inventors: In Jae Chung, Adnan Esmail, Lukas Josef Pankau, Lakshya Jain, Brijesh Tripathi
  • Patent number: 10319333
    Abstract: In a graphics system, pixels may be provided to a graphics display at a pixel clock rate corresponding to an actual refresh rate nearest to and lower than a desired/target refresh rate. A number of additional pixels may be provided with the pixels for each image frame. The number is based at least on the actual refresh rate, target refresh rate, and a pixel-resolution of the image frame, such that providing pixels of an image frame and the number of additional pixels for each image frame at the pixel clock rate results in an effective refresh rate matching the target refresh rate. The additional pixels may be provided by adding one or more pixels at the end of each horizontal line of the image frame, or by adding an extra partial line in the vertical blanking interval. The additional pixels are not displayed and do not adversely affect normal operation.
    Type: Grant
    Filed: September 26, 2012
    Date of Patent: June 11, 2019
    Assignee: Apple Inc.
    Inventor: Brijesh Tripathi
  • Patent number: 10261894
    Abstract: In an embodiment, a system on a chip (SOC) includes a component that remains powered when the remainder of the SOC is powered off. The component may include a sensor capture unit to capture data from various device sensors, and may filter the captured sensor data. Responsive to the filtering, the component may wake up the remainder of the SOC to permit the processing. The component may store programmable configuration data, matching the state at the time the SOC was most recently powered down, for the other components of the SOC, in order to reprogram them after wakeup. In some embodiments, the component may be configured to wake up the memory controller within the SOC and the path to the memory controller, in order to write the data to memory. The remainder of the SOC may remain powered down.
    Type: Grant
    Filed: March 2, 2017
    Date of Patent: April 16, 2019
    Assignee: Apple Inc.
    Inventors: Brijesh Tripathi, Shane J. Keil, Manu Gulati, Jung Wook Cho, Erik P. Machnicki, Gilbert H. Herbeck, Timothy J. Millet, Joshua P. de Cesare, Anand Dalal
  • Publication number: 20190042492
    Abstract: An apparatus and method for encoding data are disclosed that may allow for performing periodic calibration operations on a communication link. A controller may determine multiple possible values for a reference voltage used with the communication link based on an initial value. Calibration operations may be performed using each possible value, and the results of the operations scored based on the width of data eyes measured during the calibration operations. The controller may then select a new value for the reference voltage from the multiple possible values dependent upon the scores of each of the multiple possible values.
    Type: Application
    Filed: July 9, 2018
    Publication date: February 7, 2019
    Inventors: Robert E. Jeter, Brijesh Tripathi, Kiran Kattel, Rakesh L. Notani, Fabien S. Faure, Sukalpa Biswas, Kai Lun Hsiung, Neeraj Parik, Venkata Ramana Malladi, Shiva Kumar, Chaitanya Polapragada, Allen Kim
  • Publication number: 20180366078
    Abstract: An electronic device may generate content that is to be displayed on a display. The display may have an array of liquid crystal display pixels for displaying image frames of the content. The image frames may be displayed with positive and negative polarities to help reduce charge accumulation effects. A charge accumulation tracker may analyze the image frames to determine when there is a risk of excess charge accumulation. The charge accumulation tracker may analyze information on gray levels, frame duration, and frame polarity. The charge accumulation tracker may compute a charge accumulation metric for entire image frames or may process subregions of each frame separately. When subregions are processed separately, each subregion may be individually monitored for a risk of excess charge accumulation.
    Type: Application
    Filed: August 27, 2018
    Publication date: December 20, 2018
    Inventors: Chaohao Wang, Brijesh Tripathi, Christopher Philip Alan Tann, David S. Zalatimo, Guy Cote, Hao Nan, Marc Albrecht, Paolo Sacchetto, Sandro H. Pintz
  • Publication number: 20180314355
    Abstract: An electronic device may be provided with a display. The display may be a variable frame rate display capable of adaptively adjusting a frame rate at which display frames are displayed in response to information associated with the current state of operation of the device. The information may be gathered using control circuitry in the electronic device. The control circuitry may gather the information for adjusting the frame rate by monitoring the electronic device power supply configuration, other device components, the type of content to be displayed, and user-input signals. The control circuitry may adjust the frame rate based on the gathered information by increasing or decreasing the frame rate. The control circuitry may be formed as a portion of display control circuitry for the device such as a display driver integrated circuit or may be formed as a portion of storage and processing circuitry external to the display.
    Type: Application
    Filed: July 5, 2018
    Publication date: November 1, 2018
    Inventors: Brijesh Tripathi, Jean-Pierre S. Guillou
  • Publication number: 20180313673
    Abstract: In an embodiment, a system on a chip (SOC) includes a component that remains powered when the remainder of the SOC is powered off. The component may include a sensor capture unit to capture data from various device sensors, and may filter the captured sensor data. Responsive to the filtering, the component may wake up the remainder of the SOC to permit the processing. The component may store programmable configuration data, matching the state at the time the SOC was most recently powered down, for the other components of the SOC, in order to reprogram them after wakeup. In some embodiments, the component may be configured to wake up the memory controller within the SOC and the path to the memory controller, in order to write the data to memory. The remainder of the SOC may remain powered down.
    Type: Application
    Filed: June 26, 2018
    Publication date: November 1, 2018
    Inventors: Brijesh Tripathi, Shane J. Keil, Manu Gulati, Jung Wook Cho, Erik P. Machnicki, Gilbert H. Herbeck, Timothy J. Millet, Joshua P. de Cesare, Anand Dalal
  • Patent number: 10102815
    Abstract: An electronic device may generate content that is to be displayed on a display. The display may have an array of liquid crystal display pixels for displaying image frames of the content. The image frames may be displayed with positive and negative polarities to help reduce charge accumulation effects. A charge accumulation tracker may analyze the image frames to determine when there is a risk of excess charge accumulation. The charge accumulation tracker may analyze information on gray levels, frame duration, and frame polarity. The charge accumulation tracker may compute a charge accumulation metric for entire image frames or may process subregions of each frame separately. When subregions are processed separately, each subregion may be individually monitored for a risk of excess charge accumulation.
    Type: Grant
    Filed: February 7, 2018
    Date of Patent: October 16, 2018
    Assignee: Apple Inc.
    Inventors: Chaohao Wang, Brijesh Tripathi, Christopher Philip Alan Tann, David S. Zalatimo, Guy Cote, Hao Nan, Marc Albrecht, Paolo Sacchetto, Sandro H. Pintz
  • Patent number: 10049073
    Abstract: An interface emulator for an IC is disclosed. An interface emulator includes a first first-in, first-out memory (FIFO) and a second FIFO. The first FIFO is coupled to receive data from an access port and a second FIFO coupled to receive data from at least one functional unit in the IC. The access port may be coupled to a device that is external to the IC. The external device may write information into the first FIFO, and this information may subsequently be read by a functional unit in the IC. Similarly, the functional unit may write information into the second FIFO, with the external device subsequently reading the information. Information may be written into the FIFOs in accordance with a predefined protocol. Thus, a particular type of interface may be emulated even though the physical connection and supporting circuitry for that interface is not otherwise implemented in the IC.
    Type: Grant
    Filed: June 13, 2017
    Date of Patent: August 14, 2018
    Assignee: Apple Inc.
    Inventors: Michael J. Smith, Josh P. de Cesare, Brijesh Tripathi, Derek Iwamoto, Shane J Keil
  • Patent number: 10031000
    Abstract: In an embodiment, a system on a chip (SOC) includes a component that remains powered when the remainder of the SOC is powered off. The component may include a sensor capture unit to capture data from various device sensors, and may filter the captured sensor data. Responsive to the filtering, the component may wake up the remainder of the SOC to permit the processing. The component may store programmable configuration data, matching the state at the time the SOC was most recently powered down, for the other components of the SOC, in order to reprogram them after wakeup. In some embodiments, the component may be configured to wake up the memory controller within the SOC and the path to the memory controller, in order to write the data to memory. The remainder of the SOC may remain powered down.
    Type: Grant
    Filed: August 13, 2014
    Date of Patent: July 24, 2018
    Assignee: Apple Inc.
    Inventors: Brijesh Tripathi, Shane J. Keil, Manu Gulati, Jung Wook Cho, Erik P. Machnicki, Gilbert H. Herbeck, Timothy J. Millet, Joshua P. de Cesare, Anand Dalal
  • Patent number: 10019387
    Abstract: An apparatus and method for encoding data are disclosed that may allow for performing periodic calibration operations on a communication link. A controller may determine multiple possible values for a reference voltage used with the communication link based on an initial value. Calibration operations may be performed using each possible value, and the results of the operations scored based on the width of data eyes measured during the calibration operations. The controller may then select a new value for the reference voltage from the multiple possible values dependent upon the scores of each of the multiple possible values.
    Type: Grant
    Filed: April 1, 2015
    Date of Patent: July 10, 2018
    Assignee: Apple Inc.
    Inventors: Robert E. Jeter, Brijesh Tripathi, Kiran Kattel, Rakesh L. Notani, Fabien S. Faure, Sukalpa Biswas, Kai Lun Hsiung, Neeraj Parik, Venkata Ramana Malladi, Shiva Kumar, Chaitanya Polapragada, Allen Kim