Patents by Inventor Bruce James

Bruce James has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20100192943
    Abstract: A solar heat collection system for heating water, the system comprising in one embodiment a plurality of lengths of water conduit pipe inside lengths of water conduit jacket pipe and spaced apart therefrom, with an insulating medium contained between the pipe and jacket pipe. The lengths of water conduit pipe are fluidly connected together to provide a circulation system for the water such that solar heat energy may be provided to a heat load. A variety of connection methods for connecting the lengths of piping are provided and the lengths of piping may be flexible for a variety of solar heat system installations.
    Type: Application
    Filed: July 16, 2008
    Publication date: August 5, 2010
    Inventor: Bruce James King
  • Patent number: 7757027
    Abstract: An integrated circuit 2 includes a transaction master 4 connected via interconnect circuitry 10 to a transaction slave 12. The transaction slave 12 generates a transfer-complete signal (R Last or B) to indicate completion of a data transfer (either a read or a write). When this transfer-complete signal has been received by the transaction master 4, then the transaction master 4 generates a complete-acknowledgement signal RACK, WACK, which is passed back to the transaction slave so as to acknowledge receipt of the transfer-complete signal.
    Type: Grant
    Filed: June 19, 2008
    Date of Patent: July 13, 2010
    Assignee: ARM Limited
    Inventors: Christopher William Laycock, Antony John Harris, Bruce James Mathewson, Richard Roy Grisenthwaite, Stuart David Biles
  • Patent number: 7732408
    Abstract: A method for breeding, especially a method for breeding dairy cattle without use of heat detection prior to insemination.
    Type: Grant
    Filed: October 19, 2006
    Date of Patent: June 8, 2010
    Assignee: IverSync II LLC
    Inventors: Scott Josephson, Bruce James Iverson, Rodney A. Schulze
  • Patent number: 7734955
    Abstract: A method and system for improving Field Replacement Unit (FRU) isolation in memory sub-systems by monitoring Voltage Regulator Module (VRM) induced memory errors. A comparator compares the output voltage coming from the VRM to memory. If the comparator detects a VRM output voltage transient that is outside a rated threshold, then a counter is increased by one. If the counter exceeds a count threshold, a VRM error is posted. If a memory failure occurs within a predetermined period of time, then the VRM error pinpoints the VRM output voltage transient as being the likely cause of the memory failure.
    Type: Grant
    Filed: October 7, 2008
    Date of Patent: June 8, 2010
    Assignee: International Business Machines Corporation
    Inventors: Charles R. Dart, Edmund Sutherland Gamble, Gary Anthony Jansma, Terence Rodrigues, Robert Joseph Ruckriegel, Bruce James Wilkie
  • Patent number: 7727328
    Abstract: The disclosed invention provides an improved method that utilizes a liquid ladle slag in combination with a crushed material, such as a refractory brick, an alumina ladle brick or an aluminum dross, to manufacture a calcium aluminate product that can be used in the steel refining process.
    Type: Grant
    Filed: May 16, 2006
    Date of Patent: June 1, 2010
    Assignee: Harsco Corporation
    Inventors: Bruce James Barker, William Parker Breedlove, Gene Anthony Iannazzo
  • Publication number: 20100095571
    Abstract: One embodiment of a garment item which allows wearers to count down or up to any occasion. The embodiment consists of a patch (13), frame (12) and separators (19) on the garment. In conjunction with our incomplete sentence slogans and the combination of numerical appliqués created from base (14) and hook (16), a wearer can look forward to almost any occasion and communicate his or her message to the world.
    Type: Application
    Filed: October 17, 2008
    Publication date: April 22, 2010
    Inventor: Michael Bruce James
  • Publication number: 20100064108
    Abstract: The present invention provides a data processing apparatus and method for managing snoop operations. The data processing apparatus has a plurality of processing units for performing data processing operations requiring access to data in shared memory, with at least two of the processing units having a cache associated therewith for storing a subset of the data for access by that processing unit. A snoop-based cache coherency protocol is employed to ensure data accessed by each processing unit is up-to-date, and when an access request is issued the cache coherency protocol is referenced in order to determine whether a snoop process is required. Snoop control storage is provided which defines a plurality of snoop schemes, each snoop scheme defining a series of snoop phases to be performed to implement the snoop process, and each snoop phase requiring a snoop operation to be performed on either a single cache or multiple caches.
    Type: Application
    Filed: September 5, 2008
    Publication date: March 11, 2010
    Inventors: Antony John Harris, Bruce James Mathewson, Christopher William Laycock
  • Publication number: 20090323685
    Abstract: An on-chip integrated circuit interconnect 16 uses a serialization technique to divide a transaction to be transmitted into a sequence of transmission packets which are serially transmitted over a narrower connection. The order in which bits of the transaction are allocated to transmission packets is selected such that higher priority bits required by a receiving slave device in order that it can commence processing the transaction are sent first. This reduces the latency of the system.
    Type: Application
    Filed: August 16, 2006
    Publication date: December 31, 2009
    Inventors: Bruce James Mathewson, Antony John Harris
  • Publication number: 20090319707
    Abstract: An integrated circuit 2 includes a transaction master 4 connected via interconnect circuitry 10 to a transaction slave 12. The transaction slave 12 generates a transfer-complete signal (R Last or B) to indicate completion of a data transfer (either a read or a write). When this transfer-complete signal has been received by the transaction master 4, then the transaction master 4 generates a complete-acknowledgement signal RACK, WACK, which is passed back to the transaction slave so as to acknowledge receipt of the transfer-complete signal.
    Type: Application
    Filed: June 19, 2008
    Publication date: December 24, 2009
    Inventors: Christopher William Laycock, Antony John Harris, Bruce James Mathewson, Richard Roy Grisenthwaite, Stuart David Biles
  • Patent number: 7599998
    Abstract: A data processing apparatus comprises at least one source processor core, at least two destination processor cores, a message handler and a bus arrangement providing a data communication path between the source core, the destination cores and the message handler. The message handler has plurality of message-handling modules. At least one of the message-handling modules has a message receipt indicator that is modifiable by each of the destination processor cores to indicate that a message has been received at its destination. This message-handling module also has a transmission completion detector operable to detect, in dependence upon a message receipt indicator value that a message has been received by all of the at least two destination processor cores and to initiate transmission of an acknowledgement signal to the source processor core.
    Type: Grant
    Filed: July 7, 2004
    Date of Patent: October 6, 2009
    Assignee: ARM Limited
    Inventors: Mark James Galbraith, Harry Samuel Thomas Fearnhamm, Nicholas Esca Smith, Bruce James Mathewson
  • Publication number: 20090234936
    Abstract: In one embodiment, a communication system for a multi-blade server system includes a multi-drop serial bus network interconnecting a management module with each of a plurality of servers in a multi-server chassis. A first transceiver subsystem is configured for communicating over the serial bus network between the management module and each server within a first frequency band. A second transceiver subsystem is configured for simultaneously communicating over the serial bus network between the management module and the servers within a second frequency band higher than the first frequency band. A first signal-filtering subsystem substantially filters out signals in the second frequency band from the first transceiver subsystem. A second signal-filtering subsystem substantially filters out the signals in the first frequency band from the second transceiver subsystem.
    Type: Application
    Filed: March 14, 2008
    Publication date: September 17, 2009
    Applicant: INTERNATIONAL BUSINESS MACHINES CORPORATION
    Inventors: Justin Potok Bandholz, Clifton Ehrich Kerr, Pravin Patel, Bruce James Wilkie
  • Publication number: 20090065080
    Abstract: A bi-directional adjustable energy dissipating near zero leakage head loss valve comprising a valve body including and actuation shaft housing and a guide shaft mount disposed in opposition along the transverse valve actuation axis; a fixed plate having downstream orifices parallel to the flow axis; a mobile plate having upstream orifices parallel to the flow axis adapted to move along the transverse valve actuation axis: from a fully open position, wherein the upstream and downstream orifices are aligned to allow flow communication to a fully closed position, wherein the orifices are blocked by the mobile plate; a self adjusting taper ring located about the upstream inner perimeter of the valve body, the self adjusting taper ring having an inner surface engagingly biased against and parallel to the upstream side of the mobile plate, and having an outer surface engagingly biased against an upstream pipe gasket flange.
    Type: Application
    Filed: October 24, 2007
    Publication date: March 12, 2009
    Inventor: Bruce James
  • Publication number: 20090031168
    Abstract: A method and system for improving Field Replacement Unit (FRU) isolation in memory sub-systems by monitoring Voltage Regulator Module (VRM) induced memory errors. A comparator compares the output voltage coming from the VRM to memory. If the comparator detects a VRM output voltage transient that is outside a rated threshold, then a counter is increased by one. If the counter exceeds a count threshold, a VRM error is posted. If a memory failure occurs within a predetermined period of time, then the VRM error pinpoints the VRM output voltage transient as being the likely cause of the memory failure.
    Type: Application
    Filed: October 7, 2008
    Publication date: January 29, 2009
    Applicant: INTERNATIONAL BUSINESS MACHINES CORPORATION
    Inventors: Charles R. Dart, Edmund Sutherland Gamble, Gary Anthony Jansma, Terence Rodrigues, Robert Joseph Ruckriegel, Bruce James Wilkie
  • Patent number: 7482304
    Abstract: A process for making microporous structures that can be used as a catalyst support. The microporous structures have high porosity and high thermal stability, combined with good mechanical strength and relatively high surface area. The process is useful for making titanium dioxide for catalyst structures for use for fuel cells, sensors, electrochemical cells and the like.
    Type: Grant
    Filed: December 10, 2003
    Date of Patent: January 27, 2009
    Assignee: Altair Nanomaterials Inc.
    Inventors: Bruce James Sabacky, Timothy Malcome Spitler
  • Patent number: 7479597
    Abstract: A cable having an electrically conducting wire with a cross sectional shape defined by a simple closed curve having from three to eight concave portions separated by an equal number of convex portions. The simple closed curve has no point where the radius of curvature is less than one-sixth (?) of an overall radius of the wire and no point where adjacent curves or lines intersect at an angle. The alternating concave and convex portions of the cable's cross-sectional shape may have substantially the same curvature. The cross-sectional shape of the cable avoids sharp angles and fight curves.
    Type: Grant
    Filed: November 28, 2007
    Date of Patent: January 20, 2009
    Assignee: International Business Machines Corporation
    Inventors: Moises Cases, Daniel N. de Araujo, Bhyrav Murthy Mutnury, Nam Huu Pham, Bruce James Wilkie
  • Publication number: 20080299448
    Abstract: A battery unit (10) includes a plurality of trays (14) connected to one another and positioned on top of one another to define sides (16, 18, 20, 22) and top (24) and a bottom of the battery unit (10). A plurality of cells (12) are adjacent one and the other and connected with one another in overlapping relationship with each of the cells (12) extending over spaced openings (50) defined in the trays (14). A controller (54) is connected to the tray operably communicating with each of the cells (12).
    Type: Application
    Filed: November 2, 2007
    Publication date: December 4, 2008
    Inventors: Derrick Scott Buck, Paul Leslie Kemper, Bruce James Silk
  • Patent number: 7461303
    Abstract: A system for improving Field Replacement Unit (FRU) isolation in memory sub-systems by monitoring Voltage Regulator Module (VRM) induced memory errors. A comparator compares the output voltage coming from the VRM to memory. If the comparator detects a VRM output voltage transient that is outside a rated threshold, then a counter is increased by one. If the counter exceeds a count threshold, a VRM error is posted. If a memory failure occurs within a predetermined period of time, then the VRM error pinpoints the VRM output voltage transient as being the likely cause of the memory failure.
    Type: Grant
    Filed: March 23, 2007
    Date of Patent: December 2, 2008
    Assignee: International Business Machines Corporation
    Inventors: Charles R. Dart, Edmund Sutherland Gamble, Gary Anthony Jansma, Terence Rodrigues, Robert Joseph Ruckriegel, Bruce James Wilkie
  • Patent number: 7353297
    Abstract: A data processing apparatus and method of handling write transactions in such an apparatus is provided. The apparatus has a plurality of devices, and bus circuitry providing connection paths between the plurality of devices. At least one of the devices has a bus master interface operable to generate write transactions for output via the bus circuitry, whilst at least one of the devices has a bus slave interface operable to receive the write transactions from the bus circuitry. A write transaction includes transferring a write address from a bus master interface to a bus slave interface and separately transferring write data from the bus master interface to the bus slave interface. In accordance with embodiments of the present invention, the bus master interface is allowed to generate a write transaction such that the write data is received at the bus slave interface before the associated write address. This leads to a significant decrease in the complexity of the apparatus.
    Type: Grant
    Filed: June 8, 2004
    Date of Patent: April 1, 2008
    Assignee: ARM Limited
    Inventors: Bruce James Mathewson, Antony John Harris
  • Patent number: 7353383
    Abstract: A method and system for single session sign-on across multiple content servers using public/private key cryptography. Session certificates are issued by an authentication authority and stored or held in volatile memory by a browser. Session certificates are used by browsers to obtain session credentials from a session authority and stored or held in volatile memory by the browser. Use of public and private keys supports authentication and non-repudiation, and eliminates some of the disadvantages of permanent certificates and PKI.
    Type: Grant
    Filed: March 14, 2003
    Date of Patent: April 1, 2008
    Assignee: JPMorgan Chase Bank, N.A.
    Inventor: Bruce James Skingle
  • Patent number: D567450
    Type: Grant
    Filed: May 18, 2005
    Date of Patent: April 22, 2008
    Assignee: Helmet Integrated Systems Limited
    Inventor: Bruce James Renfrew