Patents by Inventor Bruce Rae
Bruce Rae has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).
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Publication number: 20260101123Abstract: An example apparatus, computer-implemented method, and electronic device comprising an ambient light sensor configured to mitigate the effects of dark count rate associated with avalanche photodiodes are provided. The example apparatus includes an exposed avalanche photodiode array, a dark avalanche photodiode array, and a controller. The exposed avalanche photodiode array is positioned to receive ambient light from an external environment. The dark avalanche photodiode array is obscured from the ambient light. The controller is configured to receive an exposed illumination count corresponding to the ambient light received at the exposed avalanche photodiode array. The controller is further configured to receive a dark illumination count corresponding to a dark count at the dark avalanche photodiode array. The controller determines an ambient light value based on a difference between the exposed illumination count and the dark illumination count.Type: ApplicationFiled: October 7, 2024Publication date: April 9, 2026Inventors: Stuart MCLEOD, Pascal MELLOT, Bruce RAE, Neale DUTTON
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Patent number: 12520611Abstract: An array of single photon avalanche diodes (SPADs) includes a plurality of pixels. Each pixel includes a SPAD having a cathode connected to a first intermediate node and an anode coupled to first negative voltage, a quench circuit connected between the first intermediate node and the low voltage supply node, an AC coupling element connected between the first intermediate node and a second intermediate node, a filter component connected between the high voltage node and the second intermediate node, and an inverter having its input connected to the second intermediate node and its output providing an output signal. A resistance associated with the quench circuit, a capacitance associated with the SPAD, a capacitance associated with the AC coupling element, and a resistance associated with the filter component form a variable second order filter.Type: GrantFiled: October 27, 2022Date of Patent: January 6, 2026Assignee: STMicroelectronics (Research & Development) LimitedInventors: Mohammed Al-Rawhani, Bruce Rae
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DYNAMIC OUTPUT BIAS SIGNAL FOR A SINGLE PHOTON AVALANCHE DIODE (SPAD) BASED PHOTON DETECTION CIRCUIT
Publication number: 20260003042Abstract: An example photon detection circuit, a SPAD sensing device, and a direct time-of-flight detection system comprising a SPAD sensing device configured to operate in a high illumination environments, are provided. The example photon detection circuit includes SPAD circuitry configured to generate a photon detection signal based on a SPAD bias voltage and the number of photons encountering the SPAD. The photon detection circuitry further includes output bias circuitry configured to generate a dynamic output bias signal, wherein the dynamic output bias signal is updated based on the number of photons encountering the SPAD. The example photon detection circuitry further includes output signal circuitry configured to generate a photon detection output signal in an instance in which the photon detection signal exceeds an output signal circuitry threshold, wherein the output signal circuitry threshold is based on the dynamic output bias signal.Type: ApplicationFiled: June 26, 2024Publication date: January 1, 2026Inventors: Maciej WOJTKIEWICZ, Bruce RAE, Robert HENDERSON -
Patent number: 12490532Abstract: Disclosed herein is a single photon avalanche diode (SPAD) pixel for use in time-of-flight imaging. This pixel includes a SPAD having a cathode connected to a first node and an anode coupled to first negative voltage. A transistor circuit in the pixel includes a quench transistor connected between a supply voltage node and a second node, the quench transistor controlled by a quench control signal to operate in a high-impedance mode, and a recharge transistor connected in parallel with the quench transistor between the supply voltage node and the second node, the recharge transistor controlled by a feedback signal. The pixel also includes a readout inverter generating an output signal based upon a voltage at the first node and an adjustable delay circuit generating the feedback signal based upon the output signal, the feedback signal being delayed with respect to the output signal.Type: GrantFiled: October 27, 2022Date of Patent: December 2, 2025Assignee: STMicroelectronics (Research & Development) LimitedInventors: Mohammed Al-Rawhani, Bruce Rae
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Patent number: 12342641Abstract: The present disclosure relates to a pixel comprising: a photodiode comprising a portion of a substrate of a semiconductor material, extending vertically from a first face of the substrate to a second face of the substrate configured to receive light; a layer of a first material covering each of the lateral surfaces of the portion; a layer of a second material covering the portion on the side of the first face, first and second material having refractive indexes lower than that of the semiconductor material; and a diffractive structure disposed on a face of the photodiode on the side of the second face.Type: GrantFiled: June 14, 2024Date of Patent: June 24, 2025Assignees: STMICROELECTRONICS (RESEARCH & DEVELOPMENT) LIMITED, STMicroelectronics (Crolles 2) SASInventors: Raul Andres Bianchi, Marios Barlas, Alexandre Lopez, Bastien Mamdy, Bruce Rae, Isobel Nicholson
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Patent number: 12328962Abstract: An electronic device includes a stack of a first level having a SPAD, a second level having a quench circuit for said SPAD, and a third level having a circuit for processing data generated by said SPAD. A method for making the device includes: a) forming of the first level; b) bonding, on the first level, by molecular bonding, of a stack of layers including a semiconductor layer; and c) forming the quench circuit of the second level in the semiconductor layer.Type: GrantFiled: November 3, 2023Date of Patent: June 10, 2025Assignees: STMicroelectronics (Crolles 2) SAS, STMicroelectronics (Research &Development) LimitedInventors: Francois Guyader, Sara Pellegrini, Bruce Rae
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Publication number: 20240379891Abstract: A single photon avalanche diode (SPAD) pixel circuit includes a SPAD, a clamping transistor coupled to the anode of the SPAD, and readout circuitry. The clamping transistor limits the anode voltage to a threshold below the readout circuitry's maximum operating voltage. In one embodiment, quenching and enabling transistors are implemented using single-layer gate oxide technology, while the clamping transistor uses extended drain technology. A regulation circuit generates a voltage clamp control signal for an array of pixels. Another embodiment utilizes a stacked chip design with the SPAD and a cathode-side quenching element on one chip, and the clamping transistor and readout circuitry on another. This incorporates a parasitic capacitance from deep trench isolation. Additional biasing transistors may be used for fine-tuning the clamped anode voltage.Type: ApplicationFiled: July 23, 2024Publication date: November 14, 2024Applicant: STMicroelectronics (Research & Development) LimitedInventors: Mohammed AL-RAWHANI, Neale DUTTON, John Kevin MOORE, Bruce RAE, Elsa LACOMBE
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Publication number: 20240339464Abstract: The present disclosure relates to a pixel comprising: a photodiode comprising a portion of a substrate of a semiconductor material, extending vertically from a first face of the substrate to a second face of the substrate configured to receive light; a layer of a first material covering each of the lateral surfaces of the portion; a layer of a second material covering the portion on the side of the first face, first and second material having refractive indexes lower than that of the semiconductor material; and a diffractive structure disposed on a face of the photodiode on the side of the second face.Type: ApplicationFiled: June 14, 2024Publication date: October 10, 2024Applicants: STMICROELECTRONICS (RESEARCH & DEVELOPMENT) LIMITED, STMicroelectronics (Crolles 2) SASInventors: Raul Andres BIANCHI, Marios BARLAS, Alexandre LOPEZ, Bastien MAMDY, Bruce RAE, Isobel NICHOLSON
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Patent number: 12074242Abstract: Disclosed herein is an array of pixels. Each pixel includes a single photon avalanche diode (SPAD) and a transistor circuit. The transistor circuit includes a clamp transistor configured to clamp an anode voltage of the SPAD to be no more than a threshold clamped anode voltage, and a quenching element in series with the clamp transistor and configured to quench the anode voltage of the SPAD when the SPAD is struck by an incoming photon. Readout circuitry is coupled to receive the clamped anode voltage from the transistor circuit and to generate a pixel output therefrom, the threshold clamped anode voltage being below a maximum voltage rating of transistors forming the readout circuitry.Type: GrantFiled: May 2, 2022Date of Patent: August 27, 2024Assignee: STMicroelectronics (Research & Development) LimitedInventors: Mohammed Al-Rawhani, Neale Dutton, John Kevin Moore, Bruce Rae, Elisa Lacombe
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Patent number: 12057461Abstract: An electronic device includes a stack of a first level having a SPAD, a second level having a quench circuit for said SPAD, and a third level having a circuit for processing data generated by said SPAD. A method for making the device includes: a) forming of the first level; b) bonding, on the first level, by molecular bonding, of a stack of layers including a semiconductor layer; and c) forming the quench circuit of the second level in the semiconductor layer.Type: GrantFiled: July 24, 2023Date of Patent: August 6, 2024Assignees: STMicroelectronics (Crolles 2) SAS, STMicroelectronics (Research & Development) LimitedInventors: Francois Guyader, Sara Pellegrini, Bruce Rae
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Patent number: 12051705Abstract: The present disclosure relates to a pixel comprising: a photodiode comprising a portion of a substrate of a semiconductor material, extending vertically from a first face of the substrate to a second face of the substrate configured to receive light; a layer of a first material covering each of the lateral surfaces of the portion; a layer of a second material covering the portion on the side of the first face, first and second material having refractive indexes lower than that of the semiconductor material; and a diffractive structure disposed on a face of the photodiode on the side of the second face.Type: GrantFiled: September 9, 2021Date of Patent: July 30, 2024Assignees: STMICROELECTRONICS (RESEARCH & DEVELOPMENT) LIMITED, STMicroelectronics (Crolles 2) SASInventors: Raul Andres Bianchi, Marios Barlas, Alexandre Lopez, Bastien Mamdy, Bruce Rae, Isobel Nicholson
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Publication number: 20240151828Abstract: A pixel includes a SPAD having a cathode connected to a first node and an anode coupled to a first negative voltage, and a transistor circuit coupled between a supply voltage and a third node, that turns on in response to an enable signal. A cascode transistor connected between the third node and the first node is controlled by a cascode control signal. A cathode setting capacitor is connected between the first node and ground. A readout inverter is coupled between the intermediate node and an output node and generates an output signal. Turn-on of the transistor circuit sources current from the supply voltage node to the cathode setting capacitor, setting a reverse bias voltage across the SPAD to greater than its breakdown voltage. A photon impinging upon the SPAD cause avalanche of the SPAD which, when occurring after turn off of the transistor circuit, discharges the cathode setting capacitor.Type: ApplicationFiled: November 3, 2022Publication date: May 9, 2024Applicant: STMicroelectronics (Research & Development) LimitedInventors: Mohammed AL-RAWHANI, Bruce RAE
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Publication number: 20240145500Abstract: An array of single photon avalanche diodes (SPADs) includes a plurality of pixels. Each pixel includes a SPAD having a cathode connected to a first intermediate node and an anode coupled to first negative voltage, a quench circuit connected between the first intermediate node and the low voltage supply node, an AC coupling element connected between the first intermediate node and a second intermediate node, a filter component connected between the high voltage node and the second intermediate node, and an inverter having its input connected to the second intermediate node and its output providing an output signal. A resistance associated with the quench circuit, a capacitance associated with the SPAD, a capacitance associated with the AC coupling element, and a resistance associated with the filter component form a variable second order filter.Type: ApplicationFiled: October 27, 2022Publication date: May 2, 2024Applicant: STMicroelectronics (Research & Development) LimitedInventors: Mohammed AL-RAWHANI, Bruce RAE
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Publication number: 20240145503Abstract: Disclosed herein is a single photon avalanche diode (SPAD) pixel for use in time-of-flight imaging. This pixel includes a SPAD having a cathode connected to a first node and an anode coupled to first negative voltage. A transistor circuit in the pixel includes a quench transistor connected between a supply voltage node and a second node, the quench transistor controlled by a quench control signal to operate in a high-impedance mode, and a recharge transistor connected in parallel with the quench transistor between the supply voltage node and the second node, the recharge transistor controlled by a feedback signal. The pixel also includes a readout inverter generating an output signal based upon a voltage at the first node and an adjustable delay circuit generating the feedback signal based upon the output signal, the feedback signal being delayed with respect to the output signal.Type: ApplicationFiled: October 27, 2022Publication date: May 2, 2024Applicant: STMicroelectronics (Research & Development) LimitedInventors: Mohammed AL-RAWHANI, Bruce RAE
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Patent number: 11962900Abstract: In some embodiments, a ToF sensor includes an illumination source module, a transmitter lens module, a receiver lens module, and an integrated circuit that includes a ToF imaging array. The ToF imaging array includes a plurality of SPADs and a plurality of ToF channels coupled to the plurality of SPADs. In a first mode, the ToF imaging array is configured to select a first group of SPADs corresponding to a first FoV. In a second mode, the ToF imaging array is configured to select a second group of SPADs corresponding to a second FoV different than the first FoV.Type: GrantFiled: August 20, 2020Date of Patent: April 16, 2024Assignee: STMICROELECTRONICS (RESEARCH & DEVELOPMENT) LIMITEDInventors: Neale Dutton, Stuart McLeod, Bruce Rae
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Publication number: 20240063235Abstract: An electronic device includes a stack of a first level having a SPAD, a second level having a quench circuit for said SPAD, and a third level having a circuit for processing data generated by said SPAD. A method for making the device includes: a) forming of the first level; b) bonding, on the first level, by molecular bonding, of a stack of layers including a semiconductor layer; and c) forming the quench circuit of the second level in the semiconductor layer.Type: ApplicationFiled: November 3, 2023Publication date: February 22, 2024Applicants: STMicroelectronics (Crolles 2) SAS, STMicroelectronics (Research & Development) LimitedInventors: Francois GUYADER, Sara PELLEGRINI, Bruce RAE
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Patent number: 11843008Abstract: An electronic device includes a stack of a first level having a SPAD, a second level having a quench circuit for said SPAD, and a third level having a circuit for processing data generated by said SPAD. A method for making the device includes: a) forming of the first level; b) bonding, on the first level, by molecular bonding, of a stack of layers including a semiconductor layer; and c) forming the quench circuit of the second level in the semiconductor layer.Type: GrantFiled: October 11, 2021Date of Patent: December 12, 2023Assignees: STMicroelectronics (Crolles 2) SAS, STMicroelectronics (Research & Development) LimitedInventors: Francois Guyader, Sara Pellegrini, Bruce Rae
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Publication number: 20230369359Abstract: An electronic device includes a stack of a first level having a SPAD, a second level having a quench circuit for said SPAD, and a third level having a circuit for processing data generated by said SPAD. A method for making the device includes: a) forming of the first level; b) bonding, on the first level, by molecular bonding, of a stack of layers including a semiconductor layer; and c) forming the quench circuit of the second level in the semiconductor layer.Type: ApplicationFiled: July 24, 2023Publication date: November 16, 2023Applicants: STMicroelectronics (Crolles 2) SAS, STMicroelectronics (Research & Development) LimitedInventors: Francois GUYADER, Sara PELLEGRINI, Bruce RAE
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Patent number: 11740334Abstract: A combining network for an array of SPAD devices includes: synchronous sampling circuits, wherein each synchronous sampling circuit is coupled to an output of a corresponding SPAD device and is configured to generate a pulse or an edge each time an event is detected; and a summation circuit coupled to an output of each of the synchronous sampling circuits and configured to count a number of pulses or edges to generate a binary output value.Type: GrantFiled: June 11, 2020Date of Patent: August 29, 2023Assignee: STMicroelectronics (Research & Development) LimitedInventors: Sarrah Moiz Patanwala, Bruce Rae, Neale Dutton
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Patent number: 11579016Abstract: A single photon avalanche diode (SPAD) has a cathode coupled to a high voltage supply and an anode coupled to a first node. A photodetection circuit includes: a first n-channel transistor having a drain coupled to the first node, a source coupled to ground, and a gate coupled to a third node; a second n-channel transistor having a drain coupled to the first node, a source coupled to ground, and a gate coupled to a second node; and an inverter having an input coupled to the first node and an output coupled to an intermediate node. A current starved inverter has an input coupled to the intermediate node and an output coupled to the second node, a logic gate has inputs coupled to the intermediate node and the second node, and an output coupled to the third node.Type: GrantFiled: August 3, 2021Date of Patent: February 14, 2023Assignee: STMicroelectronics (Research & Development) LimitedInventors: Mohammed Al-Rawhani, Bruce Rae