Abstract: An electronic device includes at least one photodetection block, where the at least one photodetection block includes a plurality of macropixels arranged into an array. Each macropixel includes an array of photodiodes, with logic circuitry coupled to outputs of the array of photodiodes and configured to generate a detection signal as a function of logically combining the outputs of the array of photodiodes. Each macropixel has associated therewith selection circuitry configured to selectively pass the detection signal to output combining logic or to output combining logic of at least one neighboring macropixel of the plurality thereof. The output combining logic has inputs coupled to the selection circuitry and to the selection circuitry of the at least one neighboring macropixel, and is configured to generate an output detection signal as a function of logically combining outputs of the selection circuitry and the selection circuitry of the at least one neighboring macropixel.

Abstract: A pixel includes a single photon avalanche diode (SPAD) having a cathode coupled to a high voltage supply through a quenching element, with the SPAD having a capacitance at its anode formed from a deep trench isolation, with the quenching element having a sufficiently high resistance such that the capacitance is not fully charged when the SPAD is struck by an incoming photon. The pixel includes a clamp transistor configured to be controlled by a voltage clamp control signal to clamp voltage at an anode of the SPAD when the SPAD is struck by an incoming photon to be no more than a threshold clamped anode voltage, and readout circuitry coupled to receive the clamped anode voltage from the clamp transistor and to generate a pixel output therefrom. The threshold clamped anode voltage is below a maximum operating voltage rating of transistors forming the readout circuitry.

Abstract: A photodetection circuit includes a single photon avalanche diode (SPAD) having a cathode coupled to a high voltage supply through a quench resistance and an anode coupled to a first node, a capacitive deep trench isolation capacitor coupled between the first node and ground, and a first n-channel transistor. The first n-channel transistor has a drain coupled to the first node, a source coupled to ground, and a gate coupled to a resistance control signal. A second n-channel transistor has a drain coupled to the first node, a source coupled to ground, and a gate coupled to a second node. An inverter has an input coupled to the first node and an output coupled to an intermediate node. A current starved inverter has an input coupled to the intermediate node and an output coupled to the second node.

Abstract: An electronic integrated circuit chip includes a semiconductor substrate with a front side and a back side. A first reflective shield is positioned adjacent the front side of the semiconductor substrate and a second reflective shield is positioned adjacent the back side of the semiconductor substrate. Photons are emitted by a photon source to pass through the semiconductor substrate and bounce off the first and second reflective shields to reach a photon detector at the front side of the semiconductor substrate. The detected photons are processed in order to determine whether to issue an alert indicating the existence of an attack on the electronic integrated circuit chip.

Abstract: A photodetection circuit includes a single photon avalanche diode (SPAD), and an active quenching circuit coupling the SPAD to an intermediate node and having a variable RC constant. The variable RC constant provides a first RC constant during an idle state so that when the SPAD detects a photon, the SPAD avalanches to begin quenching to set a magnitude of a voltage at a terminal of the SPAD to a quench voltage, the quench voltage being greater than a threshold voltage; a second RC constant greater than the first RC constant during a hold off period during which the quenching occurs so as to maintain the voltage at the terminal of the SPAD at a magnitude that is above the threshold voltage during the hold off period; and a third RC constant less than the second RC constant but greater than the first RC constant during a recharge period during which the SPAD is recharged.

Abstract: The present disclosure relates to a device that includes a photodiode having a first terminal that is coupled by a resistor to a first rail configured to receive a high supply potential and a second terminal that is coupled by a switch to a second rail configured to receive a reference potential. A read circuit is configured to provide a pulse when the photodiode enters into avalanche, and a control circuit is configured to control an opening of the switch in response to a beginning of the pulse and to control a closing of the switch in response to an end of the pulse.

Abstract: An electronic integrated circuit chip includes a semiconductor substrate with a front side and a back side. A first reflective shield is positioned adjacent the front side of the semiconductor substrate and a second reflective shield is positioned adjacent the back side of the semiconductor substrate. Photons are emitted by a photon source to pass through the semiconductor substrate and bounce off the first and second reflective shields to reach a photon detector at the front side of the semiconductor substrate. The detected photons are processed in order to determine whether to issue an alert indicating the existence of an attack on the electronic integrated circuit chip.

Abstract: A combining network for an array of SPAD devices includes: synchronous sampling circuits, wherein each synchronous sampling circuit is coupled to an output of a corresponding SPAD device and is configured to generate a pulse or an edge each time an event is detected; and a summation circuit coupled to an output of each of the synchronous sampling circuits and configured to count a number of pulses or edges to generate a binary output value.

Abstract: In some embodiments, a ToF sensor includes an illumination source module, a transmitter lens module, a receiver lens module, and an integrated circuit that includes a ToF imaging array. The ToF imaging array includes a plurality of SPADs and a plurality of ToF channels coupled to the plurality of SPADs. In a first mode, the ToF imaging array is configured to select a first group of SPADs corresponding to a first FoV. In a second mode, the ToF imaging array is configured to select a second group of SPADs corresponding to a second FoV different than the first FoV.

Abstract: In some embodiments, a ToF sensor includes an illumination source module, a transmitter lens module, a receiver lens module, and an integrated circuit that includes a ToF imaging array. The ToF imaging array includes a plurality of SPADs and a plurality of ToF channels coupled to the plurality of SPADs. In a first mode, the ToF imaging array is configured to select a first group of SPADs corresponding to a first FoV. In a second mode, the ToF imaging array is configured to select a second group of SPADs corresponding to a second FoV different than the first FoV.

Abstract: An apparatus includes at least one detector configured to receive return light from an object within a detector field of view the light generated by a light source. The detector includes first and second photosensitive regions configured to receive the return light from the light source. At least one non-photosensitive region is included, and the first and second photosensitive regions are separated by the at least one non-photosensitive region. The at least one non-photosensitive region is associated with one of the first or second photosensitive regions.

Abstract: An electronic integrated circuit chip includes a semiconductor substrate with a front side and a back side. A first reflective shield is positioned adjacent the front side of the semiconductor substrate and a second reflective shield is positioned adjacent the back side of the semiconductor substrate. Photons are emitted by a photon source to pass through the semiconductor substrate and bounce off the first and second reflective shields to reach a photon detector at the front side of the semiconductor substrate. The detected photons are processed in order to determine whether to issue an alert indicating the existence of an attack on the electronic integrated circuit chip.

Abstract: A ranging apparatus includes an array of light sensitive detectors configured to receive light from a light source which has been reflected by an object. The array includes a number of different zones. Readout circuitry including at least one read out channel is configured to read data output from each of the zones. A processor operates to process the data output to determine position information associated with the object.

Abstract: A semiconductor on insulator substrate includes a semiconductor support layer, a buried insulating layer over the semiconductor support layer and an epitaxial semiconductor layer over the buried insulating layer. A deep trench isolation penetrates completely through the epitaxial semiconductor layer to the buried insulating layer to electrically insulate a first region of the epitaxial semiconductor layer from a second region of the epitaxial semiconductor layer. A single photon avalanche diode (SPAD) includes an anode formed by the first region of the epitaxial semiconductor layer and a cathode formed by a well located within the first region of the epitaxial semiconductor layer. An ancillary circuit for the SPAD is located in the second region of the epitaxial semiconductor layer and electrically coupled to the SPAD.

Abstract: A device includes an array of single photon avalanche diodes (SPADs) and a plurality of pulse shapers. Each of the SPADs are electrically coupled to a respective SPAD quench circuit. Each of the pulse shapers have an input electrically coupled to an output of a respective SPAD quench circuit.

Abstract: A circuit may include an array of single photon avalanche diode (SPAD) cells, each SPAD cell configured to be selectively enabled by an activation signal. The circuit may include a control circuit configured to selectively enable a subset of the array of SPAD cells based on a measured count rate of the array of SPAD cells.

Abstract: In some embodiments, a ToF sensor includes an illumination source module, a transmitter lens module, a receiver lens module, and an integrated circuit that includes a ToF imaging array. The ToF imaging array includes a plurality of SPADs and a plurality of ToF channels coupled to the plurality of SPADs. In a first mode, the ToF imaging array is configured to select a first group of SPADs corresponding to a first FoV. In a second mode, the ToF imaging array is configured to select a second group of SPADs corresponding to a second FoV different than the first FoV.

Abstract: A semiconductor on insulator substrate includes a semiconductor support layer, a buried insulating layer over the semiconductor support layer and an epitaxial semiconductor layer over the buried insulating layer. A deep trench isolation penetrates completely through the epitaxial semiconductor layer to the buried insulating layer to electrically insulate a first region of the epitaxial semiconductor layer from a second region of the epitaxial semiconductor layer. A single photon avalanche diode (SPAD) includes an anode formed by the first region of the epitaxial semiconductor layer and a cathode formed by a well located within the first region of the epitaxial semiconductor layer. An ancillary circuit for the SPAD is located in the second region of the epitaxial semiconductor layer and electrically coupled to the SPAD.

Abstract: A light system includes at least one time-of-flight image sensor configured to generate at least one zone distance measurement. At least one control unit is configured to receive the at least one zone distance measurement and to generate at least one control signal based on the at least one zone distance measurement. At least one light unit is configured to adapt an output of the light unit based on the at least one control signal.

Abstract: An electronic device includes at least one photodetection block, where the at least one photodetection block includes a plurality of macropixels arranged into an array. Each macropixel includes an array of photodiodes, with logic circuitry coupled to outputs of the array of photodiodes and configured to generate a detection signal as a function of logically combining the outputs of the array of photodiodes. Each macropixel has associated therewith selection circuitry configured to selectively pass the detection signal to output combining logic or to output combining logic of at least one neighboring macropixel of the plurality thereof. The output combining logic has inputs coupled to the selection circuitry and to the selection circuitry of the at least one neighboring macropixel, and is configured to generate an output detection signal as a function of logically combining outputs of the selection circuitry and the selection circuitry of the at least one neighboring macropixel.