Abstract: A high side monolithic switching circuit integrated into a silicon chip is described in which the charge pump is connected to the ground terminal by a constant current circuit and floats relative to the ground terminal to reduce noise generation. The charge pump is connected to a V.sub.CC terminal by an auxiliary power MOSFET having its gate connected to the charge pump output circuit. The conventional charge pump diodes are implemented as MOSFET devices which can be easily integrated into the common monolithic chip. A clamping circuit across the charge pump permits the use of a low voltage, small area capacitor for a high voltage device.

Abstract: A high side monolithic switching circuit integrated into a silicon chip is described in which the charge pump is connected to the ground terminal by a constant current circuit and floats relative to the ground terminal to reduce noise generation. The charge pump is connected to a V.sub.cc terminal by an auxiliary power MOSFET having its gate connected to the charge pump output circuit. The conventional charge pump diodes are implemented as MOSFET devices which can be easily integrated into the common monolithic chip. A clamping circuit across the charge pump permits the use of a low voltage, small area capacitor for a high voltage device.

Abstract: A high side switch having a MOSgated power device has a control circuit which contains a control MOSFET which is connected between the gate and source of the MOSgated power device. The input signal to turn the power device on and off is connected to a level translator circuit which is, in turn, connected to an inverter circuit which drives the gate of the control MOSFET. The control MOSFET then prevents the turn on of the power MOSFET during the turn-off process. A high negative clamp voltage causes a higher di/dt reduction of current during turn off to shorten the turn-off time. The power MOS device cannot be turned on whenever V.sub.CC is low and the output voltage is negative.

Abstract: An ignition circuit for a spark plug includes an IGBT switch with a foldback clamp circuit. The foldback clamp has a first high clamp voltage for a first short interval to fire the spark plug, followed by a lower clamp voltage. The power dissipation of the IGBT switch is therefore substantially reduced.

Abstract: A three-terminal Smart Power MOSgated device has short circuit, over-temperature and over-voltage protection and the like. The control circuit and the protective circuits are powered from an input or control pin connected to a microprocessor. The output of the microprocessor is connected to a resistive divider circuit such that three potentials can be selectively produced at the divider mode, and comprise an on-level signal, an off-level signal and a reset level signal respectively. The control circuit contains an R-S latch which turns on in the absence of a fault signal to connect the on and off signal levels to the MOSgated device. During a fault, the R-S latch disconnects the control circuit input from the MOSgated device, and is reset only by the reset level signal which is distinct from the off signal level which is incapable of resetting the R-S latch.

Abstract: An NPN transistor is added to the chip of a power integrated circuit which contains a power MOSFET and a control circuit in a common chip. The NPN transistor is coupled between the P well containing the integrated circuit components and the N type substrate of the chip and is turned on in response to the forward biasing of the body diode Of the power MOSFET. A depletion mode control MOSFET transistor is coupled, through a fault latch circuit, to the power MOSFET gate and is in series with a capacitor. The node between the power MOSFET gate and capacitor is decoupled from the N type substrate when the bipolar transistor turns on, to turn off the power MOSFET.

Abstract: A power integrated circuit is pin-compatible with a three-terminal power MOSFET and contains integrated circuits to turn off the device in the event of an overcurrent or an over-temperature condition. Control power voltage V.sub.cc is applied through a first MOSFET connected between the gate pin and the gate electrode of the power device. A second control MOSFET is connected across the power device gate and source electrodes. The first control MOSFET is turned off and the second control MOSFET is turned on in response to a fault condition. The turn off of the first MOSFET limits the current sinked by the gate pin. A novel boot strap circuit is disclosed which permits the use of all N channel MOSFETs with an N channel power device, and a novel trimmable temperature shutdown circuit is provided. An integrated bipolar transistor is also integrated into the chip to prevent conduction of the P well/N epi diode formed in the device substrate.