Patents by Inventor Bryan Chin

Bryan Chin has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20170370882
    Abstract: In at least one illustrative embodiment, a system may include a basin that includes an index plate positioned at a bottom of the basin. The basin is configured to receive a liquid analyte, such as a liquid food product or a nutrient broth. The index plate includes an array of multiple wells. Each well opens into an interior of the basin and is sized to receive a magnetostrictive sensor in a predetermined orientation. One or more sensor coils is positionable beneath each well. The basin may be filled with liquid analyte and magnetostrictive sensors may be positioned in the wells. The liquid analyte may be allowed to incubate at a controlled temperature. A controller may position a sensor coil beneath a well, apply a varying magnetic field to a magnetostrictive sensor in the well, and detect a frequency response of the magnetostrictive sensor. Other embodiments are described and claimed.
    Type: Application
    Filed: June 23, 2017
    Publication date: December 28, 2017
    Inventors: Bryan A. Chin, Shin Horikawa, Zhongyang Cheng
  • Patent number: 9746443
    Abstract: In at least one illustrative embodiment, a method for in-situ pathogen detection may comprise distributing one or more magnetoelastic measurement sensors on a surface of a test object, wherein each of the one or more magnetoelastic measurement sensors includes a biorecognition element configured to bind with a pathogen to cause a shift in a characteristic frequency of the associated measurement sensor; applying a varying magnetic field, using a test coil, to the one or more magnetoelastic measurement sensors distributed on the surface of the test object, wherein the test object is positioned outside of an inner volume defined by the test coil; detecting a frequency response of the one or more magnetoelastic measurement sensors using the test coil, while applying the varying magnetic field; and determining whether the pathogen is present based on the detected frequency response of the one or more magnetoelastic measurement sensors.
    Type: Grant
    Filed: October 28, 2013
    Date of Patent: August 29, 2017
    Assignee: AUBURN UNIVERSITY
    Inventors: Bryan A. Chin, Zhongyang Cheng, Suiqiong Li, Mi-Kyung Park, Shin Horikawa, Yating Chai, Kanchana Weerakoon, Stevie R. Best, Martin E. Baltazar-Lopez, Howard C. Wikle
  • Publication number: 20170080436
    Abstract: In at least one illustrative embodiment, an electromagnetic filter may include a transfer pipe and multiple electromagnetic filter elements positioned in an interior volume of the pipe. Each electromagnetic filter element includes a support comb, a solenoid coupled to the support comb, and multiple magnetic members arranged in a planar array positioned within an opening of the support comb. Each magnetic member may rotate about an end that is coupled to the support comb. The magnetic members may be magnetostrictive sensors and may include a biorecognition element to bind with a target microorganism. A method for fluid filtration includes coupling the electromagnetic filter between a fluid source and a fluid destination, energizing the solenoids of each electromagnetic filter elements, and flowing a fluid media through the transfer pipe of the electromagnetic filter. The fluid media may be liquid food such as fruit juice. Other embodiments are described and claimed.
    Type: Application
    Filed: June 23, 2016
    Publication date: March 23, 2017
    Inventors: Bryan A. Chin, Shin Horikawa, Steve R. Best, I-Hsuan Chen, Zhongyang Cheng, Songtao Du
  • Publication number: 20170003905
    Abstract: A method for managing an observed order of instructions in a computing system includes utilizing an overloaded memory barrier instruction to specify whether a global ordering constraint or a local ordering constraint is enforced.
    Type: Application
    Filed: August 31, 2015
    Publication date: January 5, 2017
    Inventors: Shubhendu Sekhar Mukherjee, Richard Eugene Kessler, Mike Bertone, Chris Comis, Bryan Chin
  • Patent number: 9495161
    Abstract: In one embodiment, a processor includes plural processing cores, and plural instruction stores, each instruction store storing at least one instruction, each instruction having a corresponding group number, each instruction store having a unique identifier. The processor also includes a group execution matrix having a plurality of group execution masks and a store execution matrix comprising a plurality of store execution masks. The processor further includes a core selection unit that, for each instruction within each instruction store, selects a store execution mask from the store execution matrix. The core selection unit for each instruction within each instruction store selects at least one group execution mask from the group execution matrix. The core selection unit performs logic operations to create a core request mask.
    Type: Grant
    Filed: August 18, 2015
    Date of Patent: November 15, 2016
    Assignee: Cavium, Inc.
    Inventors: Najeeb I. Ansari, Michael Carns, Jeffrey Schroeder, Bryan Chin
  • Publication number: 20160112264
    Abstract: A new approach is proposed that contemplates systems and methods to support flexible reconfiguration of a network chip by an external entity, such as a baseboard management controller (BMC), while maintaining a secured environment for the chip so that it can booted securely. Specifically, the network chip is configured to designate one or more of its networking ports to the BMC and allow the BMC to configure the designated networking ports without violating the secure areas of the network chip. To this end, the network chip is configured to allow the BMC to access a plurality of registers of the network chip via an Network Controller Sideband Interface (NC-SI) block of the network chip by issuing a plurality NC-SI compliant commands. By configuring the designated networking ports, the BMC is configured to establish a data path to a management software of a platform that includes the network chip though the designated networking ports.
    Type: Application
    Filed: September 30, 2015
    Publication date: April 21, 2016
    Inventors: ISAM AKKAWI, Darren Braun, Wilson Parkhurst Snyder, II, Bryan Chin
  • Publication number: 20160054269
    Abstract: Illustrative embodiments of systems for characterizing resonance behavior of magnetostrictive resonators are disclosed. In one illustrative embodiment, an apparatus may comprise a first channel including one or more driving coils and one or more magnetostrictive resonators, the first channel having a first impedance; a second channel having a second impedance, the second impedance differing from the first impedance by an impedance attributable to the one or more magnetostrictive resonators; a signal source configured to apply an input signal to both the first and second channels; and a signal receiver configured to generate a combined output signal in response to output signals measured from both the first and second channels.
    Type: Application
    Filed: October 30, 2015
    Publication date: February 25, 2016
    Inventors: Zhongyang Cheng, Anxue Zhang, Kewei Zhang, Bryan Chin
  • Publication number: 20150363200
    Abstract: In one embodiment, a processor includes plural processing cores, and plural instruction stores, each instruction store storing at least one instruction, each instruction having a corresponding group number, each instruction store having a unique identifier. The processor also includes a group execution matrix having a plurality of group execution masks and a store execution matrix comprising a plurality of store execution masks. The processor further includes a core selection unit that, for each instruction within each instruction store, selects a store execution mask from the store execution matrix. The core selection unit for each instruction within each instruction store selects at least one group execution mask from the group execution matrix. The core selection unit performs logic operations to create a core request mask.
    Type: Application
    Filed: August 18, 2015
    Publication date: December 17, 2015
    Inventors: Najeeb I. Ansari, Michael Carns, Jeffrey Schroeder, Bryan Chin
  • Patent number: 9201048
    Abstract: Illustrative embodiments of systems for characterizing resonance behavior of magnetostrictive resonators are disclosed. In one illustrative embodiment, an apparatus may comprise a first channel including one or more driving coils and one or more magnetostrictive resonators, the first channel having a first impedance; a second channel having a second impedance, the second impedance differing from the first impedance by an impedance attributable to the one or more magnetostrictive resonators; a signal source configured to apply an input signal to both the first and second channels; and a signal receiver configured to generate a combined output signal in response to output signals measured from both the first and second channels.
    Type: Grant
    Filed: April 6, 2012
    Date of Patent: December 1, 2015
    Assignee: Auburn University
    Inventors: Zhongyang Cheng, Anxue Zhang, Kewei Zhang, Bryan Chin
  • Patent number: 9141815
    Abstract: Included in the present disclosure are a system, method and program of instructions operable to protect vital information by combining information about a user and what they are allowed to see with information about essential files that need to be protected on an information handling system. Using intelligent security rules, essential information may be encrypted without encrypting the entire operating system or application files. According to aspects of the present disclosure, shared data, user data, temporary files, paging files, the password hash that is stored in the registry, and data stored on removable media may be protected.
    Type: Grant
    Filed: December 12, 2012
    Date of Patent: September 22, 2015
    Inventors: Christopher D. Burchett, Jason Jaynes, Bryan Chin, David Consolver
  • Patent number: 9129060
    Abstract: In one embodiment, a processor includes plural processing cores, and plural instruction stores, each instruction store storing at least one instruction, each instruction having a corresponding group number, each instruction store having a unique identifier. The processor also includes a group execution matrix having a plurality of group execution masks and a store execution matrix comprising a plurality of store execution masks. The processor further includes a core selection unit that, for each instruction within each instruction store, selects a store execution mask from the store execution matrix. The core selection unit for each instruction within each instruction store selects at least one group execution mask from the group execution matrix. The core selection unit performs logic operations to create a core request mask.
    Type: Grant
    Filed: October 13, 2011
    Date of Patent: September 8, 2015
    Assignee: Cavium, Inc.
    Inventors: Najeeb I. Ansari, Michael Carns, Jeffrey Schroeder, Bryan Chin
  • Patent number: 9128769
    Abstract: In one embodiment, a processor comprises a plurality of hardware resources, each hardware resource having a clock cycle. The processor also comprises a plurality of work stores, each work store assigned into one of a plurality of virtual functions if a mode of the processor is set to a virtual function mode, and each work store assigned into one physical function if the mode of the processor is set to a physical function mode. The processor further comprises dispatch logic configured to dispatch work from any work store corresponding to any virtual function or physical function to any released hardware resources.
    Type: Grant
    Filed: October 13, 2011
    Date of Patent: September 8, 2015
    Assignee: Cavium, Inc.
    Inventors: Jeffrey Schroeder, Jeff Pangborn, Najeeb Ansari, Bryan Chin, Leo Chen, Ahmed Shahid, Paul Scrobohaci, Chee Hu, Michael Carns, Wu Ye, Brian Hunter
  • Publication number: 20140120524
    Abstract: In at least one illustrative embodiment, a method for in-situ pathogen detection may comprise distributing one or more magnetoelastic measurement sensors on a surface of a test object, wherein each of the one or more magnetoelastic measurement sensors includes a biorecognition element configured to bind with a pathogen to cause a shift in a characteristic frequency of the associated measurement sensor; applying a varying magnetic field, using a test coil, to the one or more magnetoelastic measurement sensors distributed on the surface of the test object, wherein the test object is positioned outside of an inner volume defined by the test coil; detecting a frequency response of the one or more magnetoelastic measurement sensors using the test coil, while applying the varying magnetic field; and determining whether the pathogen is present based on the detected frequency response of the one or more magnetoelastic measurement sensors.
    Type: Application
    Filed: October 28, 2013
    Publication date: May 1, 2014
    Inventors: Bryan A. Chin, Zhongyang Cheng, Suiqiong Li, Mi-Kyung Park, Shin Horikawa, Yating Chai, Kanchana Weerakoon, Stevie R. Best, Martin E. Baltazar-Lopez, Howard C. Wikle
  • Publication number: 20130097350
    Abstract: In one embodiment, a processor includes processing cores, and instruction stores storing instructions at least one instructions having a group number, each instruction store having a unique identifier. The processor also includes a group execution matrix having group execution masks and a store execution matrix having store execution masks. The processor further includes a core selection unit that, for each instruction, selects a store execution mask using the unique identifier as an index. The core selection unit for each instruction, selects at least one group execution mask using the group number as an index, and performs logic operations on the selected group execution mask and the store execution mask to create a core request mask. The processor also includes an arbitration unit that determines instruction priority, assigns an instruction for each available core, and signals the instruction store of the assigned instruction to send the assigned instruction to the available core.
    Type: Application
    Filed: October 13, 2011
    Publication date: April 18, 2013
    Applicant: Cavium, Inc.
    Inventors: Najeeb I. Ansari, Michael Carns, Jeffrey Schroeder, Bryan Chin
  • Publication number: 20130097598
    Abstract: In one embodiment, a processor comprises a plurality of hardware resources, each hardware resource having a clock cycle. The processor also comprises a plurality of work stores, each work store assigned into one of a plurality of virtual functions if a mode of the processor is set to a virtual function mode, and each work store assigned into one physical function if the mode of the processor is set to a physical function mode. The processor further comprises dispatch logic configured to dispatch work from any work store corresponding to any virtual function or physical function to any released hardware resources.
    Type: Application
    Filed: October 13, 2011
    Publication date: April 18, 2013
    Applicant: Cavium, Inc.
    Inventors: Jeffrey Schroeder, Jeff Pangborn, Najeeb Ansari, Bryan Chin, Leo Chen, Ahmed Shahid, Paul Scrobohaci, Chee Hu, Michael Carns, Wu Ye, Brian Hunter
  • Patent number: 8357509
    Abstract: Disclosed herein are recombinant tobacco osmotin polypeptides and methods for expressing tobacco osmotin polypeptides in microbial host cells. The recombinant tobacco osmotin polypeptides produced by the methods disclosed herein may be utilized as biocides or as therapeutic agents in medicaments.
    Type: Grant
    Filed: December 17, 2010
    Date of Patent: January 22, 2013
    Assignee: Auburn University
    Inventors: Tung-Shi Huang, Ywh-Min Tzou, Narendra Slngh, Bryan A. Chin
  • Patent number: 8341404
    Abstract: Included in the present disclosure are a system, method and program of instructions operable to protect vital information by combining information about a user and what they are allowed to see with information about essential files that need to be protected on an information handling system. Using intelligent security rules, essential information may be encrypted without encrypting the entire operating system or application files. According to aspects of the present disclosure, shared data, user data, temporary files, paging files, the password hash that is stored in the registry, and data stored on removable media may be protected.
    Type: Grant
    Filed: February 17, 2006
    Date of Patent: December 25, 2012
    Assignee: Credant Technologies, Inc.
    Inventors: Christopher D. Burchett, Jason Jaynes, Bryan Chin, David Consolver
  • Publication number: 20120280682
    Abstract: Illustrative embodiments of systems for characterizing resonance behavior of magnetostrictive resonators are disclosed. In one illustrative embodiment, an apparatus may comprise a first channel including one or more driving coils and one or more magnetostrictive resonators, the first channel having a first impedance; a second channel having a second impedance, the second impedance differing from the first impedance by an impedance attributable to the one or more magnetostrictive resonators; a signal source configured to apply an input signal to both the first and second channels; and a signal receiver configured to generate a combined output signal in response to output signals measured from both the first and second channels.
    Type: Application
    Filed: April 6, 2012
    Publication date: November 8, 2012
    Inventors: Zhongyang Cheng, Anxue Zhang, Kewei Zhang, Bryan Chin
  • Publication number: 20110318782
    Abstract: Disclosed herein are recombinant tobacco osmotin polypeptides and methods for expressing tobacco osmotin polypeptides in microbial host cells. The recombinant tobacco osmotin polypeptides produced by the methods disclosed herein may be utilized as biocides or as therapeutic agents in medicaments.
    Type: Application
    Filed: December 17, 2010
    Publication date: December 29, 2011
    Applicant: AUBURN UNIVERSITY
    Inventors: Tung-Shi Huang, Ywh-Min Tzou, Narendra Singh, Bryan A. Chin
  • Publication number: 20110004729
    Abstract: Methods, apparatuses, and systems directed to the caching of blocks of lines of memory in a cache-coherent, distributed shared memory system. Block caches used in conjunction with line caches can be used to store more data with less tag memory space compared to the use of line caches alone and can therefore reduce memory requirements. In one particular embodiment, the present invention manages this caching using a DSM-management chip, after the allocation of the blocks by software, such as a hypervisor. An example embodiment provides processing relating to block caches in cache-coherent distributed shared memory.
    Type: Application
    Filed: December 19, 2007
    Publication date: January 6, 2011
    Applicant: 3Leaf Systems, Inc.
    Inventors: Isam Akkawi, Najeeb Imran Ansari, Bryan Chin, Chetana Nagendra Keltcher, Krishnan Subramani, Janakiramanan Vaidyanathan