Patents by Inventor Bum-Ki Moon

Bum-Ki Moon has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 7105400
    Abstract: There is disclosed a method of manufacturing a semiconductor device, comprising forming an underlying region including an interlevel insulating film on a semiconductor substrate, forming an alumina film on the underlying region, forming a hole in the alumina film, filling the hole with a bottom electrode film, forming a dielectric film on the bottom electrode film, and forming a top electrode film on the dielectric film.
    Type: Grant
    Filed: September 30, 2003
    Date of Patent: September 12, 2006
    Assignees: Kabushiki Kaisha Toshiba, Infineon Technologies, AG
    Inventors: Keitaro Imai, Koji Yamakawa, Hiroshi Itokawa, Katsuaki Natori, Osamu Arisumi, Keisuke Nakazawa, Bum-ki Moon
  • Patent number: 7071506
    Abstract: A ferroelectric capacitor device comprises a substrate, a contact plug passing through the substrate, a first electrode formed on the substrate, the first electrode being electrically connected to said plug, a ferroelectric layer formed on the first electrode, a second electrode formed on the ferroelectric layer, one or more first encapsulation layers on the second electrode, the encapsulation layers extending over the device, and one or more hydrogen storage material layers on the encapsulation layers. One or more second encapsulation layers may be formed on the one or more hydrogen storage material layers.
    Type: Grant
    Filed: September 5, 2003
    Date of Patent: July 4, 2006
    Assignee: Infineon Technologies AG
    Inventors: Bum-Ki Moon, Karl Hornik, Haoren Zhuang, Ulrich Egger, Jenny Lian, Andreas Hilliger
  • Publication number: 20060102941
    Abstract: Disclosed is a semiconductor device comprising a semiconductor substrate, a capacitor provided above the semiconductor substrate and including a bottom electrode, a top electrode, and a dielectric film provided between the bottom electrode and the top electrode, the bottom electrode comprising a first conductive film containing iridium, a second conductive film provided between the dielectric film and the first conductive film and formed of a noble metal film, a third conductive film provided between the dielectric film and the second conductive film and formed of a metal oxide film having a perovskite structure, and a diffusion prevention film provided between the first conductive film and the second conductive film and including at least one of a metal film and a metal oxide film, the diffusion prevention film preventing diffusion of iridium contained in the first conductive film.
    Type: Application
    Filed: November 12, 2004
    Publication date: May 18, 2006
    Inventors: Hiroshi Itokawa, Koji Yamakawa, Tohru Ozaki, Yoshinori Kumura, Takamichi Tsuchiya, Nicolas Nagel, Bum-Ki Moon, Andreas Hilliger
  • Patent number: 7042037
    Abstract: Disclosed is a semiconductor device comprising a semiconductor substrate, a capacitor provided above the semiconductor substrate and including a bottom electrode, a top electrode, and a dielectric film provided between the bottom electrode and the top electrode, the bottom electrode comprising a first conductive film containing iridium, a second conductive film provided between the dielectric film and the first conductive film and formed of a noble metal film, a third conductive film provided between the dielectric film and the second conductive film and formed of a metal oxide film having a perovskite structure, and a diffusion prevention film provided between the first conductive film and the second conductive film and including at least one of a metal film and a metal oxide film, the diffusion prevention film preventing diffusion of iridium contained in the first conductive film.
    Type: Grant
    Filed: November 12, 2004
    Date of Patent: May 9, 2006
    Assignees: Kabushiki Kaisha Toshiba, Infineon Technologies AG
    Inventors: Hiroshi Itokawa, Koji Yamakawa, Tohru Ozaki, Yoshinori Kumura, Takamichi Tsuchiya, Nicolas Nagel, Bum-Ki Moon, Andreas Hilliger
  • Patent number: 7031138
    Abstract: In a capacitor and a method for its manufacture, a first electrode layer and a second electrode layer are formed such that a ferroelectric layer is situated between the first and second electrode layer. A first bilayer or multi-layer seed structure is formed between the ferroelectric layer and either the first electrode layer or the second electrode layer.
    Type: Grant
    Filed: December 9, 2002
    Date of Patent: April 18, 2006
    Assignees: Infineon Technologies AG, Kabushiki Kaisha Toshiba
    Inventors: Bum-Ki Moon, Gerhard Beitel, Osamu Arisumi, Hiroshi Itokawa
  • Patent number: 7009230
    Abstract: An improved barrier stack for inhibiting diffusion of atoms or molecules, such as O2 is disclosed. The barrier stack is particularly useful in capacitor over plug structures to prevent plug oxidation which can adversely impact the reliability of the structures. The barrier stack includes first and second barrier layers. In one embodiment, the first barrier layer comprises first and second sub-barrier layers having mismatched grain boundaries. The sub-barrier layers are selected from, for example, Ir, Ru, Pd, Rh, or alloys thereof. By providing mismatched grain boundaries, the interface of the sub-barrier layers block the diffusion path of oxygen. To further enhance the barrier properties, the first barrier layer is passivated with O2 using, for example, a rapid thermal oxidation. The RTO forms a thin oxide layer on the surface of the first barrier layer. The oxide layer can advantageously promote mismatching of the grain boundaries of the first and second sub-barrier layer.
    Type: Grant
    Filed: July 10, 2003
    Date of Patent: March 7, 2006
    Assignees: Infineon Technologies Aktiengesellschaft, Kabushiki Kaisha Toshiba
    Inventors: Bum Ki Moon, Gerhard Beitel, Nicolas Nagel, Andreas Hilliger, Koji Yamakawa, Keitaro Imai
  • Publication number: 20060003469
    Abstract: In a process for fabricating a ferrocapacitor comprising providing ferroelectric PZT elements over an Al2O3 layer, the Al2O3 layer is covered with a seed layer comprising layers of PZT and TiO2. Then a thicker layer of PZT is formed over the seed layer and crystallized. By this process, the crystallinity of the thick PZT layer is much improved, and its orientation is improved to be in the (111) direction. Furthermore, the seed layer reduces downward diffraction of Pb from the thick PZT layer, such as through the Al2O3 into a TEOS structure beneath.
    Type: Application
    Filed: June 30, 2004
    Publication date: January 5, 2006
    Inventors: Karl Hornik, Rainer Bruchhaus, Bum-Ki Moon
  • Publication number: 20050245023
    Abstract: A semiconductor device comprises a bottom electrode, a top electrode, and a dielectric film provided between the bottom electrode and the top electrode and made of a perovskite type ferroelectrics containing Pb, Zr, Ti and O, the dielectric film comprising a first portion formed of a plurality of crystal grains partitioned by grain boundaries having a plurality of directions.
    Type: Application
    Filed: July 11, 2005
    Publication date: November 3, 2005
    Inventors: Osamu Arisumi, Keitaro Imai, Koji Yamakawa, Bum-ki Moon
  • Publication number: 20050239219
    Abstract: In a ferroelectic capacitor including a dielectric ferroelectric element sandwiched between a bottom electrode and top electrode, the bottom electrode is formed with a ridged structure, and the ferroelectric layer is formed over it and on its sides. Thus the dielectric between the top and bottom electrodes includes not just horizontal sections but also non-horizontal sections. The inventive structure thus has a higher effective capacitor area compared to the overall area of the device. This has two advantages. Firstly, it means that the total charge which can be stored in the device is higher. Secondly, it means that damage to the electrodes and the ferroelectric element at their edges regions occupies a lower proportion of the effective area of the device. The ridged structure of the bottom electrode may be due to it being formed over a ridged substructure, or because it is itself selectively etched.
    Type: Application
    Filed: April 26, 2004
    Publication date: October 27, 2005
    Inventor: Bum-Ki Moon
  • Publication number: 20050170531
    Abstract: A method of manufacturing an ultra-thin PZT pyrochlore film comprises providing a structure comprising a base layer, and forming on the base layer, a titanium layer and a PZT layer in mutual contact. The structure is annealed to form a PZT pyrochlore layer on said base layer. Novel devices with an ultra-thin PZT layer may thereby be manufactured.
    Type: Application
    Filed: January 29, 2004
    Publication date: August 4, 2005
    Inventor: Bum-Ki Moon
  • Patent number: 6924519
    Abstract: There is disclosed a semiconductor device comprising a semiconductor substrate, and a capacitor provided above the semiconductor substrate and comprising a bottom electrode, a top electrode, and a dielectric film provided between the bottom electrode and the top electrode, at least one of the bottom electrode and the top electrode comprising a conductive film selected from a noble metal film and a noble metal oxide film, a metal oxide film having a perovskite structure, provided between the dielectric film and the conductive film, represented by ABO3, and containing a first metal element as a B site element, and a metal film provided between the conductive film and the metal oxide film, and containing a second metal element which is a B site element of a metal oxide having a perovskite structure, a decrease of Gibbs free energy at a time when the second metal element forms an oxide being larger than that at a time when the first metal element forms an oxide.
    Type: Grant
    Filed: May 2, 2003
    Date of Patent: August 2, 2005
    Assignees: Kabushiki Kaisha Toshiba, Infineon Technologies, AG
    Inventors: Hiroshi Itokawa, Koji Yamakawa, Keitaro Imai, Katsuaki Natori, Bum-ki Moon
  • Patent number: 6924521
    Abstract: A semiconductor device comprises a bottom electrode, a top electrode, and a dielectric film provided between the bottom electrode and the top electrode and made of a perovskite type ferroelectrics containing Pb, Zr, Ti and O, the dielectric film comprising a first portion formed of a plurality of crystal grains partitioned by grain boundaries having a plurality of directions.
    Type: Grant
    Filed: January 21, 2004
    Date of Patent: August 2, 2005
    Assignees: Kabushiki Kaisha Toshiba, Infineon Technologies AG
    Inventors: Osamu Arisumi, Keitaro Imai, Koji Yamakawa, Bum-ki Moon
  • Publication number: 20050098808
    Abstract: The present invention relates to a ferroelectric device comprising a ferroelectric capacitor and a method for its fabrication. The Qsw of the ferroelectric capacitor is improved by providing a rugged first electrode. The rugged first electrode causes a subsequently deposited ferroelectric layer to have a substantially hemispherical wavy surface thereby increasing the effective surface area between the ferroelectric layer and the electrodes.
    Type: Application
    Filed: November 7, 2003
    Publication date: May 12, 2005
    Inventor: Bum-Ki Moon
  • Publication number: 20050101142
    Abstract: A ferroelectric capacitor in which damage caused by etching exposed faces of a ferroelectric layer of the capacitor is compensated by depositing a seeding layer of ferroelectric material such as PZT on one or more exposed faces of the ferroelectric layer and depositing an electrode layer made of conductive material such as platinum on the seeding layer. An oxygen annealing recovery process is applied to the device. The seeding layer can transform the phase of the damaged surfaces from amorphous to crystalline during the recovery annealing process and, at the same time, provide the damaged surfaces of the ferroelectric layer with missing element(s), for example lead. The oxygen necessary for recovery of the damage may be obtained through the platinum layer from the oxygen atmosphere.
    Type: Application
    Filed: November 7, 2003
    Publication date: May 12, 2005
    Inventor: Bum-Ki Moon
  • Patent number: 6891713
    Abstract: Reduced degradation to capacitor properties is disclosed. A hydrogen storage layer is provided over at least a portion a top capacitor electrode. The hydrogen storage layer absorbs and stores hydrogen, preventing hydrogen from diffusing to the capacitor. The hydrogen storage layer has, for example, lanthium nitride, titanium zirconium nitride, amorphous sm—co, nanostructured carbon, or a combination thereof.
    Type: Grant
    Filed: June 13, 2003
    Date of Patent: May 10, 2005
    Assignee: Infineon Technologies Aktiengesellschaft
    Inventors: Bum Ki Moon, Gerhard Beitel
  • Publication number: 20050070031
    Abstract: There is disclosed a method of manufacturing a semiconductor device, comprising forming an underlying region including an interlevel insulating film on a semiconductor substrate, forming an alumina film on the underlying region, forming a hole in the alumina film, filling the hole with a bottom electrode film, forming a dielectric film on the bottom electrode film, and forming a top electrode film on the dielectric film.
    Type: Application
    Filed: September 30, 2003
    Publication date: March 31, 2005
    Inventors: Keitaro Imai, Koji Yamakawa, Hiroshi Itokawa, Katsuaki Natori, Osamu Arisumi, Keisuke Nakazawa, Bum-ki Moon
  • Publication number: 20050051819
    Abstract: A ferroelectric capacitor device comprises a substrate, a contact plug passing through the substrate, a first electrode formed on the substrate, the first electrode being electrically connected to said plug, a ferroelectric layer formed on the first electrode, a second electrode formed on the ferroelectric layer, one or more first encapsulation layers on the second electrode, the encapsulation layers extending over the device, and one or more hydrogen storage material layers on the encapsulation layers. One or more second encapsulation layers may be formed on the one or more hydrogen storage material layers.
    Type: Application
    Filed: September 5, 2003
    Publication date: March 10, 2005
    Inventors: Bum-Ki Moon, Karl Hornik, Haoren Zhuang, Ulrich Egger, Jenny Lian, Andreas Hilliger
  • Publication number: 20050013091
    Abstract: A multi-layer barrier for a ferroelectric capacitor includes an outdiffusion barrier layer permeable to both hydrogen and oxygen. The outdiffusion barrier layer covers the ferroelectric of the capacitor. Oxygen passes through the outdiffusion barrier layer into the ferroelectric during an oxygen anneal in order to repair damage to the ferroelectric caused during etching. The outdiffusion barrier layer reduces the decomposition of the ferroelectric by blocking molecules leaving the ferroelectric during the oxygen anneal. The multi-layer barrier also includes a hydrogen barrier layer deposited on the outdiffusion barrier layer after repair of the ferroelectric by the oxygen anneal. The hydrogen barrier layer allows the multi-layer barrier to block the passage of hydrogen into the ferroelectric during back-end processes.
    Type: Application
    Filed: July 18, 2003
    Publication date: January 20, 2005
    Inventors: Andreas Hilliger, Jingyu Lian, Nicolas Nagel, Rainer Bruchhaus, Stefan Gernhardt, Uwe Wellhausen, Bum-Ki Moon, Karl Hornik
  • Patent number: 6839220
    Abstract: A multi-layer barrier for a ferroelectric capacitor includes an outdiffusion barrier layer permeable to both hydrogen and oxygen. The outdiffusion barrier layer covers the ferroelectric of the capacitor. Oxygen passes through the outdiffusion barrier layer into the ferroelectric during an oxygen anneal in order to repair damage to the ferroelectric caused during etching. The outdiffusion barrier layer reduces the decomposition of the ferroelectric by blocking molecules leaving the ferroelectric during the oxygen anneal. The multi-layer barrier also includes a hydrogen barrier layer deposited on the outdiffusion barrier layer after repair of the ferroelectric by the oxygen anneal. The hydrogen barrier layer allows the multi-layer barrier to block the passage of hydrogen into the ferroelectric during back-end processes.
    Type: Grant
    Filed: July 18, 2003
    Date of Patent: January 4, 2005
    Assignee: Infineon Technologies AG
    Inventors: Andreas Hilliger, Jingyu Lian, Nicolas Nagel, Rainer Bruchhaus, Stefan Gernhardt, Uwe Wellhausen, Bum-Ki Moon, Karl Hornik
  • Publication number: 20040217404
    Abstract: There is disclosed a semiconductor device comprising a semiconductor substrate, and a capacitor provided above the semiconductor substrate and comprising a bottom electrode, a top electrode, and a dielectric film provided between the bottom electrode and the top electrode, at least one of the bottom electrode and the top electrode comprising a conductive film selected from a noble metal film and a noble metal oxide film, a metal oxide film having a perovskite structure, provided between the dielectric film and the conductive film, represented by ABO3, and containing a first metal element as a B site element, and a metal film provided between the conductive film and the metal oxide film, and containing a second metal element which is a B site element of a metal oxide having a perovskite structure, a decrease of Gibbs free energy at a time when the second metal element forms an oxide being larger than that at a time when the first metal element forms an oxide.
    Type: Application
    Filed: May 2, 2003
    Publication date: November 4, 2004
    Inventors: Hiroshi Itokawa, Koji Yamakawa, Keitaro Imai, Katsuaki Natori, Bum-ki Moon