Abstract: A 3-phase inverter module is provided, which includes first and second U-phase switching elements connected in series to each other to constitute a U-phase inverter, first and second V-phase switching elements connected in series to each other to constitute a V-phase inverter, first and second W-phase switching elements connected in series to each other to constitute a W-phase inverter, a U-phase high voltage integrated circuit for generating a control signal for controlling the U-phase inverter according to a U-phase input signal, which has a fault-out terminal for the U-phase, a V-phase high voltage integrated circuit for generating a control signal for controlling the V-phase inverter according to a V-phase input signal, which has a fault-out terminal for the V-phase, and a W-phase high voltage integrated circuit for generating a control signal for controlling the W-phase inverter according to a W-phase input signal, which has a fault-out terminal for the W-phase.

Abstract: A power module for energy recovery and sustain of a plasma display panel is disclosed. The power module includes a first high-voltage integrated circuit which is of a single type, a first switching element for receiving an output from the first high-voltage integrated circuit, and performing a switching operation in response to the output received from the first high-voltage integrated circuit, a first diode connected to one terminal of the first switching element, a second high-voltage integrated circuit which is of a single type, and is arranged symmetrically with the first high-voltage integrated circuit, a second switching element for receiving an output from the second high-voltage integrated circuit, and performing a switching operation in response to the output received from the second high-voltage integrated circuit, and a second diode connected to one terminal of the second switching element.

Abstract: The motor driving inverter circuit module includes first-phase, second-phase, and third-phase high voltage drivers generating first-phase, second-phase, and third-phase upper arm and lower arm driving signals in response to input signals for driving the first-phase, second-phase, and third-phase upper and lower arms and a first-phase, second-phase, and third-phase upper arm and lower arm transistors, generating first-phase, second-phase, and third-phase motor driving output signals in response to the first-phase, second-phase, and third-phase upper arm and lower arm driving signals of the first-phase, second-phase, and third-phase high voltage drivers. The first-phase, second-phase, and third-phase high voltage drivers and the first-phase, second-phase, and third-phase upper arm and lower arm transistors are respectively integrated into separate chips.

Abstract: Provided is an inverter circuit including a switching device which performs a switching operation corresponding to a gate control signal input to a gate terminal, converts an input DC to an AC, and outputs the AC; an HVIC which inputs the gate control signal to the gate terminal of the switching device; a controller which inputs to the HVIC a control signal for enabling the HVIC to generate the gate control signal; a bootstrap circuit which transmits energy to a high-side region of the HVIC; and an impedance cell which is located between the HVIC and one terminal of the switching device to reduce voltage drop of the high-side HVIC.

Abstract: In accordance with the present invention, a method of switching first and second parallel-connected insulated gate bipolar transistors (IGBTs) is as follows. Each of the first and second IGBTs are turned on in alternating cycles of a system clock such that in any given cycle of the system clock only one of the first and second IGBTs is turned on.

Abstract: Provided is an inverter circuit including a switching device which performs a switching operation corresponding to a gate control signal input to a gate terminal, converts an input DC to an AC, and outputs the AC; an HVIC which inputs the gate control signal to the gate terminal of the switching device; a controller which inputs to the HVIC a control signal for enabling the HVIC to generate the gate control signal; a bootstrap circuit which transmits energy to a high-side region of the HVIC; and an impedance cell which is located between the HVIC and one terminal of the switching device to reduce voltage drop of the high-side HVIC.

Abstract: In accordance with the present invention, a method of switching first and second parallel-connected insulated gate bipolar transistors (IGBTs) is as follows. Each of the first and second IGBTs are turned on in alternating cycles of a system clock such that in any given cycle of the system clock only one of the first and second IGBTs is turned on.

Abstract: An active drive circuit for high power IGBTs provides optimized switching performance for both turn-on and turn-off by incorporating a three-stage action to improve performance characteristics. The gate drive circuit includes a semiconductor switch such as a MOSFET connected in series with a low resistance gate turn-on resistor between the supply line and the gate input line, and a parallel connected bipolar transistor. During the first and third stages of turn-on, the MOSFET switch is turned on to provide rapid charging of the gate, whereas during the second stage the bipolar transistor is turned on to provide a controlled level of current charging of the gate. Similarly, a switch such as an MOSFET is connected in series with a low resistance gate turn-off resistor between the turn-off supply voltage line and the gate input line, and a bipolar transistor is connected in parallel therewith across the supply line and the gate input line.

Abstract: A short circuit protection circuit for IGBTs and similar power switch devices. Device collector voltage, e.g., desaturation voltage, is monitored to detect rapidly the occurrence of a short circuit fault. The voltage between the power device emitter and the Kelvin emitter terminals of the device preferably is also monitored and integrated to obtain an estimate of the current flowing through the power switch device. Circuit protection is implemented if either the measured collector to emitter voltage exceeds a selected level or the estimated current through the device exceeds a selected level. Upon the detection of the fault, a capacitor in parallel with a zener diode is connected between the power switch gate and ground. Thus, following a fault, the gate voltage is driven quickly to a low level as the voltage on the gate is discharged through the capacitor.