Abstract: A packaged semiconductor device includes a die attached to a die flag of a lead frame wherein the die includes a first, second, third, and fourth minor side, wherein the first and second minor sides are opposite each other and the third and fourth minor sides are opposite each other. The device includes an outer-most lead of the lead frame extending outwardly from the first minor side of the die and closest to the third minor side, wherein the outer-most lead includes a thinned region located between the die and a full thickness portion of the outer-most lead. The device includes an electrical connection between the die and the outer-most lead, and an encapsulant surrounding the die, the electrical connection, and surrounding at least a portion of an outer edge of the thinned portion of the outer-most lead such that the full thickness portion of the outer-most lead extends beyond the encapsulant.

Abstract: A packaged integrated circuit (IC) device includes a first IC die with a first inductor, a first layer of adhesive on a first major surface of the first IC die, an isolation layer over the first layer of adhesive, a second layer of adhesive on the isolation layer, a second IC die on the second layer of adhesive, and a second inductor in the second IC die aligned to communicate with the first inductor. The isolation layer extends a prespecified distance beyond a first edge of the second IC die.

Abstract: A packaged semiconductor device includes a die attached to a die flag of a lead frame wherein the die includes a first, second, third, and fourth minor side, wherein the first and second minor sides are opposite each other and the third and fourth minor sides are opposite each other. The device includes an outer-most lead of the lead frame extending outwardly from the first minor side of the die and closest to the third minor side, wherein the outer-most lead includes a thinned region located between the die and a full thickness portion of the outer-most lead. The device includes an electrical connection between the die and the outer-most lead, and an encapsulant surrounding the die, the electrical connection, and surrounding at least a portion of an outer edge of the thinned portion of the outer-most lead such that the full thickness portion of the outer-most lead extends beyond the encapsulant.

Abstract: A packaged lead frame includes a encapsulant having a first minor side, a second minor side opposite the first minor side, a third minor side, and a fourth minor side opposite the third minor side, and a plurality of leads along the third minor side between the first minor side and a center plane between the first and second minor side. The plurality of leads extend outwardly from the encapsulant at a first plane. Each of the plurality of leads includes a corresponding jog external to the encapsulant which jogs away from the center plane, wherein the corresponding jog of each lead from a first lead of the plurality of leads closest to the center plane to a last lead of the first plurality of leads closest to the first minor side jogs incrementally further away the center plane.

Abstract: Systems and methods for thermally enhanced electronic component packaging with through mold vias are described. In some embodiments, a method may include forming one or more vias through an encapsulant with a laser, each of the one or more vias having one end proximal a top surface of an electronic component covered by the encapsulant and another end proximal an outer surface of the encapsulant. The method may also include inserting a thermally conductive material into the one or more vias, providing a heat spreader over the outer surface of the encapsulant, the heat spreader thermally coupled to the thermally conductive material, and reflowing the thermally conductive material.