Patents by Inventor Byeong-Jae Ahn

Byeong-Jae Ahn has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20200142228
    Abstract: A liquid crystal display includes: a gate line connected to a gate electrode; a semiconductor layer disposed on the gate line and including silicon; an ohmic contact layer disposed on the semiconductor layer; and a data conductor disposed on the ohmic contact layer. The semiconductor layer includes a source region, a drain region, and a channel region disposed between the source region and the drain region. The data conductor includes a data line transmitting a data signal, a source electrode corresponding to the source region, and a drain electrode corresponding to the drain region. A channel step of the semiconductor layer is a height difference between an upper surface in the source region or the drain region and an upper surface in the channel region. The upper surface in the source region or the drain region has a maximum height of the semiconductor layer.
    Type: Application
    Filed: June 7, 2019
    Publication date: May 7, 2020
    Inventors: Ki Pyo HONG, Wan NAMGUNG, Seung-Kyu LEE, Hyun Seong KANG, Byeong Jae AHN
  • Patent number: 10288962
    Abstract: A display device includes a first substrate and a pixel electrode on the first substrate. A thickness of the pixel electrode is about 40 nanometers (nm) or less.
    Type: Grant
    Filed: September 23, 2011
    Date of Patent: May 14, 2019
    Assignee: SAMSUNG DISPLAY CO., LTD.
    Inventors: Yeo Geon Yoon, Jun Ho Song, Byeong Jae Ahn, Sung Ho Kang
  • Patent number: 9844155
    Abstract: A display panel includes a first substrate, a second substrate which faces the first substrate, is smaller than the first substrate so that an edge of the first substrate is exposed in a plan view, a fixing member disposed on the exposed edge of the first substrate, and a bonding member disposed between the first substrate and the fixing member.
    Type: Grant
    Filed: June 24, 2014
    Date of Patent: December 12, 2017
    Assignee: SAMSUNG DISPLAY CO., LTD.
    Inventors: Byeong-Jae Ahn, Ju-Hyeon Baek, Dong-Wuuk Seo, Bong-Jun Lee
  • Patent number: 9601075
    Abstract: A display panel includes a plurality of pixels disposed in an active area and arranged substantially in a matrix form including a pixel row and a pixel column, a first gate line disposed adjacent to a first side n of the pixel row and connected to a first pixel in the pixel row, a second gate line disposed adjacent to a second side of the pixel row and connected to a second pixel in the pixel row, a plurality of data lines crossing the first and second gate lines, where the pixels in a pair of adjacent pixel columns are connected to a same data line, and a blocking pattern which overlaps a pixel column disposed in an end portion of the active area.
    Type: Grant
    Filed: June 30, 2014
    Date of Patent: March 21, 2017
    Assignee: SAMSUNG DISPLAY CO., LTD.
    Inventors: Bong-Jun Lee, Ji-Young Jeong, Ju-Hyeon Baek, Dong-Wuuk Seo, Byeong-Jae Ahn
  • Publication number: 20150194116
    Abstract: A display panel includes a plurality of pixels disposed in an active area and arranged substantially in a matrix form including a pixel row and a pixel column, a first gate line disposed adjacent to a first side n of the pixel row and connected to a first pixel in the pixel row, a second gate line disposed adjacent to a second side of the pixel row and connected to a second pixel in the pixel row, a plurality of data lines crossing the first and second gate lines, where the pixels in a pair of adjacent pixel columns are connected to a same data line, and a blocking pattern which overlaps a pixel column disposed in an end portion of the active area.
    Type: Application
    Filed: June 30, 2014
    Publication date: July 9, 2015
    Inventors: Bong-Jun LEE, Ji-Young JEONG, Ju-Hyeon BAEK, Dong-Wuuk SEO, Byeong-Jae AHN
  • Publication number: 20150195924
    Abstract: A display panel includes a first substrate, a second substrate which faces the first substrate, is smaller than the first substrate so that an edge of the first substrate is exposed in a plan view, a fixing member disposed on the exposed edge of the first substrate, and a bonding member disposed between the first substrate and the fixing member.
    Type: Application
    Filed: June 24, 2014
    Publication date: July 9, 2015
    Inventors: Byeong-Jae AHN, Ju-Hyeon BAEK, Dong-Wuuk SEO, Bong-Jun LEE
  • Patent number: 8778710
    Abstract: A display substrate is provided that can prevent the opening of an upper conduction layer. The display substrate comprises a semiconductor layer pattern formed on a substrate, a data interconnection pattern formed on the semiconductor layer pattern, a protection layer formed on the substrate and the data interconnection pattern, contact holes formed on the substrate to expose at least a portion of an upper surface of the semiconductor pattern and at least a portion of an upper surface of the data interconnection pattern, and contact electrodes formed in the contact holes to be in contact with the exposed upper surfaces of the data interconnection pattern and the semiconductor layer pattern.
    Type: Grant
    Filed: November 20, 2012
    Date of Patent: July 15, 2014
    Assignee: Samsung Display Co., Ltd.
    Inventor: Byeong-Jae Ahn
  • Publication number: 20130027287
    Abstract: A display apparatus includes a gate driver which sequentially outputs a gate signal at a high state in response to a gate control signal and a data driver which converts image data into a data signal in response to a data control signal. The display apparatus further includes a display panel which includes a plurality of gate lines which sequentially receive the gate signal, a plurality of data lines which receive the data signal and a plurality of pixels connected to the gate and data lines and which receive the data signal in response to the gate signal to display an image. The polarity of the data signal is inverted after the gate signal transitions to a low state.
    Type: Application
    Filed: October 4, 2012
    Publication date: January 31, 2013
    Inventors: Min-Cheol LEE, Byeong-Jae AHN, Jong-Hwan LEE, Yeon-Kyu MOON, Jong-Hyuk LEE
  • Patent number: 8350266
    Abstract: A display substrate is provided that can prevent the opening of an upper conduction layer. The display substrate comprises a semiconductor layer pattern formed on a substrate, a data interconnection pattern formed on the semiconductor layer pattern, a protection layer formed on the substrate and the data interconnection pattern, contact holes formed on the substrate to expose at least a portion of an upper surface of the semiconductor pattern and at least a portion of an upper surface of the data interconnection pattern, and contact electrodes formed in the contact holes to be in contact with the exposed upper surfaces of the data interconnection pattern and the semiconductor layer pattern.
    Type: Grant
    Filed: October 13, 2010
    Date of Patent: January 8, 2013
    Assignee: Samsung Display Co., Ltd.
    Inventor: Byeong-Jae Ahn
  • Patent number: 8305323
    Abstract: A display apparatus includes a gate driver which sequentially outputs a gate signal at a high state in response to a gate control signal and a data driver which converts image data into a data signal in response to a data control signal. The display apparatus further includes a display panel which includes a plurality of gate lines which sequentially receive the gate signal, a plurality of data lines which receive the data signal and a plurality of pixels connected to the gate and data lines and which receive the data signal in response to the gate signal to display an image. The polarity of the data signal is inverted after the gate signal transitions to a low state.
    Type: Grant
    Filed: December 19, 2007
    Date of Patent: November 6, 2012
    Assignee: Samsung Electronics Co., Ltd.
    Inventors: Min-Cheol Lee, Byeong-Jae Ahn, Jong-Hwan Lee, Yeon-Kyu Moon, Jong-Hyuk Lee
  • Patent number: 8264443
    Abstract: A gate driving circuit includes stages, the stages being cascaded and each including: a pull-up part which pulls up a gate voltage to a clock signal during a horizontal scanning period (1H); a carry part which pulls up a carry voltage to the clock signal during the horizontal scanning period (1H); a pull-up driving part connected to a control terminal (Q-node) common to the carry part and the pull-up part and which receives a previous carry voltage from a first previous stage to turn on the pull-up part and the carry part; and a ripple preventing part which prevents a ripple generated at a previous Q-node of a second previous stage based on a ripple generated at the Q-node of the carry part and the pull-up part.
    Type: Grant
    Filed: September 30, 2008
    Date of Patent: September 11, 2012
    Assignee: Samsung Electronics Co., Ltd.
    Inventors: Hong-Woo Lee, Hyeon-Hwan Kim, Byeong-Jae Ahn, Sun-Hyung Kim, Sung-Man Kim, Bong-Jun Lee
  • Patent number: 8223283
    Abstract: A display substrate includes a base substrate, a first line, a second line, a bridge line, a thin-film transistor (TFT), a storage line, and a pixel electrode. The first line extends in a first direction on the base substrate. The second line extends in a second direction on the base substrate and is divided into two portions with respect to the first line. The bridge line makes contact with the two portions of the second line in first and second bridge contact regions. The TFT includes a source electrode making contact with one of the first and second lines in a data contact region. The storage line is formed on the one of the first and second lines. The pixel electrode is formed on the storage line and is electrically connected to the TFT. The display substrate reduces formation of parasitic capacitance between pixel electrode and data line.
    Type: Grant
    Filed: December 10, 2008
    Date of Patent: July 17, 2012
    Assignee: Samsung Electronics Co., Ltd.
    Inventors: Bong-Jun Lee, Byeong-Jae Ahn, Yeo-Geon Yoon, Hong-Woo Lee, Hyuk-Jin Kim, Jong-Oh Kim, Gyu-Tae Kim
  • Publication number: 20120146971
    Abstract: A display device includes a first substrate and a pixel electrode on the first substrate. A thickness of the pixel electrode is about 40 nanometers (nm) or less.
    Type: Application
    Filed: September 23, 2011
    Publication date: June 14, 2012
    Applicant: SAMSUNG ELECTRONICS CO., LTD.
    Inventors: Yeo Geon YOON, Jun Ho SONG, Byeong Jae AHN, Sung Ho KANG
  • Patent number: 8174478
    Abstract: A gate driving circuit and a display apparatus having the gate driving circuit include a pull-up part and a carry part pull up a present gate signal and a present carry signal, respectively, to a first clock during a first period within one frame. A pull-down part receives a next gate signal to discharge the present gate signal to a source power voltage. A pull-up driving part is connected to control terminals of the carry part and pull-up part (Q-node) to turn the carry part and pull-up part on and off. A floating preventing part prevents an output terminal of the carry part from being floated in response to the first clock during a second period within the one frame.
    Type: Grant
    Filed: June 8, 2007
    Date of Patent: May 8, 2012
    Assignee: Samsung Electronics Co., Ltd.
    Inventors: Sung-Man Kim, Hong-Woo Lee, Byeong-Jae Ahn, Young-Geol Song, Bong-Jun Lee, Yeon-Kyu Moon, Kyung-Wook Kim, Jin-Suk Seo
  • Patent number: 8111342
    Abstract: A display substrate that has increased aperture ratio is presented. The display substrate includes a base substrate, a first metal pattern formed on the base substrate and a gate wiring and a gate electrode. A first insulating layer is formed on the base substrate covering the first metal pattern. A second metal pattern is formed on the first insulating layer including a data wiring crossing the gate wiring, a source electrode connected to the data wiring and a drain electrode separated from the source electrode. A second insulating layer is formed on the base substrate covering the second metal pattern. A transparent electrode is formed on the second insulating layer. An organic layer is formed on the transparent electrode, and a pixel electrode is formed on the organic layer being insulated with the transparent electrode, and contacted to the drain electrode. The organic layer may comprise red, green and blue color filters.
    Type: Grant
    Filed: May 29, 2008
    Date of Patent: February 7, 2012
    Assignee: Samsung Electronics Co., Ltd.
    Inventors: Shin-Tack Kang, Jong-Huan Lee, Hong-Woo Lee, Hyeon-Hwan Kim, Byeong-Jae Ahn, Gyu-Tae Kim, Jong-Woong Chang, Jong-Hyuk Lee
  • Publication number: 20110254002
    Abstract: A display substrate is provided that can prevent the opening of an upper conduction layer. The display substrate comprises a semiconductor layer pattern formed on a substrate, a data interconnection pattern formed on the semiconductor layer pattern, a protection layer formed on the substrate and the data interconnection pattern, contact holes formed on the substrate to expose at least a portion of an upper surface of the semiconductor pattern and at least a portion of an upper surface of the data interconnection pattern, and contact electrodes formed in the contact holes to be in contact with the exposed upper surfaces of the data interconnection pattern and the semiconductor layer pattern.
    Type: Application
    Filed: October 13, 2010
    Publication date: October 20, 2011
    Inventor: Byeong-Jae AHN
  • Patent number: 7973865
    Abstract: A thin film transistor (“TFT”) display plate, capable of reducing a load on a gate line, increasing an aperture ratio and preventing light leakage, includes an insulating substrate, a gate line formed on the insulating substrate, a storage electrode line spaced apart from the gate line and formed on an insulating substrate, a data line insulated from the gate line and the storage electrode line and intersecting the gate line, a pixel electrode formed for each pixel defined by the gate line and the data line, a thin film transistor (“TFT”) connected to the gate line and the data line to apply a voltage to the pixel electrode, and a storage electrode formed on the same layer as the data line and connected to the storage electrode line to form one terminal of a storage capacitor along with the pixel electrode as the other terminal of the storage capacitor.
    Type: Grant
    Filed: August 16, 2006
    Date of Patent: July 5, 2011
    Assignee: Samsung Electronics Co., Ltd.
    Inventors: Bong-jun Lee, Byeong-jae Ahn, Sung-man Kim, Hyun-ho Kang
  • Patent number: 7947985
    Abstract: A thin film transistor array substrate and its manufacturing method are disclosed. A thin film transistor (TFT) includes a gate electrode formed on a substrate, and source and drain electrodes formed on the gate electrode and separated from each other. A common line made of the same material as the gate electrode is formed on the substrate. A storage capacitor includes a storage electrode connected with a storage electrode line and a pixel electrode formed on the storage electrode. The storage electrode and the pixel electrode are formed by patterning a transparent conductive film, and accordingly, light can be transmitted through the region where the storage capacitor is formed to thus increase an aperture ratio.
    Type: Grant
    Filed: May 5, 2009
    Date of Patent: May 24, 2011
    Assignee: Samsung Electronics Co., Ltd.
    Inventors: Dae-Cheol Kim, Woong-Kwon Kim, Sang-Youn Han, In-Woo Kim, Ho-Jun Lee, Byeong-Jae Ahn
  • Patent number: 7902006
    Abstract: In manufacturing a thin film transistor array substrate, a passivation film is formed over the transistors. A first photoresist pattern is formed over the passivation film, with a first portion partially overlying at least one source/drain electrode of each transistor and overlying each pixel electrode region, and with a second portion thicker than the first portion. The passivation film is patterned using the first photoresist pattern as a mask. The first photoresist pattern's first portion is removed to form a second photoresist pattern which protrudes upward around the pixel electrode regions. A transparent conductive film is formed with recesses in the pixel electrode regions. A masking pattern is formed over the transparent film in each pixel electrode region, the masking pattern's top surface being below a top of the transparent film. The transparent film is patterned using the masking pattern as a mask to form the pixel electrodes.
    Type: Grant
    Filed: May 6, 2009
    Date of Patent: March 8, 2011
    Assignee: Samsung Electronics Co., Ltd.
    Inventors: Woong-Kwon Kim, Ho-Jun Lee, Hong-Kee Chin, Sang-Heon Song, Jung-Suk Bang, Jun-Ho Song, Byeong-Jae Ahn, Bae-Heuk Yim
  • Publication number: 20100159652
    Abstract: In manufacturing a thin film transistor array substrate, a passivation film is formed over the transistors. A first photoresist pattern is formed over the passivation film, with a first portion partially overlying at least one source/drain electrode of each transistor and overlying each pixel electrode region, and with a second portion thicker than the first portion. The passivation film is patterned using the first photoresist pattern as a mask. The first photoresist pattern's first portion is removed to form a second photoresist pattern which protrudes upward around the pixel electrode regions. A transparent conductive film is formed with recesses in the pixel electrode regions. A masking pattern is formed over the transparent film in each pixel electrode region, the masking pattern's top surface being below a top of the transparent film. The transparent film is patterned using the masking pattern as a mask to form the pixel electrodes.
    Type: Application
    Filed: May 6, 2009
    Publication date: June 24, 2010
    Inventors: Woong-Kwon Kim, Ho-Jun Lee, Hong-Kee Chin, Sang-Heon Song, Jung-Suk Bank, Jun-Ho Song, Byeong-Jae Ahn, Bae-Heuk Yim