Patents by Inventor Byong-man Kim

Byong-man Kim has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 7964159
    Abstract: Described herein are novel devices for the study of transport characteristics of complex or simple fluids, interactions among molecules in suspension, interactions between molecules in suspension and wall-bound molecules, and biochemical sensing devices made of reservoirs for fluid containment linked by a nanotubes. Also disclosed are methods of delivering medicaments and monitoring fluidic interactions of molecules or analytes.
    Type: Grant
    Filed: July 8, 2005
    Date of Patent: June 21, 2011
    Assignees: The Trustees Of The University of Pennsylvania, Drexel University
    Inventors: Haim H. Bau, Byong Man Kim, Michael A. Riegelman, Yury Gogotsi
  • Patent number: 7626846
    Abstract: A media for an information storage device includes a substrate of single-crystal silicon, a buffer layer of an epitaxial single crystal insulator formed over the substrate, a bottom electrode layer of an epitaxial single crystal conductor formed over the buffer layer, a ferroelectric layer of an epitaxial single crystal ferroelectric material formed over the bottom electrode layer, and an overlayer of an epitaxial single crystal material formed over the ferroelectric layer. Dipole charges generally having a first orientation exist at an interface between the bottom electrode layer and the ferroelectric layer includes, while dipole charges generally having a second orientation opposite the first orientation exist at an interface between the ferroelectric layer and the overlayer includes.
    Type: Grant
    Filed: July 16, 2007
    Date of Patent: December 1, 2009
    Assignee: Nanochip, Inc.
    Inventors: Valluri Ramana Rao, Li-Peng Wang, Qing Ma, Byong Man Kim
  • Publication number: 20090021975
    Abstract: A media for an information storage device comprises a substrate of single-crystal silicon, a buffer layer of an epitaxial single crystal insulator formed over the substrate, a bottom electrode layer of an epitaxial single crystal conductor formed over the buffer layer, a ferroelectric layer of an epitaxial single crystal ferroelectric material formed over the bottom electrode layer, and an overlayer of an epitaxial single crystal material formed over the ferroelectric layer. Dipole charges generally having a first orientation exist at an interface between the bottom electrode layer and the ferroelectric layer includes, while dipole charges generally having a second orientation opposite the first orientation exist at an interface between the ferroelectric layer and the overlayer includes.
    Type: Application
    Filed: July 16, 2007
    Publication date: January 22, 2009
    Inventors: Valluri Ramana Rao, Li-Peng Wang, Qing Ma, Byong Man Kim
  • Publication number: 20080316897
    Abstract: A method of forming a passivation layer over a ferroelectric layer of a ferroelectric media comprises introducing the ferroelectric layer to a plasma comprising one of oxygen, oxygen-helium, and oxygen-nitrogen-helium, etching a surface of the ferroelectric layer, forming one of a substantially oxygen enriched layer and a substantially hydroxyl enriched layer at the surface of the ferroelectric layer, introducing the ferroelectric layer to an environment comprising substantially nitrogen, and maintaining the ferroelectric layer within the environment so that nitrogen enriches the substantially oxygen enriched layer to form a passivation layer.
    Type: Application
    Filed: June 19, 2007
    Publication date: December 25, 2008
    Applicant: NANOCHIP, INC.
    Inventors: Byong Man KIM, Donald Edward ADAMS, Brett Eldon HUFF, Yevgeny V. ANOIKIN, Robert N. STARK
  • Publication number: 20080318086
    Abstract: A system for storing information comprises a media including a ferroelectric layer and a passivation layer formed over the ferroelectric layer, and a tip arranged in approximate contact with the passivation layer. The tip detects a polarization signal that corresponds to changes in polarization of domains of the ferroelectric layer.
    Type: Application
    Filed: June 19, 2007
    Publication date: December 25, 2008
    Applicant: NANOCHIP, INC.
    Inventors: Byong Man Kim, Donald Edward Adams, Brett Eldon Huff, Yevgeny V. Anoikin, Robert N. Stark
  • Patent number: 7407856
    Abstract: A method of manufacturing a memory device includes defining a field region and an active region in a substrate, forming a field oxide layer on the field region, forming an insulating layer on the active region, patterning the insulating layer to form first and second bit lines separated from and parallel to each other on the active region, forming a memory element for storing data in a nonvolatile state, wherein the memory element passes across the first and second bit lines, and forming a word line on the insulating layer and the memory element.
    Type: Grant
    Filed: December 8, 2005
    Date of Patent: August 5, 2008
    Assignee: Samsung Electronics Co., Ltd.
    Inventors: In-kyeong Yoo, Byong-man Kim
  • Publication number: 20080174918
    Abstract: An embodiment of a system for storing information in accordance with the present invention comprises a media including a barrier layer, an isolation layer and a trapping layer disposed between the barrier layer and the isolation layer; and a tip adapted to inject a charge through the barrier layer and into the trapping layer.
    Type: Application
    Filed: January 19, 2007
    Publication date: July 24, 2008
    Applicant: Nanochip, Inc.
    Inventor: Byong Man Kim
  • Publication number: 20060086966
    Abstract: A memory device including a single transistor having functions of RAM and ROM and methods for operating and manufacturing the same are provided. The memory device includes a single transistor formed on a substrate. The transistor may be a memory transistor having a gate with a nonvolatile memory element, or the nonvolatile memory element is provided between the transistor and the substrate.
    Type: Application
    Filed: December 8, 2005
    Publication date: April 27, 2006
    Applicant: SAMSUNG ELECTRONICS CO., LTD.
    Inventors: In-kyeong Yoo, Byong-man Kim
  • Patent number: 7020064
    Abstract: A rewritable data storage using a carbonaceous material writes or erases information represented by the carbonaceous material by means of a current induced electrochemical reaction on a conductive layer, by controlling a voltage applied across the space between a cantilever tip and the conductive layer. Also, the size of the carbonaceous material representing information is controlled by the level of the applied voltage or the application duration.
    Type: Grant
    Filed: May 10, 2001
    Date of Patent: March 28, 2006
    Assignee: Samsung Electronics Co., Ltd.
    Inventors: Byong-man Kim, Yo-sep Min, Jo-won Lee, Nae-sung Lee
  • Patent number: 6999346
    Abstract: A memory device including a single transistor having functions of RAM and ROM and methods for operating and manufacturing the same are provided. The memory device includes a single transistor formed on a substrate. The transistor may be a memory transistor having a gate with a nonvolatile memory element, or the nonvolatile memory element is provided between the transistor and the substrate.
    Type: Grant
    Filed: February 10, 2004
    Date of Patent: February 14, 2006
    Assignee: Samsung Electronics Co., Ltd.
    Inventors: In-kyeong Yoo, Byong-man Kim
  • Patent number: 6946346
    Abstract: In a method for manufacturing a single electron memory device including a single electron storage element in a gate lamination pattern formed on a nano-scale channel region of a MOSFET, formation of the gate lamination pattern includes sequentially forming a lower layer and a single electron storage medium for storing a single electron tunneling through the lower layer on a substrate, forming an upper layer including a plurality of quantum dots on the single electron storage medium, forming a gate electrode layer on the upper layer to be in contact with the plurality of quantum dots, and patterning the lower layer, the single electron storage medium, the upper layer, and the gate electrode layer, in reverse order.
    Type: Grant
    Filed: October 9, 2003
    Date of Patent: September 20, 2005
    Assignee: Samsung Electronics Co., Ltd.
    Inventors: Soo-doo Chae, Byong-man Kim, Moon-kyung Kim, Hee-soon Chae, Won-il Ryu
  • Patent number: 6867999
    Abstract: A memory device including a single transistor having functions of RAM and ROM and methods for operating and manufacturing the same are provided. The memory device includes a single transistor formed on a substrate. The transistor may be a memory transistor having a gate with a nonvolatile memory element, or the nonvolatile memory element is provided between the transistor and the substrate.
    Type: Grant
    Filed: February 12, 2004
    Date of Patent: March 15, 2005
    Assignee: Samsung Electronics Co., Ltd.
    Inventors: In-kyeong Yoo, Byong-man Kim
  • Publication number: 20040160816
    Abstract: A memory device including a single transistor having functions of RAM and ROM and methods for operating and manufacturing the same are provided. The memory device includes a single transistor formed on a substrate. The transistor may be a memory transistor having a gate with a nonvolatile memory element, or the nonvolatile memory element is provided between the transistor and the substrate.
    Type: Application
    Filed: February 12, 2004
    Publication date: August 19, 2004
    Applicant: SAMSUNG ELECTRONICS CO., LTD
    Inventors: In-kyeong Yoo, Byong-man Kim
  • Publication number: 20040155283
    Abstract: A memory device including a single transistor having functions of RAM and ROM and methods for operating and manufacturing the same are provided. The memory device includes a single transistor formed on a substrate. The transistor may be a memory transistor having a gate with a nonvolatile memory element, or the nonvolatile memory element is provided between the transistor and the substrate.
    Type: Application
    Filed: February 10, 2004
    Publication date: August 12, 2004
    Applicant: SAMSUNG ELECTRONICS CO, LTD.
    Inventors: In-kyeong Yoo, Byong-man Kim
  • Patent number: 6740925
    Abstract: A memory device including a single transistor having functions of RAM and ROM and methods for operating and manufacturing the same are provided. The memory device includes a single transistor formed on a substrate. The transistor may be a memory transistor having a gate with a nonvolatile memory element, or the nonvolatile memory element is provided between the transistor and the substrate.
    Type: Grant
    Filed: January 10, 2002
    Date of Patent: May 25, 2004
    Assignee: Samsung Electronics Co., Ltd.
    Inventors: In-kyeong Yoo, Byong-man Kim
  • Publication number: 20040076032
    Abstract: A single electron memory device including quantum dots between a gate electrode and a single electron storage element and a method for manufacturing the same, wherein the single electron memory device includes a substrate on which a nano-scale channel region is formed between a source and a drain, and a gate lamination pattern including quantum dots on the channel region. The gate lamination pattern includes a lower layer formed on the channel region, a single electron storage medium storing a single electron tunneling through the lower layer formed on the lower layer, an upper layer including quantum dots formed on the single electron storage medium, and a gate electrode formed on the upper layer to be in contact with the quantum dots.
    Type: Application
    Filed: October 9, 2003
    Publication date: April 22, 2004
    Applicant: SAMSUNG ELECTRONICS CO. LTD.
    Inventors: Soo-Doo Chae, Byong-Man Kim, Moon-Kyung Kim, Hee-Soon Chae, Won-Il Ryu
  • Patent number: 6687210
    Abstract: A high-density information storage apparatus using electron emission and methods of writing, reading and erasing information using the same are provided. The high-density information storage apparatus includes a lower electrode, a photoconductive layer and a recording medium sequentially provided on the lower electrode, a conductive layer converting unit for making the photoconductive layer conductive, a data write and read unit for writing data to the recording medium or reading data from the recording medium, a data loss preventing unit for preventing loss of data during data write and read operations, and a power supply connected to the lower electrode and the data write and read unit, for supplying voltage necessary for reading and writing data.
    Type: Grant
    Filed: March 6, 2002
    Date of Patent: February 3, 2004
    Assignee: Samsung Electronics Co., Ltd.
    Inventors: In-kyeong Yoo, Won-bong Choi, Byong-man Kim
  • Patent number: 6670670
    Abstract: A single electron memory device including quantum dots between a gate electrode and a single electron storage element and a method for manufacturing the same, wherein the single electron memory device includes a substrate on which a nano-scale channel region is formed between a source and a drain, and a gate lamination pattern including quantum dots on the channel region. The gate lamination pattern includes a lower layer formed on the channel region, a single electron storage medium storing a single electron tunneling through the lower layer formed on the lower layer, an upper layer including quantum dots formed on the single electron storage medium, and a gate electrode formed on the upper layer to be in contact with the quantum dots.
    Type: Grant
    Filed: April 19, 2002
    Date of Patent: December 30, 2003
    Assignee: Samsung Electronics Co., Ltd.
    Inventors: Soo-doo Chae, Byong-man Kim, Moon-kyung Kim, Hee-soon Chae, Won-il Ryu
  • Patent number: 6664123
    Abstract: A method for etching a metal layer on a scale of nano meters, includes preparing a substrate on which a metal layer is formed, positioning a micro tip over the metal layer, generating an electron beam from the micro tip by applying a predetermined voltage between the metal layer and the micro tip, and etching the surface of the metal layer into a predetermined pattern with the electron beam. Accordingly, it is possible to form an etched pattern by applying a negative bias to a micro tip without applying a strong mechanical force to the micro tip, and heating/melting the metal layer with the use of an electron beam emitted from the micro tip which is negative-biased.
    Type: Grant
    Filed: December 28, 2001
    Date of Patent: December 16, 2003
    Assignee: Samsung Electronics Co., Ltd.
    Inventors: Byong-man Kim, Soo-doo Chae, Hee-soon Chae, Won-il Ryu
  • Patent number: 6597036
    Abstract: A multi-value single electron memory using a multi-quantum dot, in which the floating gates (FG) of a EEPROM or a flash memory are formed to act as two quantum dots, and the two quantum dots are applied to multi-value memories, and a driving method of the multi-value single electron memory, are provided. Thus, a multi-value memory can be realized using two quantum dots. Also, an ultra-highly integrated memory of 1 Tb or greater can be realized without encountering a physical limit such as a short channel effect (SCE) caused by scaling down MOSFETs, in contrast to other memories.
    Type: Grant
    Filed: October 20, 2000
    Date of Patent: July 22, 2003
    Assignee: Samsung Electronics Co., Ltd.
    Inventors: Jo-won Lee, Byong-man Kim, Moon-kyung Kim