Patents by Inventor Byoung Ki Lee
Byoung Ki Lee has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).
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Publication number: 20240136674Abstract: Disclosed is an electrode assembly, a battery, and a battery pack and a vehicle including the same. In the electrode assembly, a first electrode, a second electrode, and a separator interposed therebetween are wound based on a winding axis to define a core and an outer circumference. The first electrode includes a first active material portion coated with an active material layer and a first uncoated portion not coated with an active material layer along a winding direction. At least a part of the first uncoated portion is defined as an electrode tab by itself. The first uncoated portion includes a first portion adjacent to the core of the electrode assembly, a second portion adjacent to the outer circumference of the electrode assembly, and a third portion interposed between the first portion and the second portion. The first portion or the second portion has a smaller height than the third portion in the winding axis direction.Type: ApplicationFiled: January 19, 2022Publication date: April 25, 2024Applicant: LG ENERGY SOLUTION, LTD.Inventors: Jong-Sik PARK, Jae-Won LIM, Yu-Sung CHOE, Hak-Kyun KIM, Je-Jun LEE, Byoung-Gu LEE, Duk-Hyun RYU, Kwan-Hee LEE, Jae-Eun LEE, Pil-Kyu PARK, Kwang-Su HWANGBO, Do-Gyun KIM, Geon-Woo MIN, Hae-Jin LIM, Min-Ki JO, Su-Ji CHOI, Bo-Hyun KANG, Jae-Woong KIM, Ji-Min JUNG, Jin-Hak KONG, Soon-O LEE, Kyu-Hyun CHOI
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Publication number: 20240128517Abstract: Disclosed is an electrode assembly, a battery, and a battery pack and a vehicle including the same. In the electrode assembly, a first electrode, a second electrode, and a separator interposed therebetween are wound based on an axis to define a core and an outer circumference. The first electrode includes an uncoated portion at a long side end thereof and exposed out of the separator along a winding axis direction of the electrode assembly. A part of the uncoated portion is bent in a radial direction of the electrode assembly to form a bending surface region that includes overlapping layers of the uncoated portion, and in a partial region of the bending surface region, the number of stacked layers of the uncoated portion is 10 or more in the winding axis direction of the electrode assembly.Type: ApplicationFiled: January 19, 2022Publication date: April 18, 2024Applicant: LG ENERGY SOLUTION, LTD.Inventors: Hae-Jin LIM, Jin-Hak KONG, Soon-O LEE, Kyu-Hyun CHOI, Do-Gyun KIM, Su-Ji CHOI, Kwang-Su HWANGBO, Geon-Woo MIN, Min-Ki JO, Jae-Won LIM, Hak-Kyun KIM, Je-Jun LEE, Ji-Min JUNG, Jae-Woong KIM, Jong-Sik PARK, Yu-Sung CHOE, Byoung-Gu LEE, Duk-Hyun RYU, Kwan-Hee LEE, Jae-Eun LEE, Bo-Hyun KANG, Pil-Kyu PARK
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Publication number: 20240093388Abstract: Proposed is a CO2-reduction membrane electrode assembly (MEA), which is a novel MEA capable of changing a reaction condition to an alkaline condition from a problematic acidic condition unfavorable to reactions on a cathode side during catalytic reactions using a cation exchange membrane (CEM) as a separator. In addition, the MEA can reduce a hydrogen evolution reaction (HER), which is a side reaction. In addition, a method of manufacturing the MEA, and a CO2-reduction assembly including the MEA are also proposed.Type: ApplicationFiled: January 31, 2023Publication date: March 21, 2024Inventors: Hyung-Suk OH, Woong Hee LEE, Ung LEE, Jai Hyun KOH, Dong Ki LEE, Dahye WON, Byoung Koun MIN
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Patent number: 10121586Abstract: A manufacturing method of an amorphous soft magnetic core using a Fe-based amorphous metallic powder includes size-sorting an amorphous metallic powder obtained by pulverizing an amorphous ribbon prepared by a rapid solidification process (RSP) and then using the amorphous metallic powder having a particle size distribution so as to comprise 10 to 85 wt. % of powder having a particle size of 75 to 100 ?m, 10 to 70 wt. % of powder having a particle size of 50 to 75 ?m, and 5 to 20 wt. % of powder having a particle size of 5 to 50 ?m to manufacture an amorphous soft magnetic core with excellent high-current DC bias characteristic and good core loss characteristic.Type: GrantFiled: January 21, 2014Date of Patent: November 6, 2018Assignee: AMOGREENTECH CO., LTD.Inventors: Byoung Ki Lee, Se Joong Yoon, Mi Rae Kim
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Patent number: 10109794Abstract: A method of semiconductor device fabrication that includes sequentially forming an interfacial conductive layer and an etch stop layer on a resistive memory layer; forming a main conductive layer on the etch stop layer; exposing a portion of the etch stop layer by patterning the main conductive layer; exposing a portion of the interfacial conductive layer by patterning the portion of the etch stop layer; forming an upper electrode structure by patterning the portion of the interfacial conductive layer; cleaning a surface of the upper electrode structure and an exposed surface of the resistive memory layer; and patterning the resistive memory layer using the upper electrode structure as an etch mask.Type: GrantFiled: June 27, 2017Date of Patent: October 23, 2018Assignee: SK Hynix Inc.Inventors: Gyu Hyun Kim, Dae Won Kim, Byoung Ki Lee, Han Woo Cho
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Publication number: 20170294581Abstract: A method of semiconductor device fabrication that includes sequentially forming an interfacial conductive layer and an etch stop layer on a resistive memory layer; forming a main conductive layer on the etch stop layer; exposing a portion of the etch stop layer by patterning the main conductive layer; exposing a portion of the interfacial conductive layer by patterning the portion of the etch stop layer; forming an upper electrode structure by patterning the portion of the interfacial conductive layer; cleaning a surface of the upper electrode structure and an exposed surface of the resistive memory layer; and patterning the resistive memory layer using the upper electrode structure as an etch mask.Type: ApplicationFiled: June 27, 2017Publication date: October 12, 2017Inventors: Gyu Hyun KIM, Dae Won KIM, Byoung Ki LEE, Han Woo CHO
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Patent number: 9748481Abstract: A method of semiconductor device fabrication that includes sequentially forming an interfacial conductive layer and an etch stop layer on a resistive memory layer; forming a main conductive layer on the etch stop layer; exposing a portion of the etch stop layer by patterning the main conductive layer; exposing a portion of the interfacial conductive layer by patterning the portion of the etch stop layer; forming an upper electrode structure by patterning the portion of the interfacial conductive layer; cleaning a surface of the upper electrode structure and an exposed surface of the resistive memory layer; and patterning the resistive memory layer using the upper electrode structure as an etch mask.Type: GrantFiled: October 14, 2015Date of Patent: August 29, 2017Assignee: SK Hynix Inc.Inventors: Gyu Hyun Kim, Dae Won Kim, Byoung Ki Lee, Han Woo Cho
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Publication number: 20170104154Abstract: A variable resistive memory device may include a phase change region, a phase change layer, a gap-filling layer and an upper electrode. The phase change region may have a sidewall and a bottom surface. The phase change layer may have a linear shape extended along the bottom surface and the sidewall of the phase change region. The gap-filling layer may be formed in a portion of the phase change region surrounded by the phase change layer. The upper electrode may be formed on the phase change layer and the gap-filling layer.Type: ApplicationFiled: January 6, 2016Publication date: April 13, 2017Inventors: Hyung Keun KIM, Byoung Ki LEE, Su Jin CHAE
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Publication number: 20160359111Abstract: A method of semiconductor device fabrication that includes sequentially forming an interfacial conductive layer and an etch stop layer on a resistive memory layer; forming a main conductive layer on the etch stop layer; exposing a portion of the etch stop layer by patterning the main conductive layer; exposing a portion of the interfacial conductive layer by patterning the portion of the etch stop layer; forming an upper electrode structure by patterning the portion of the interfacial conductive layer; cleaning a surface of the upper electrode structure and an exposed surface of the resistive memory layer; and patterning the resistive memory layer using the upper electrode structure as an etch mask.Type: ApplicationFiled: October 14, 2015Publication date: December 8, 2016Inventors: Gyu Hyun KIM, Dae Won KIM, Byoung Ki LEE, Han Woo CHO
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Patent number: 9392735Abstract: A magnetic field shielding sheet includes: at least one layer thin magnetic sheet made of a Fe-based amorphous alloy and flake-treated so as to be separated into a plurality of fine pieces; a protective film that is adhered on one surface of the thin magnetic sheet via a first adhesive layer provided on one side of the protective film; and a double-sided tape that is adhered on the other surface of the thin magnetic sheet via a second adhesive layer provided on one side of the double-sided adhesive tape, wherein the thin magnetic sheet is obtained by heat treating an amorphous ribbon sheet made of the Fe-based amorphous alloy at a temperature of 300° C. to 480° C. A method of manufacturing the magnetic field shielding sheet, and a portable terminal device using the magnetic field shielding sheet are disclosed.Type: GrantFiled: June 4, 2013Date of Patent: July 12, 2016Assignee: AMOSENSE CO., LTD.Inventors: Kil Jae Jang, Dong Hoon Lee, Byoung Ki Lee
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Publication number: 20150357118Abstract: A manufacturing method of an amorphous soft magnetic core using a Fe-based amorphous metallic powder includes size-sorting an amorphous metallic powder obtained by pulverizing an amorphous ribbon prepared by a rapid solidification process (RSP) and then using the amorphous metallic powder having a particle size distribution so as to comprise 10 to 85 wt. % of powder having a particle size of 75 to 100 ?m, 10 to 70 wt. % of powder having a particle size of 50 to 75 ?m, and 5 to 20 wt. % of powder having a particle size of 5 to 50 ?m to manufacture an amorphous soft magnetic core with excellent high-current DC bias characteristic and good core loss characteristic.Type: ApplicationFiled: January 21, 2014Publication date: December 10, 2015Applicant: AMOGREENTECH CO., LTD.Inventors: Byoung Ki LEE, Se Joong YOON, Mi Rae KIM
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Publication number: 20150124402Abstract: A magnetic field shielding sheet includes: at least one layer thin magnetic sheet made of a Fe-based amorphous alloy and flake-treated so as to be separated into a plurality of fine pieces; a protective film that is adhered on one surface of the thin magnetic sheet via a first adhesive layer provided on one side of the protective film; and a double-sided tape that is adhered on the other surface of the thin magnetic sheet via a second adhesive layer provided on one side of the double-sided adhesive tape, wherein the thin magnetic sheet is obtained by heat treating an amorphous ribbon sheet made of the Fe-based amorphous alloy at a temperature of 300° C. to 480° C. A method of manufacturing the magnetic field shielding sheet, and a portable terminal device using the magnetic field shielding sheet are disclosed.Type: ApplicationFiled: June 4, 2013Publication date: May 7, 2015Inventors: Kil Jae Jang, Dong Hoon Lee, Byoung Ki Lee
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Patent number: 8268092Abstract: Provided are a magnetic sheet for use in a radio frequency identification (RFID) antenna, an RFID antenna including the magnetic sheet, and a method of manufacturing the magnetic sheet, in which the magnetic sheet includes an amorphous alloy selected from the group consisting of Fe—Si—B, Fe—Si—B—Cu—Nb, Fe—Zr—B and Co—Fe—Si—B. The magnetic sheet is made by laminating amorphous alloy ribbons made of an amorphous alloy between magnetic sheet layers formed of alloy powder including at least one amorphous alloy and then compression-molding the amorphous alloy ribbons, to thereby control microcrack of the amorphous alloy ribbons and enhance characteristic of an end-product. The magnetic sheet is also thin, and has an excellent magnetic permeability, and a simple manufacturing process.Type: GrantFiled: July 22, 2010Date of Patent: September 18, 2012Assignee: Amotech Co., Ltd.Inventors: Jae Suk Yang, Hyeon Chul Lim, Byoung Ki Lee, Yong Sup Lee, Yong Hyun Kim, Yong Sul Song, Sang Kyun Kwon, Beom Jin Kim
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Publication number: 20120211817Abstract: A flash memory device including a semiconductor substrate that includes selection transistor regions and a memory cell region defined between the selection transistor region, first isolation layers formed in the selection transistor regions, and second isolation layers formed in the memory cell region. The second isolation layers have a lower height than the first isolation layers.Type: ApplicationFiled: May 2, 2012Publication date: August 23, 2012Applicant: HYNIX SEMICONDUCTOR INC.Inventor: Byoung Ki Lee
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Patent number: 8216899Abstract: According to the present disclosure, a flash memory device includes a semiconductor substrate that includes selection transistor regions and a memory cell region defined between the selection transistor region, first isolation layers formed in the selection transistor regions, and second isolation layers formed in the memory cell region. The second isolation layers have a lower height than the first isolation layers.Type: GrantFiled: October 28, 2009Date of Patent: July 10, 2012Assignee: Hynix Semiconductor Inc.Inventor: Byoung Ki Lee
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Publication number: 20100288418Abstract: Provided are a magnetic sheet for use in a radio frequency identification (RFID) antenna, an RFID antenna including the magnetic sheet, and a method of manufacturing the magnetic sheet, in which the magnetic sheet includes an amorphous alloy selected from the group consisting of Fe—Si—B, Fe—Si—B—Cu—Nb, Fe—Zr—B and Co—Fe—Si—B. The magnetic sheet is made by laminating amorphous alloy ribbons made of an amorphous alloy between magnetic sheet layers formed of alloy powder including at least one amorphous alloy and then compression-molding the amorphous alloy ribbons, to thereby control microcrack of the amorphous alloy ribbons and enhance characteristic of an end-product. The magnetic sheet is also thin, and has an excellent magnetic permeability, and a simple manufacturing process.Type: ApplicationFiled: July 22, 2010Publication date: November 18, 2010Applicant: AMOTECH CO., LTD.Inventors: JAE SUK YANG, HYEON CHUL LIM, BYOUNG KI LEE, YONG SUP LEE, YONG HYUN KIM, YONG SUL SONG, SANG KYUN KWON, BEOM JIN KIM
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Publication number: 20100181608Abstract: According to the present disclosure, a flash memory device includes a semiconductor substrate that includes selection transistor regions and a memory cell region defined between the selection transistor region, first isolation layers formed in the selection transistor regions, and second isolation layers formed in the memory cell region. The second isolation layers have a lower height than the first isolation layers.Type: ApplicationFiled: October 28, 2009Publication date: July 22, 2010Applicant: HYNIX SEMICONDUCTOR INC.Inventor: Byoung Ki Lee
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Patent number: 7696043Abstract: A method of manufacturing a flash memory device includes the steps of forming trenches by forming a tunnel oxide layer and a conductive layer for a floating gate over a semiconductor substrate, and then etching a portion of the conductive layer, the tunnel oxide layer and the semiconductor substrate to form the trenches, filling the trenches with an insulating layer to form isolation layers projecting above the floating gate, forming spacers on sidewalls of the isolation layers projecting above the floating gate, etching the conductive layer using the spacers as a mask, thereby forming a U-shaped conductive layer, removing the spacers, etching the top surface of the isolation layers, thereby controlling an Effective Field Height (EFH) of the isolation layer, and forming a dielectric layer and a conductive layer for a control gate on the resulting surface.Type: GrantFiled: June 26, 2007Date of Patent: April 13, 2010Assignee: Hynix Semiconductor Inc.Inventor: Byoung Ki Lee
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Patent number: 7563674Abstract: A method of manufacturing a NAND flash memory device, wherein isolation layers are formed in a semiconductor substrate, and an upper side of each of the isolation layers is made to have a negative profile. A polysilicon layer is formed on the entire surface. At this time, a seam is formed within the polysilicon layer due to the negative profile. A post annealing process is performed in order to make the seam to a void. Accordingly, an electrical interference phenomenon between cells can be reduced and a threshold voltage (Vt) shift value can be lowered.Type: GrantFiled: November 28, 2006Date of Patent: July 21, 2009Assignee: Hynix Semiconductor Inc.Inventor: Byoung Ki Lee
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Patent number: RE42409Abstract: A method of manufacturing a flash memory device includes the steps of forming trenches by forming a tunnel oxide layer and a conductive layer for a floating gate over a semiconductor substrate, and then etching a portion of the conductive layer, the tunnel oxide layer and the semiconductor substrate to form the trenches, filling the trenches with an insulating layer to form isolation layers projecting above the floating gate, forming spacers on sidewalls of the isolation layers projecting above the floating gate, etching the conductive layer using the spacers as a mask, thereby forming a U-shaped conductive layer, removing the spacers, etching the top surface of the isolation layers, thereby controlling an Effective Field Height (EFH) of the isolation layer, and forming a dielectric layer and a conductive layer for a control gate on the resulting surface.Type: GrantFiled: May 24, 2010Date of Patent: May 31, 2011Assignee: Hynix Semiconductor Inc.Inventor: Byoung Ki Lee