Abstract: An apparatus for generating cartoon content includes: a cut input controller configured to control inputting of a signal of adding a cut included in the cartoon content and including a layer; an effect input controller configured to control inputting of a type of an effect applied to the layer and property information; and a cut generator configured to generate a final cut to stop without moving in correspondence with a user event that is input, wherein the cut generator generates the final cut such that the cartoon content move in correspondence with a second user event that is additionally input when a first user event that is input satisfies a first condition.

Abstract: An apparatus for generating cartoon content includes: a cut input controller configured to control inputting of a signal of adding a cut included in the cartoon content and including a plurality of layers; an effect input controller configured to control inputting of a perspective effect applied to the plurality of layers; and a cut generator configured to generate a final cut such that the plurality of layers express the perspective effect in correspondence with a user event received from a user, wherein the cut generator generates final layers such that the plurality of layers have movement degrees and directions based on layers of the respective layers, in correspondence with the perspective effect.

Abstract: An apparatus for generating cartoon content includes a cut input controller configured to control receiving of a signal of adding a cut included in the cartoon content and having a layer; an effect input controller configured to control receiving of a type of an effect applied to the layer and property information based on the type of the effect; and a cut generator configured to generate a final cut such that the layer moves at a moving speed or by a moving distance corresponding to the type of the effect and a user event received from a user, wherein the cut generator determines a reaction speed of the layer based on the type of the effect and the property information of the effect, calculates a moving distance or a moving speed corresponding to the reaction speed, and generates the final cut to move by the moving distance or at the moving speed.

Abstract: A method of measuring light emission of a display panel and a method of compensating light emission of a display panel are disclosed. In one aspect the method of measuring light emission includes setting a location of a camera such that a imaging range area of the camera includes a first divided region among a plurality of divided regions, wherein the display panel is larger than the imaging range area of the camera and includes the divided regions, and wherein each of the divided regions is smaller than the imaging range area; first displaying a recognition pattern image on the first divided region. The method also includes shooting the first divided region by the camera so as to generate a recognition pattern shot; second displaying a single-color image on the first divided region.

Abstract: A method for programming a non-volatile memory includes applying a first program pulse to a program cell one or more times until a threshold voltage of the program cell reaches a preliminary target voltage, which is lower than a target voltage, while supplying a first voltage to a bit line corresponding to the program cell, and applying a second program pulse to the program cell a predetermined number of times while supplying a second voltage, which is higher to than the first voltage, to the bit line after the threshold voltage of the program cell reaches the preliminary target voltage.

Abstract: A display device includes a panel assembly including: a display area including a plurality of pixels, and a non-display area at a periphery of the display area; an optical measuring component at the non-display area of the panel assembly and configured to measure light generated from the pixels; and a controller configured to control the panel assembly to sequentially display an emission pattern in which the pixels emit light and a non-emission pattern in which the pixels do not emit light, wherein the controller is configured to calculate a pure emission value by comparing an emission measurement value obtained by measuring the emission pattern through the optical measuring component with a non-emission measurement value obtained by measuring the non-emission pattern through the optical measuring component.

Abstract: The single-camera multi-mirror imaging method and apparatus is an inspection system configured to examine a whole surface of a rotating object, preferably a spheroidal object such as a fruit or vegetable. The system includes a plurality of mirrors that direct an image of the inspected object into a digital line scan camera with an associated processor. The processor produces an image of the inspected object showing any detected surface defects and selected contamination on the outer surface of the object.

Abstract: An operation method of a semiconductor memory device includes forming a first data distribution by performing a first programming operation during a first write operation, outputting a predetermined data by detecting the first data distribution on the basis of a first reference voltage corresponding to the first programming operation during a first read operation, forming a second data distribution by performing a second programming operation during a second write operation, and outputting data that is the same as the predetermined data corresponding to the first data distribution during the first read operation by detecting the second data distribution on the basis of a second reference voltage corresponding to the second programming operation during a second read operation.

Abstract: A method of operating a nonvolatile memory device comprises reading erase number information which is updated and stored whenever erasure is performed, setting program start voltages and step voltages based on the erase number information, and performing a program operation based on the program start voltages and the step voltages.

Abstract: A method for operating a semiconductor memory device includes the steps of: erasing memory cells of a memory block to set the memory cells in a first erased state, programming a part of the memory cells of the memory block to convert them into a programmed state, raising threshold voltages of selected memory cells of the memory block and converting the selected memory cells from the programmed state to a second erased state, and reading data from the memory cells in the first erased state, the programmed state, and the second erased state, and outputting the data read from the memory cells in the first and second erased states with the same value.

Abstract: A method of operating a nonvolatile memory device comprises reading erase number information which is updated and stored whenever erasure is performed, setting program start voltages and step voltages based on the erase number information, and performing a program operation based on the program start voltages and the step voltages.

Abstract: The disclosure includes compositions and methods for the production of an immune response against porcine reproductive and respiratory syndrome (PRRS) virus, or PRRSV. The disclosure is based in part on the use of two or more peptide domains, each with a different sequence, from the PRRSV GP5 protein ectodomain. Compositions and methods comprising polypeptides containing the two or more domains, or nucleic acids encoding them, are described.

Abstract: The disclosure includes compositions and methods for the production of an immune response against porcine reproductive and respiratory syndrome (PRRS) virus, or PRRSV. The disclosure is based in part on the use of two or more peptide domains, each with a different sequence, from the PRRSV GP5 protein ectodomain. Compositions and methods comprising polypeptides containing the two or more domains, or nucleic acids encoding them, are described.

Abstract: A method for operating a semiconductor memory device includes the steps of: erasing memory cells of a memory block to set the memory cells in a first erased state, programming a part of the memory cells of the memory block to convert them into a programmed state, raising threshold voltages of selected memory cells of the memory block and converting the selected memory cells from the programmed state to a second erased state, and reading data from the memory cells in the first erased state, the programmed state, and the second erased state, and outputting the data read from the memory cells in the first and second erased states with the same value.

Abstract: A method of programming a nonvolatile memory device includes an inputting step for inputting program data to a first latch of each of page buffers, and inputting redundancy data to a second latch of each of the page buffers, a verification result storage step for performing a program operation on selected memory cells using the program data stored in the first latch, performing a verification operation for the program operation, and storing a result of the verification operation in the first latch of each of the page buffers coupled with the selected memory cells, a verification result change step for changing the result stored in the first latch using the redundancy data stored in the second latch, and a verification check step for determining whether all data stored in the second latches, after the verification result change step, are program pass data.

Abstract: A method of operating a nonvolatile memory device includes performing a program operation on memory cells included in a selected page, checking whether a verification operation for the programmed memory cells is passed or failed by performing the verification operation, counting a number of error bits for the selected page, if the verification operation is failed, performing an error checking and correction (ECC) algorithm using an error correction circuit, if the counted number of error bits is less than or equal to a number of correctable bits, and storing the counted number of error bits in a specific one of a plurality of memory blocks.

Abstract: A method of programming a nonvolatile memory device includes an inputting step for inputting program data to a first latch of each of page buffers, and inputting redundancy data to a second latch of each of the page buffers, a verification result storage step for performing a program operation on selected memory cells using the program data stored in the first latch, performing a verification operation for the program operation, and storing a result of the verification operation in the first latch of each of the page buffers coupled with the selected memory cells, a verification result change step for changing the result stored in the first latch using the redundancy data stored in the second latch, and a verification check step for determining whether all data stored in the second latches, after the verification result change step, are program pass data.

Abstract: A method of operating a nonvolatile memory device comprises reading erase number information which is updated and stored whenever erasure is performed, setting program start voltages and step voltages based on the erase number information, and performing a program operation based on the program start voltages and the step voltages.

Abstract: A flash memory device comprises a memory cell array having a plurality of blocks. An address register section is configured to receive a start block address of the first block to be erased among a plurality of blocks to be erased and a last block address of the last block to be erased among the plurality of blocks to be erased. A controlling logic circuit is configured to output an erase command signal and an erase block address corresponding to one of the blocks to be erased. A block address comparing section is configured to compare the erase block address output by the controlling logic circuit with the last block address, and output an erase progress signal based on the comparison of the erase block address and the last block address to the controlling logic circuit. The controlling logic circuit outputs an erase block address of to another block to be erased until the erase progress signal indicates that the last block to be erased has been or is being erased.

Abstract: The present invention relates to a unit counter block. According to an aspect of the present invention, the unit counter block includes a D-flipflop, a second MUX, and a first MUX. The-flipflop outputs first and second output signals in synchronism with a clock signal. The second MUX selects any one of external data and the second output signal of the D-flipflop in response to a data load signal and outputs a selected signal. The first MUX transfers any one of the first output signal of the D-flipflop and the output signal of the second MUX as an input signal of the D-flipflop in response to a counter enable signal or the data load signal.