Patents by Inventor Byoung-Kwan An

Byoung-Kwan An has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 7609800
    Abstract: The present invention relates to a unit counter block. According to an aspect of the present invention, the unit counter block includes a D-flipflop, a second MUX, and a first MUX. The-flipflop outputs first and second output signals in synchronism with a clock signal. The second MUX selects any one of external data and the second output signal of the D-flipflop in response to a data load signal and outputs a selected signal. The first MUX transfers any one of the first output signal of the D-flipflop and the output signal of the second MUX as an input signal of the D-flipflop in response to a counter enable signal or the data load signal.
    Type: Grant
    Filed: June 27, 2008
    Date of Patent: October 27, 2009
    Assignee: Hynix Semiconductor Inc.
    Inventors: Sang Oh Lim, Byoung Kwan Jeong, Mi Sun Yoon
  • Publication number: 20090208520
    Abstract: The disclosure includes compositions and methods for the production of an immune response against porcine reproductive and respiratory syndrome (PRRS) virus, or PRRSV. The disclosure is based in part on the use of two or more peptide domains, each with a different sequence, from the PRRSV GP5 protein ectodomain. Compositions and methods comprising polypeptides containing the two or more domains, or nucleic acids encoding them, are described.
    Type: Application
    Filed: April 29, 2008
    Publication date: August 20, 2009
    Applicant: MJ BIOLOGICS, INC.
    Inventor: Byoung-Kwan Kim
  • Publication number: 20080084766
    Abstract: A flash memory device comprises a memory cell array having a plurality of blocks. An address register section is configured to receive a start block address of the first block to be erased among a plurality of blocks to be erased and a last block address of the last block to be erased among the plurality of blocks to be erased. A controlling logic circuit is configured to output an erase command signal and an erase block address corresponding to one of the blocks to be erased. A block address comparing section is configured to compare the erase block address output by the controlling logic circuit with the last block address, and output an erase progress signal based on the comparison of the erase block address and the last block address to the controlling logic circuit. The controlling logic circuit outputs an erase block address of to another block to be erased until the erase progress signal indicates that the last block to be erased has been or is being erased.
    Type: Application
    Filed: December 28, 2006
    Publication date: April 10, 2008
    Applicant: Hynix Semiconductor Inc.
    Inventors: Min Joong Jung, Byoung Kwan Jeong, Tai Kyu Kang
  • Patent number: 7012001
    Abstract: A semiconductor device for use in a memory cell includes an active matrix provided with a semiconductor substrate, a plurality of transistors formed on the semiconductor substrate and conductive plugs electrically connected to the transistors, a number of bottom electrodes formed on top of the conductive plugs, composite films formed on the bottom electrodes and Al2O3 films formed on the composite films. In the device, the composite films are made of (Ta2O5)0.92 (TiO2)0.08 by using an atomic layer deposition (ALD).
    Type: Grant
    Filed: December 8, 2003
    Date of Patent: March 14, 2006
    Assignee: Hyundai Electronics Industries Co., Ltd.
    Inventors: Ki-Seon Park, Byoung-Kwan Ahn
  • Publication number: 20040082126
    Abstract: A semiconductor device for use in a memory cell includes an active matrix provided with a semiconductor substrate, a plurality of transistors formed on the semiconductor substrate and conductive plugs electrically connected to the transistors, a number of bottom electrodes formed on top of the conductive plugs, composite films formed on the bottom electrodes and A2O3 films formed on the composite films. In the device, the composite films are made of (Ta2O5)0.92 (TiO2)0.08 by using an atomic layer deposition (ALD).
    Type: Application
    Filed: December 8, 2003
    Publication date: April 29, 2004
    Applicant: Hyundai Electronics Industries Co., Ltd.
    Inventors: Ki-Seon Park, Byoung-Kwan Ahn
  • Patent number: 6690052
    Abstract: A semiconductor device for use in a memory cell includes an active matrix provided with a semiconductor substrate, a plurality of transistors formed on the semiconductor substrate and conductive plugs electrically connected to the transistors, a number of bottom electrodes formed on top of the conductive plugs, composite films formed on the bottom electrodes and Al2O3 films formed on the composite films. In the device, the composite films are made of (Ta2O5)0.92(TiO2)0.08 by using an atomic layer deposition(ALD).
    Type: Grant
    Filed: December 20, 2000
    Date of Patent: February 10, 2004
    Assignee: Hyundai Electronics Industries Co., Ltd.
    Inventors: Ki-Seon Park, Byoung-Kwan Ahn
  • Publication number: 20020020869
    Abstract: A semiconductor device for use in a memory cell includes an active matrix provided with a semiconductor substrate, a plurality of transistors formed on the semiconductor substrate and conductive plugs electrically connected to the transistors, a number of bottom electrodes formed on top of the conductive plugs, composite films formed on the bottom electrodes and Al2O3 films formed on the composite films. In the device, the composite films are made of (Ta2O5)0.92(TiO2)0.08 by using an atomic layer deposition (ALD).
    Type: Application
    Filed: December 20, 2000
    Publication date: February 21, 2002
    Inventors: Ki-Seon Park, Byoung-Kwan Ahn