Patents by Inventor Byueng Su Yoo

Byueng Su Yoo has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 5895224
    Abstract: A three-dimensional cavity surface emitting laser structure and a fabrication method thereof which are capable of effectively controlling the characteristic of the transverse mode by applying independent electrical field to a side wall of an active region and concentrating a current flow along, inside of the active region. The structure includes a protrusion portion of a bottom mirror region formed on a substrate, an insulation film formed in a sidewall of a laser post having an active region extended from the protrusion and a top mirror region, and a sidewall metal mirror layer electrically separated from n-type and p-type electrodes for independently applying an electric field.
    Type: Grant
    Filed: August 20, 1997
    Date of Patent: April 20, 1999
    Assignee: Electronics And Telecommunications Research Institute
    Inventors: Hyo-Hoon Park, Hye-Yong Chu, Byueng-Su Yoo
  • Patent number: 5888842
    Abstract: A method for manufacturing a surface-emitting laser array device is disclosed. In order to control the polarization characteristics of the surface-emitting laser, the surface-emitting laser array device according to the present invention can be manufactured by alternately arranging the surface-emitting laser formed by inclining a cavity in the <110> and <110> direction in accordance with the row or the column direction of the surface-emitting laser, so that the polarization characteristics of the surface-emitting laser in two directions which are relatively perpendicular to each other may be obtained. According to the present invention, it has an advantageous effect that the interaction between the adjacent laser beams can be minimized with maintaining the symmetric feature of the lasing beam when manufacturing an integrated surface-emitting laser array device.
    Type: Grant
    Filed: August 28, 1997
    Date of Patent: March 30, 1999
    Assignee: Electronics and Telecommunications Research Institute
    Inventors: Hye Yong Chu, Byueng-Su Yoo, Hyo-Hoon Park
  • Patent number: 5773319
    Abstract: A method for producing a vertical-cavity surface-emitting laser, includes the steps of: forming a bottom mirror layer, an active layer and a top mirror layer on a semiconductor substrate; forming an antireflection layer on a rear surface of the semiconductor substrate; selectively etching peripheral portions of the antireflection layer to form a first electrode; defining laser emission portions through etching processing; forming a hydrogenated barrier over an entire surface of the resultant structure; forming a post; forming a passivation layer through the hydrogenating of the exposed top mirror layer and the portions of the active layer; forming a planarization film after the partial exposure of the top mirror and forming a second electrode pad to which the exposed top mirror layer contacts.
    Type: Grant
    Filed: April 25, 1997
    Date of Patent: June 30, 1998
    Assignee: Electronics and Telecommunications Research Institute
    Inventors: Hye-Yong Chu, Byueng-Su Yoo, Hyo-Hoon Park
  • Patent number: 5770851
    Abstract: An improved parallel optical logic operator provides a path for light to pass through substrates in which a light source and an optical logic device are arranged. An optical logic device operates by transmission of light forwarded to a predetermined direction. This increases integration efficiency of the system by eliminating optical parts for changing the light path. A unit chip includes a laser array for generating a predetermined light in accordance with an electrical signal for a logic process, a laser array substrate on which via holes are formed for passing light, a microlens array for converting the light beam emitted from each laser device of the laser array into a parallel light beam for passing through the via hole, and an optical logic circuit array formed with a combination of an S-SEED which performs a logic function by transmission of the light signal through an optical window in S-SEED.
    Type: Grant
    Filed: September 13, 1996
    Date of Patent: June 23, 1998
    Assignee: Electronics and Telecommunications Research Institute
    Inventors: Hyo-Hoon Park, Kwang-Joon Kim, Kyung-Sook Hyun, O-Kyun Kwon, Seok-Ho Song, Byueng-Su Yoo, Hye-Yong Chu
  • Patent number: 5448080
    Abstract: Disclosed is an ultrafast optical switching device having two types of multiple quantum well structures to be connected with each other, the device comprising a semi-insulating substrate; and a first and a second multiple quantum well structure formed sequentially on the substrate and united with each other to produce a double-junction multiple quantum well structure. Each of the multiple quantum well structures has nonlinear optical effects and two life time constants present while switching off in the device. One of the life time constants corresponds to a short life time constant to be determined dependent on electrons in the double-junction multiple quantum well structure and the other of the life time constants corresponds to a long life time constant to be determined dependent on holes and lattices therein.
    Type: Grant
    Filed: July 12, 1994
    Date of Patent: September 5, 1995
    Assignee: Electronics and Telecommuncations Research Institute
    Inventors: Seon-Gyu Han, Jong-Tai Lee, Byueng-Su Yoo, Tae-Hyung Zyung, Young-Wan Choi, Pyong-Woon Park, El-Hang Lee