Abstract: A method and apparatus for calculating an observation probability includes a first operation unit that subtracts a mean of a first plurality of parameters of an input voice signal from a second parameter of an input voice signal, and multiplies the subtraction result to obtain a first output. The first output is squared and accumulated N times in a second operation unit to obtain a second output. A third operation unit subtracts a given weighted value from the second output to obtain a third output, and a comparator stores the third output for a comparator stores the third output in order to extract L outputs therefrom, and stores the L extracted outputs based on an order of magnitude of the extracted L outputs.

Abstract: In the analog-to-digital interfacing device, an input selector receives a plurality of analog signals and selectively outputs one of the analog signals based on a plurality of clock signals. An analog-to-digital converter converts the analog signals output from the selector to digital signals.

Abstract: A transmission system is capable of packetizing audio and auxiliary data in compliance with an HDMI standard. The transmission system may include a register set block that may be configured to store video formation information and/or a transmission enable signal; a data packet block that may be configured to generate a first signal, packetize the audio and/or auxiliary data in response to the transmission enable signal, and output packet data in response to a control signal; and a control signal generator that may be configured to output the control signal in response to the video formation information and the first signal.

Abstract: In the analog-to-digital interfacing device, an input selector receives a plurality of analog signals and selectively outputs one of the analog signals based on a plurality of clock signals. An analog-to-digital converter converts the analog signals output from the selector to digital signals.

Abstract: In the analog-to-digital interfacing device, an input selector receives a plurality of analog signals and selectively outputs one of the analog signals based on a plurality of clock signals. An analog-to-digital converter converts the analog signals output from the selector to digital signals.

Abstract: A circuit and method for securing information (e.g., a product serial number or certification key) stored in non-volatile on-chip memory from unauthorized read-out or destruction. External access is prevented by writing a first n-bit security key-word into the memory. A compare circuit compares the first security key-word with a second n-bit security key-word and outputs a comparison signal that either grants or denies external access to the memory based on a predetermined compare condition. The values of each of the first and second key-word and the comparison algorithm (predetermined compare condition) may be selected to avoid any interference with external memory-testing. The predetermined compare condition may be a pre-selected one of a match and a mismatch between the first security key word and the second security key word. At least one bit of the first or second security key word may be a fuse programmable bit.

Abstract: A method and apparatus for determining the rate of data transmitted at variable rates. In the method and apparatus, received data is pre-decoded at receivable rates by pre-decoders which adopt a simple structure and perform pre-decoding rapidly, quality information of the pre-decoded data is detected, and the rate of the received data is estimated based on the quality information of the pre-decoded data. Therefore, the decoding speed of the received data and the decision speed of the data rate increase, reducing power consumption.

Abstract: A method and an apparatus for precisely exposing a predetermined width of a peripheral area of a wafer coated with a layer of photoresist material with light from a light source, wherein the wafer is moved when the light is radiated onto the wafer to expose the photoresist layer at the peripheral area of the wafer, an inspection section inspecting whether the light is radiated onto a precise position of the peripheral area of the wafer, whereby by adjusting the position of the light source if the light is not radiated at the precise position of the peripheral area of the wafer requiring exposure while inspecting the light radiated onto the peripheral area of the wafer, the predetermined width of the peripheral area of the wafer is precisely exposed.

Abstract: In the analog-to-digital interfacing device, an input selector receives a plurality of analog signals and selectively outputs one of the analog signals based on a plurality of clock signals. An analog-to-digital converter converts the analog signals output from the selector to digital signals.

Abstract: A method and an apparatus for precisely exposing a predetermined width of a peripheral area of a wafer coated with a layer of photoresist material with light from a light source, wherein the wafer is moved when the light is radiated onto the wafer to expose the photoresist layer at the peripheral area of the wafer, an inspection section inspecting whether the light is radiated onto a precise position of the peripheral area of the wafer, whereby by adjusting the position of the light source if the light is not radiated at the precise position of the peripheral area of the wafer requiring exposure while inspecting the light radiated onto the peripheral area of the wafer, the predetermined width of the peripheral area of the wafer is precisely exposed.

Abstract: The present invention relates to a structure of a static random access memory (SRAM) having an asymmetric silicide layer and a method for manufacturing the same.

Abstract: A method and an apparatus for precisely exposing a predetermined width of a peripheral area of a wafer coated with a layer of photoresist material with light from a light source, wherein the wafer is moved when the light is radiated onto the wafer to expose the photoresist layer at the peripheral area of the wafer, an inspection section inspecting whether the light is radiated onto a precise position of the peripheral area of the wafer, whereby by adjusting the position of the light source if the light is not radiated at the precise position of the peripheral area of the wafer requiring exposure while inspecting the light radiated onto the peripheral area of the wafer, the predetermined width of the peripheral area of the wafer is precisely exposed.

Abstract: The present invention relates to a structure of a static random access memory (SRAM) having an asymmetric silicide layer and a method for manufacturing the same.

Abstract: The present invention relates to a structure of a static random access memory (SRAM) having an asymmetric silicide layer and a method for manufacturing the same.

Abstract: A voice recognition device including dedicated arithmetic calculating modules for arithmetic operations that are more frequently required among arithmetic operations necessary for voice recognition, an observation probability calculating device for calculating probabilities that each of the phonemes of a pre-selected word can be observed upon voice recognition, a complex Fast Fourier Transform (FFT) calculation device and method of calculating a complex FFT of complex data, a cache, and a cache controlling method are provided. The arithmetic modules interpret commands received from a receiver and perform operations indicated by the commands.

Abstract: A method and apparatus for calculating an observation probability includes a first operation unit that subtracts a mean of a first plurality of parameters of an input voice signal from a second parameter of an input voice signal, and multiplies the subtraction result to obtain a first output. The first output is squared and accumulated N times in a second operation unit to obtain a second output. A third operation unit subtracts a given weighted value from the second output to obtain a third output, and a comparator stores the third output for a comparator stores the third output in order to extract L outputs therefrom, and stores the L extracted outputs based on an order of magnitude of the extracted L outputs.

Abstract: A bus encoding/decoding apparatus and method for a low power digital signal processor (DSP), which uses a narrow data bus, is provided. The apparatus for encoding n bits of data of a data bus, includes a conditional inverting unit for inverting each of (n−1) lower bits of n data when the most significant bit of the n bits of data is 1, a storage unit for storing the last n bits of data which is output to the bus, and a first exclusive OR operating unit for performing a bitwise exclusive OR operation on the lower (n−1) bits or data, which has been inverted by the conditional inverting unit, and the lower (n−1) bits of the n data, which has been stored in the storage unit, wherein the most significant bit of the n bits of data and (n−1) bits of data, which is obtained as the result of the bitwise exclusive OR operation performed by the first exclusive OR operating unit, are output.

Abstract: A method and an apparatus for precisely exposing a predetermined width of a peripheral area of a wafer coated with a layer of photoresist material with light from a light source, wherein the wafer is moved when the light is radiated onto the wafer to expose the photoresist layer at the peripheral area of the wafer, an inspection section inspecting whether the light is radiated onto a precise position of the peripheral area of the wafer, whereby by adjusting the position of the light source if the light is not radiated at the precise position of the peripheral area of the wafer requiring exposure while inspecting the light radiated onto the peripheral area of the wafer, the predetermined width of the peripheral area of the wafer is precisely exposed.

Abstract: A bus encoding/decoding apparatus and method for a low power digital signal processor (DSP), which uses a narrow data bus, is provided. The apparatus for encoding n bits of data of a data bus, includes a conditional inverting unit for inverting each of (n−1) lower bits of n data when the most significant bit of the n bits of data is 1, a storage unit for storing the last n bits of data which is output to the bus, and a first exclusive OR operating unit for performing a bitwise exclusive OR operation on the lower (n−1) bits or data, which has been inverted by the conditional inverting unit, and the lower (n−1) bits of the n data, which has been stored in the storage unit, wherein the most significant bit of the n bits of data and (n−1) bits of data, which is obtained as the result of the bitwise exclusive OR operation performed by the first exclusive OR operating unit, are output.