Abstract: In one embodiment, a semiconductor module includes at least one semiconductor chip package, a board having functional pads and dummy pads, and at least one solder joint electrically connecting the semiconductor chip package and one of the functional pads of the board. Furthermore, at least one supporting solder bump is formed on one of the dummy pads and disposed under a portion of the semiconductor chip package. For example, the supporting solder bump may be disposed under a peripheral area of the semiconductor chip package.

Abstract: A lower-melting-point solder having a lower melting point than solder balls is used to bond the solder balls with a module substrate. The lower-melting-point solder has a melting point lower than the solder balls. A bonding temperature is at a temperature between the melting point of the lower-melting-point solder and the melting point of the solder balls.

Abstract: An open socket, into which a module can be inserted, may include: a body into which the module is insertable; a pin to contact an electrical connection member of the inserted module, the pin serving as at least a part of an electrical signal path to/from the module upon insertion thereof; an elastic biasing member to exert an elastic biasing force to cause the pin to contact the module; and at least one lower support to limit insertion depth as being a depth at which a lower portion of the inserted module comes to rest upon the at least one lower support; the body and the at least one lower support being constructed and arranged to provide a gap adjacent the at least one support, which leaves an area of the socket underlying the lower portion of the inserted module open to the outside.

Abstract: A semiconductor module and a method of manufacturing a semiconductor module including at least one chip package, at least one module board, at least one conductive element provided between the first chip package and the module board and a protector for applying pressure to the conductive element, the module board, and the first chip package and/or acting as a heat sink for the first chip package.

Abstract: A semiconductor device, which may include a heat sink using a thermal induced adhesive is provided. The adhesive strength of the thermal induced adhesive at room temperature may be reduced when heated. The thermal induced adhesive may attach the heat sink to the semiconductor device, and may result in a thinner semiconductor device.

Abstract: The array printed circuit board includes at least one circuit board having a first surface. A first layout of first and second chip mounting regions is formed on a first half of the first surface and a second layout of first, and second chip mounting regions is formed on a second half of the first surface. The first and second layouts have opposite first and second chip mounting region patterns.

Abstract: An open socket, into which a module can be inserted, may include: a body into which the module is insertable; a pin to contact an electrical connection member of the inserted module, the pin serving as at least a part of an electrical signal path to/from the module upon insertion thereof; an elastic biasing member to exert an elastic biasing force to cause the pin to contact the module; and at least one lower support to limit insertion depth as being a depth at which a lower portion of the inserted module comes to rest upon the at least one lower support; the body and the at least one lower support being constructed and arranged to provide a gap adjacent the at least one support, which leaves an area of the socket underlying the lower portion of the inserted module open to the outside.

Abstract: A method and arrangement for attaching labels to a plurality of semiconductor modules arranged on a double-sided substrate is described which may shorten a process stream in an effort to reduce equipment costs. An exemplary arrangement may include at least one label attaching unit configured to attach labels to a plurality of semiconductor modules mounted on one of a first surface and a second surface of the double-sided substrate, and may include at least one turner configured to turn over the double-sided substrate to expose one of the first surface and second surface to the label attaching unit.

Abstract: The array printed circuit board includes at least one circuit board having a first surface. A first layout of first and second chip mounting regions is formed on a first half of the first surface and a second layout of first, and second chip mounting regions is formed on a second half of the first surface. The first and second layouts have opposite first and second chip mounting region patterns.

Abstract: A printed circuit board that can be connected with a pin connector and a method of manufacturing the printed circuit board are provided. Solidified solder can be formed on the tap unit without the need for additional processes, by applying solder printing to the tap unit at the same time it is applied to pads of the printed circuit board and, for example, by performing high temperature reflow. In addition, reliability and reduction in cost of a pin connector can be ensured without using a pin connector into which a high-priced wired solder is inserted. Rather a general pin connector can be used because the pin connector and the tap unit are connected to each other through the solidified solder formed on the tap unit.

Abstract: A semiconductor package is provided. In one embodiment, the semiconductor package includes a lead frame having a die pad and a plurality of leads disposed around the die pad. One or more semiconductor integrated circuit chips are mounted on the die pad and electrically connected to the plurality of leads. The semiconductor further includes a molding part for encapsulating the lead frame and the one or more chips. The molding part includes an upper molding portion having a first width, and a lower molding portion having a second width smaller than the first width to expose a portion of said leads from the lower molding portion. With the semiconductor package of the present invention, the mounting area and the mounting height on a substrate can be reduced. Also, the mounting reliability of a package on a substrate and electrical characteristics of the package can be improved.

Abstract: Disclosed is a one-step permanent cosmetic composition that comprises 1.0 to 5.5 wt. % of a reducing agent; 0.1 to 9.5 wt. % of an alkaline agent; 0.1 to 7.0 wt. % of a catalyst; 1.0 to 15.0 wt. % of an alcohol; and distilled water or ion exchange water for the residual percentage by weight, using a solvent having an alkalinity (representing a consumption of 0.01 N HCl for 1 mL of a test sample) of 1.0 to 4.6 and having a pH value of less than 9.6; and also a one-step permanent cosmetic composition that comprises 1.0 to 5.5 wt. % of a reducing agent; 0.1 to 9.5 wt. % of an alkaline agent; 0.1 to 7.0 wt. % of a catalyst; 1.0 to 15.0 wt. % of an alcohol and additionally 1.0 to 4.5 wt. % of a viscosity enhancing agent; and distilled water or ion exchange water for the residual percentage by weight, using a solvent having an alkalinity (representing a consumption of 0.01 N HCl for 1 mL of a test sample) of 1.0 to 4.6 and having a pH value of less than 9.6.

Abstract: A semiconductor package is provided. In one embodiment, the semiconductor package includes a lead frame having a die pad and a plurality of leads disposed around the die pad. One or more semiconductor integrated circuit chips are mounted on the die pad and electrically connected to the plurality of leads. The semiconductor further includes a molding part for encapsulating the lead frame and the one or more chips. The molding part includes an upper molding portion having a first width, and a lower molding portion having a second width smaller than the first width to expose a portion of said leads from the lower molding portion. With the semiconductor package of the present invention, the mounting area and the mounting height on a substrate can be reduced. Also, the mounting reliability of a package on a substrate and electrical characteristics of the package can be improved.

Abstract: On a semiconductor wafer, recognition marks are fabricated on the crossing points of scribe lines for the purpose of proper wafer alignment in wafer sawing process. Since the recognition mark has a distinctive pattern that is distinguished from other circuit patterns on the chip, the recognition mark can be easily recognized by a camera in a sawing apparatus, and reduce the chance of wafer misaligning. When a part of circuit pattern on the semiconductor chip is used for the alignment purpose, the chance of wafer misalignment relatively high due to the similarity between the part chosen and other parts of the circuit pattern. The present invention also provides a method for sawing the wafer using the recognition marks.

Abstract: On a semiconductor wafer, recognition marks are fabricated on the crossing points of scribe lines for the purpose of proper wafer alignment in wafer sawing process. Since the recognition mark has a distinctive pattern that is distinguished from other circuit patterns on the chip, the recognition mark can be easily recognized by a camera in a sawing apparatus, and reduce the chance of wafer misaligning. When a part of circuit pattern on the semiconductor chip is used for the alignment purpose, the chance of wafer misalignment relatively high due to the similarity between the part chosen and other parts of the circuit pattern. The present invention also provides a method for sawing the wafer using the recognition marks.

Abstract: A method for manufacturing lead-on-chip (LOC) semiconductor packages includes steps of preparing a lead frame having inner leads and outer leads, and applying a liquid adhesive having a certain viscosity to the bottom surfaces of the inner leads. The method also includes positioning a semiconductor chip under the lead frame, to expose electrode pads through the space defined between opposing rows of inner leads. The inner leads are then attached to the active surface of the semiconductor chip by means of the liquid adhesive. The adhesive applying step may be carried out using a tool having discharge projections through which liquid adhesive is discharged from a reservoir. The liquid adhesive under the lead frame may be cured and then turned into a solid adhesive layer by thermocompression. The liquid adhesive is a thermosetting resin or a thermoplastic resin.

Abstract: A method for separating semiconductor devices formed on a semiconductor wafer includes: inscribing the semiconductor wafer along scribe lines; mounting the inscribed semiconductor wafer on a stage including an elastic structure and vacuum suction holes that can be aligned to respective semiconductor chips; applying a vacuum through the vacuum suction holes to hold the semiconductor wafer on the elastic structure; and applying a mechanical force to the semiconductor wafer to break the wafer along the scribe lines and separate the semiconductor devices. A device for separating semiconductor devices formed on a wafer includes a stage including an elastic structure and vacuum suction holes that can be aligned with respective semiconductor chips of the semiconductor wafer and a press for applying mechanical force to the semiconductor wafer on the elastic structure.

Abstract: A semiconductor chip packaging method includes the provision of individual elastomer chip carriers cut from an elastomer sheet having a uniform thickness and smooth, parallel surfaces. The elastomer sheet is mounted on an adhesive tape held by a fixing member, such as a support ring, and is then divided into individual carriers. The carrier is attached to a circuit interposer, and a semiconductor chip is attached to the carrier. Circuit leads of the interposer are bonded to connection pads on the chip. The beam lead bonding area is then encapsulated, and conductive bumps are formed on the underside of the package to serve as input/output terminals for the packaged device. Using this method, an number of devices can be packaged simultaneously on a flexible sheet and then separated into individual devices by cutting the sheet between the devices.