Abstract: Described herein are phased array and transceiver systems with distortion measurement circuitry configured to obtain distortion measurements of system transmitters and provide the distortion measurements to receive beamforming components of the system. Such systems advantageously make use of existing beamforming components of the system to additionally route distortion measurements for baseband DPD processing. Such systems may not need external components to measure signals radiated by antennas of the system or dedicated paths linking system transmitters directly to a baseband processor. In some embodiments, receive beamforming components may be configured to sum distortion measurements from each transmitter to create an aggregate distortion measurement usable as representative of the average transmitter for DPD processing.

Abstract: Described herein are phased array and transceiver systems with distortion measurement circuitry configured to obtain distortion measurements of system transmitters and provide the distortion measurements to receive beamforming components of the system. Such systems advantageously make use of existing beamforming components of the system to additionally route distortion measurements for baseband DPD processing. Such systems may not need external components to measure signals radiated by antennas of the system or dedicated paths linking system transmitters directly to a baseband processor. In some embodiments, receive beamforming components may be configured to sum distortion measurements from each transmitter to create an aggregate distortion measurement usable as representative of the average transmitter for DPD processing.

Abstract: A transmission interface between at least a first module and a second module is proposed. The transmission interface includes at least two physical transmission mediums. Each physical transmission medium is arranged to carry a multiplexed signal in which at least two signals are integrated. The at least two physical transmission mediums include a first physical transmission medium arranged to carry a first multiplexed signal including a first IF signal and a reference clock signal. The first IF signal and the reference clock signal are at different frequencies.

Abstract: A transmission interface between at least a first module and a second module is proposed. The transmission interface includes at least two physical transmission mediums. Each physical transmission medium is arranged to carry a multiplexed signal in which at least two signals are integrated. The at least two physical transmission mediums include a first physical transmission medium arranged to carry a first multiplexed signal including a first IF signal and a reference clock signal. The first IF signal and the reference clock signal are at different frequencies.

Abstract: A transmission interface between at least a master module and a slave module is proposed. The transmission interface includes a predetermined number of physical transmission medium(s). Each physical transmission medium is arranged to carry a multiplexed signal in which at least two signals are integrated, and the predetermined number is not smaller than a number of intermediate frequency (IF) stream(s) to be transmitted.

Abstract: A transmission interface between at least a master module and a slave module is proposed. The transmission interface includes a predetermined number of physical transmission medium(s). Each physical transmission medium is arranged to carry a multiplexed signal in which at least two signals are integrated, and the predetermined number is not smaller than a number of intermediate frequency (IF) stream(s) to be transmitted.

Abstract: Power combiners and splitters are commonly used as components for handling radio frequency (RF) signals. Disclosed herein are power combiner/splitters and methods to operate the same to reduce power loss when not all the ports are used. When an input/output port of a power combiner/splitter is unused or inactive, switches may be provided to cut off the port from the rest of the power combiner/splitter, which has programmable quarter-wave elements and resistors that are adjustable based on the number of remaining input/output ports that are active, such that in effect, the circuit operates similarly to a multi-way Wilkinson power combiner/splitter, and power loss due to inactive ports may be reduced or eliminated.

Abstract: A class-F power amplifier (PA) with a matching network is disclosed herein. The class-F PA comprises a first switch and a second switch operating in differential mode, with a second harmonic trap circuitry selectively terminating the drain terminals to ground at a second harmonic frequency. The second harmonic trap circuitry comprises a plurality of lumped inductive and capacitive components. The PA further comprises a common mode trap and a matching network to reduce the imbalance of the drain terminal impedance between first harmonics and third harmonics.

Abstract: Power combiners and splitters are commonly used as components for handling radio frequency (RF) signals. Disclosed herein are power combiner/splitters and methods to operate the same to reduce power loss when not all the ports are used. When an input/output port of a power combiner/splitter is unused or inactive, switches may be provided to cut off the port from the rest of the power combiner/splitter, which has programmable quarter-wave elements and resistors that are adjustable based on the number of remaining input/output ports that are active, such that in effect, the circuit operates similarly to a multi-way Wilkinson power combiner/splitter, and power loss due to inactive ports may be reduced or eliminated.

Abstract: A class-F power amplifier (PA) with a matching network is disclosed herein. The class-F PA comprises a first switch and a second switch operating in differential mode, with a second harmonic trap circuitry selectively terminating the drain terminals to ground at a second harmonic frequency. The second harmonic trap circuitry comprises a plurality of lumped inductive and capacitive components. The PA further comprises a common mode trap and a matching network to reduce the imbalance of the drain terminal impedance between first harmonics and third harmonics.

Abstract: According to at least one aspect, a communication system is provided. The communication system includes a power amplifier configured to amplify an input signal to generate an amplified output signal and provide the amplified output signal to an antenna, a power supply coupled to the power amplifier and configured to provide power to the power amplifier based on a power supply control signal, and a controller coupled to the power supply. The controller is configured to identify a target transmit power level for transmission of a wireless signal, generate the power supply control signal based on the target transmit power level using information indicative of a relationship between the target transmit power level and a setting of the power supply, generate performance information indicative of a characteristic of the communication system when the wireless signal is transmitted, and update the information indicative of the relationship using the performance information.

Abstract: A control method for a radio frequency (RF) receiver of a user equipment (UE) and UE are provided. The control method includes the steps of detecting whether at least one blocker exists; determining a current scenario of the UE when the blocker does not exist; obtaining a signal-to-noise-ratio (SNR) target corresponding to the current scenario; and selecting an operation mode from a plurality of power modes according to the SNR target to operate the RF receiver.

Abstract: According to at least one aspect, a communication system is provided. The communication system includes a power amplifier configured to amplify an input signal to generate an amplified output signal and provide the amplified output signal to an antenna, a power supply coupled to the power amplifier and configured to provide power to the power amplifier based on a power supply control signal, and a controller coupled to the power supply. The controller is configured to identify a target transmit power level for transmission of a wireless signal, generate the power supply control signal based on the target transmit power level using information indicative of a relationship between the target transmit power level and a setting of the power supply, generate performance information indicative of a characteristic of the communication system when the wireless signal is transmitted, and update the information indicative of the relationship using the performance information.

Abstract: A method for helium mass spectrometric fine-leak test is based on quantitative determination of maximum test-waiting time, which gives a method for quantitative determination of the maximum test-waiting time for fine-leak test during a helium mass spectrometric test process of the sealability, and gives a method for determining the criterion for measured leak rate by taking the minimum helium gas exchange time constant, i.e., a rigour grade ?Hemin, of an acceptable sealed electronic component as a basic criterion for helium mass spectrometric fine-leak test. Based on the inventive method for quantitative determination of the maximum test-waiting time, for most of the cavity volume ranges, the maximum test-waiting time that is determined accurately may be much longer than 1 hour or 0.5 hour as determined qualitatively by the existing related standards.

Abstract: A current buffer used in a receiver arrangement includes a direct path mode and a mirror path mode. The direct path mode includes a plurality of first set of transistors and a plurality of first set of current sources turned on while all remaining transistors and current sources are turned off, during the direct path mode a current signal at an input node directly appears at an output node. The mirror path mode includes a first transistor and a first current source being turned off while a plurality of second set of transistors and a plurality of second set of current sources are turned on. The current signal goes through a current mirror pair and appears at the output node with a gain which is controlled by slicing one of transistors of the current mirror pair and a second current source allowing multiple gains in the mirror path mode.

Abstract: A current buffer used in a receiver arrangement includes a direct path mode and a mirror path mode. The direct path mode includes a plurality of first set of transistors and a plurality of first set of current sources turned on while all remaining transistors and current sources are turned off , during the direct path mode a current signal at an input node directly appears at an output node. The mirror path mode includes a first transistor and a first current source being turned off while a plurality of second set of transistors and a plurality of second set of current sources are turned on. The current signal goes through a current mirror pair and appears at the output node with a gain which is controlled by slicing one of transistors of the current mirror pair and a second current source allowing multiple gains in the mirror path mode.

Abstract: A receiver includes LNA-mixer arrangement, a current buffer arrangement and an analog filter arrangement. The LNA-mixer arrangement receives a plurality of input signals and provides a wide-band input match for a specified frequency range of operation. The LNA-mixer arrangement includes a plurality of LNA structures and a plurality of mixer structures where each of the LNA structure path is coupled to a single mixer structure. The LNA-mixer arrangement outputs a first signal. The current buffer arrangement receives the first signal and reduces the Image Rejection (IR) asymmetry between the high frequency portion and the low frequency portion of the first signal as well as provides a gain to the first signal. The current buffer arrangement outputs a second signal. The analog filter arrangement receives the second signals and perform filtering and calibration.

Abstract: A receiver includes LNA-mixer arrangement, a current buffer arrangement and an analog filter arrangement. The LNA-mixer arrangement receives a plurality of input signals and provides a wide-band input match for a specified frequency range of operation. The LNA-mixer arrangement includes a plurality of LNA structures and a plurality of mixer structures where each of the LNA structure path is coupled to a single mixer structure. The LNA-mixer arrangement outputs a first signal. The current buffer arrangement receives the first signal and reduces the Image Rejection (IR) asymmetry between the high frequency portion and the low frequency portion of the first signal as well as provides a gain to the first signal. The current buffer arrangement outputs a second signal. The analog filter arrangement receives the second signals and perform filtering and calibration.

Abstract: A method and apparatus is provided for reducing interference in circuits. A management strategy is provided to reduce reference spurs and interference in circuits. The management strategy uses a combination of one or more techniques which reduce the digital current, minimize mutual inductance, utilize field cancellation, prevent leakage current, and/or manage impedance. These techniques may be used alone, or preferably, used on combination with one another.

Abstract: A method and apparatus is provided for reducing interference in circuits. A management strategy is provided to reduce reference spurs and interference in circuits. The management strategy uses a combination of one or more techniques which reduce the digital current, minimize mutual inductance, utilize field cancellation, prevent leakage current, and/or manage impedance. These techniques may be used alone, or preferably, used on combination with one another.