Patents by Inventor Calvin Sheen

Calvin Sheen has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Photovoltaics on silicon
    Patent number: 10680126
    Abstract: Structures including crystalline material disposed in openings defined in a non-crystalline mask layer disposed over a substrate. A photovoltaic cell may be disposed above the crystalline material.
    Type: Grant
    Filed: November 23, 2016
    Date of Patent: June 9, 2020
    Assignee: Taiwan Semiconductor Manufacturing Company, Ltd.
    Inventors: Jizhong Li, Anthony J. Lochtefeld, Calvin Sheen, Zhiyuan Cheng
  • PHOTOVOLTAICS ON SILICON
    Publication number: 20170077330
    Abstract: Structures including crystalline material disposed in openings defined in a non-crystalline mask layer disposed over a substrate. A photovoltaic cell may be disposed above the crystalline material.
    Type: Application
    Filed: November 23, 2016
    Publication date: March 16, 2017
    Inventors: Jizhong Li, Anthony J. Lochtefeld, Calvin Sheen, Zhiyuan Cheng
  • Quantum tunneling devices and circuits with lattice-mismatched semiconductor structures
    Patent number: 9559712
    Abstract: Structures include a tunneling device disposed over first and second lattice-mismatched semiconductor materials. Process embodiments include forming tunneling devices over lattice-mismatched materials.
    Type: Grant
    Filed: July 7, 2015
    Date of Patent: January 31, 2017
    Assignee: Taiwan Semiconductor Manufacturing Company, Ltd.
    Inventors: Zhiyuan Cheng, Calvin Sheen
  • Photovoltaics on silicon
    Patent number: 9508890
    Abstract: Structures including crystalline material disposed in openings defined in a non-crystalline mask layer disposed over a substrate. A photovoltaic cell may be disposed above the crystalline material.
    Type: Grant
    Filed: April 9, 2008
    Date of Patent: November 29, 2016
    Assignee: Taiwan Semiconductor Manufacturing Company, Ltd.
    Inventors: Jizhong Li, Anthony J. Lochtefeld, Calvin Sheen, Zhiyuan Cheng
  • Methods for semiconductor sensor structures with reduced dislocation defect densities
    Patent number: 9455299
    Abstract: Non-silicon based semiconductor devices are integrated into silicon fabrication processes by using aspect-ratio-trapping materials. Non-silicon light-sensing devices in a least a portion of a crystalline material can output electrons generated by light absorption therein. Exemplary light-sensing devices can have relatively large micron dimensions. As an exemplary application, complementary-metal-oxide-semiconductor photodetectors are formed on a silicon substrate by incorporating an aspect-ratio-trapping technique.
    Type: Grant
    Filed: June 30, 2015
    Date of Patent: September 27, 2016
    Assignee: Taiwan Semiconductor Manufacturing Company, Ltd.
    Inventors: Zhiyuan Cheng, James Fiorenza, Calvin Sheen, Anthony J. Lochtefeld
  • SEMICONDUCTOR SENSOR STRUCTURES WITH REDUCED DISLOCATION DEFECT DENSITIES AND RELATED METHODS FOR THE SAME
    Publication number: 20150325619
    Abstract: Non-silicon based semiconductor devices are integrated into silicon fabrication processes by using aspect-ratio-trapping materials. Non-silicon light-sensing devices in a least a portion of a crystalline material can output electrons generated by light absorption therein. Exemplary light-sensing devices can have relatively large micron dimensions. As an exemplary application, complementary-metal-oxide-semiconductor photodetectors are formed on a silicon substrate by incorporating an aspect-ratio-trapping technique.
    Type: Application
    Filed: June 30, 2015
    Publication date: November 12, 2015
    Inventors: Zhiyuan Cheng, James Fiorenza, Calvin Sheen, Anthony J. Lochtefeld
  • Quantum Tunneling Devices and Circuits with Lattice-Mismatched Semiconductor Structures
    Publication number: 20150311911
    Abstract: Structures include a tunneling device disposed over first and second lattice-mismatched semiconductor materials. Process embodiments include forming tunneling devices over lattice-mismatched materials.
    Type: Application
    Filed: July 7, 2015
    Publication date: October 29, 2015
    Inventors: Zhiyuan Cheng, Calvin Sheen
  • Semiconductor sensor structures with reduced dislocation defect densities
    Patent number: 9105549
    Abstract: Non-silicon based semiconductor devices are integrated into silicon fabrication processes by using aspect-ratio-trapping materials. Non-silicon light-sensing devices in a least a portion of a crystalline material can output electrons generated by light absorption therein. Exemplary light-sensing devices can have relatively large micron dimensions. As an exemplary application, complementary-metal-oxide-semiconductor photodetectors are formed on a silicon substrate by incorporating an aspect-ratio-trapping technique.
    Type: Grant
    Filed: July 16, 2014
    Date of Patent: August 11, 2015
    Assignee: Taiwan Semiconductor Manufacturing Company, Ltd.
    Inventors: Zhiyuan Cheng, James Fiorenza, Calvin Sheen, Anthony J. Lochtefeld
  • Quantum tunneling devices and circuits with lattice-mismatched semiconductor structures
    Patent number: 9105522
    Abstract: Structures include a tunneling device disposed over first and second lattice-mismatched semiconductor materials. Process embodiments include forming tunneling devices over lattice-mismatched materials.
    Type: Grant
    Filed: September 12, 2014
    Date of Patent: August 11, 2015
    Assignee: Taiwan Semiconductor Manufacturing Company, Ltd.
    Inventors: Zhiyuan Cheng, Calvin Sheen
  • Quantum Tunneling Devices and Circuits with Lattice-Mismatched Semiconductor Structures
    Publication number: 20150001469
    Abstract: Structures include a tunneling device disposed over first and second lattice-mismatched semiconductor materials. Process embodiments include forming tunneling devices over lattice-mismatched materials.
    Type: Application
    Filed: September 12, 2014
    Publication date: January 1, 2015
    Inventors: Zhiyuan Cheng, Calvin Sheen
  • Semiconductor Sensor Structures with Reduced Dislocation Defect Densities and Related Methods for the Same
    Publication number: 20140327060
    Abstract: Non-silicon based semiconductor devices are integrated into silicon fabrication processes by using aspect-ratio-trapping materials. Non-silicon light-sensing devices in a least a portion of a crystalline material can output electrons generated by light absorption therein. Exemplary light-sensing devices can have relatively large micron dimensions. As an exemplary application, complementary-metal-oxide-semiconductor photodetectors are formed on a silicon substrate by incorporating an aspect-ratio-trapping technique.
    Type: Application
    Filed: July 16, 2014
    Publication date: November 6, 2014
    Inventors: Zhiyuan Cheng, James Fiorenza, Calvin Sheen, Anthony J. Lochtefeld
  • Quantum tunneling devices and circuits with lattice-mismatched semiconductor structures
    Patent number: 8860160
    Abstract: Structures include a tunneling device disposed over first and second lattice-mismatched semiconductor materials. Process embodiments include forming tunneling devices over lattice-mismatched materials.
    Type: Grant
    Filed: December 17, 2013
    Date of Patent: October 14, 2014
    Assignee: Taiwan Semiconductor Manufacturing Company, Ltd.
    Inventors: Zhiyuan Cheng, Calvin Sheen
  • Method for semiconductor sensor structures with reduced dislocation defect densities
    Patent number: 8809106
    Abstract: Non-silicon based semiconductor devices are integrated into silicon fabrication processes by using aspect-ratio-trapping materials. Non-silicon light-sensing devices in a least a portion of a crystalline material can output electrons generated by light absorption therein. Exemplary light-sensing devices can have relatively large micron dimensions. As an exemplary application, complementary-metal-oxide-semiconductor photodetectors are formed on a silicon substrate by incorporating an aspect-ratio-trapping technique.
    Type: Grant
    Filed: August 24, 2012
    Date of Patent: August 19, 2014
    Assignee: Taiwan Semiconductor Manufacturing Company, Ltd.
    Inventors: Zhiyuan Cheng, James Fiorenza, Calvin Sheen, Anthony J. Lochtefeld
  • Quantum Tunneling Devices and Circuits with Lattice-Mismatched Semiconductor Structures
    Publication number: 20140167098
    Abstract: Structures include a tunneling device disposed over first and second lattice-mismatched semiconductor materials. Process embodiments include forming tunneling devices over lattice-mismatched materials.
    Type: Application
    Filed: December 17, 2013
    Publication date: June 19, 2014
    Applicant: TAIWAN SEMICONDUCTOR MANUFACTURING COMPANY, LTD.
    Inventors: Zhiyuan Cheng, Calvin Sheen
  • Quantum tunneling devices and circuits with lattice-mismatched semiconductor structures
    Patent number: 8629047
    Abstract: Structures include a tunneling device disposed over first and second lattice-mismatched semiconductor materials. Process embodiments include forming tunneling devices over lattice-mismatched materials.
    Type: Grant
    Filed: July 9, 2012
    Date of Patent: January 14, 2014
    Assignee: Taiwan Semiconductor Manufacturing Company, Ltd.
    Inventors: Zhiyuan Cheng, Calvin Sheen
  • Semiconductor Sensor Structures with Reduced Dislocation Defect Densities and Related Methods for the Same
    Publication number: 20130029449
    Abstract: Non-silicon based semiconductor devices are integrated into silicon fabrication processes by using aspect-ratio-trapping materials. Non-silicon light-sensing devices in a least a portion of a crystalline material can output electrons generated by light absorption therein. Exemplary light-sensing devices can have relatively large micron dimensions. As an exemplary application, complementary-metal-oxide-semiconductor photodetectors are formed on a silicon substrate by incorporating an aspect-ratio-trapping technique.
    Type: Application
    Filed: August 24, 2012
    Publication date: January 31, 2013
    Applicant: TAIWAN SEMICONDUCTOR MANUFACTURING COMPANY, LTD.
    Inventors: Zhiyuan Cheng, James G. Fiorenza, Calvin Sheen, Anthony Lochtefeld
  • Quantum Tunneling Devices and Circuits with Lattice-Mismatched Semiconductor Structures
    Publication number: 20120309113
    Abstract: Structures include a tunneling device disposed over first and second lattice-mismatched semiconductor materials. Process embodiments include forming tunneling devices over lattice-mismatched materials.
    Type: Application
    Filed: July 9, 2012
    Publication date: December 6, 2012
    Applicant: TAIWAN SEMICONDUCTOR MANUFACTURING COMPANY, LTD.
    Inventors: Zhiyuan Cheng, Calvin Sheen
  • Semiconductor sensor structures with reduced dislocation defect densities
    Patent number: 8253211
    Abstract: Non-silicon based semiconductor devices are integrated into silicon fabrication processes by using aspect-ratio-trapping materials. Non-silicon light-sensing devices in a least a portion of a crystalline material can output electrons generated by light absorption therein. Exemplary light-sensing devices can have relatively large micron dimensions. As an exemplary application, complementary-metal-oxide-semiconductor photodetectors are formed on a silicon substrate by incorporating an aspect-ratio-trapping technique.
    Type: Grant
    Filed: September 24, 2009
    Date of Patent: August 28, 2012
    Assignee: Taiwan Semiconductor Manufacturing Company, Ltd.
    Inventors: Zhiyuan Cheng, James G. Fiorenza, Calvin Sheen, Anthony Lochtefeld
  • Quantum tunneling devices and circuits with lattice-mismatched semiconductor structures
    Patent number: 8216951
    Abstract: Structures include a tunneling device disposed over first and second lattice-mismatched semiconductor materials. Process embodiments include forming tunneling devices over lattice-mismatched materials.
    Type: Grant
    Filed: December 20, 2010
    Date of Patent: July 10, 2012
    Assignee: Taiwan Semiconductor Manufacturing Company, Ltd.
    Inventors: Zhiyuan Cheng, Calvin Sheen
  • Quantum Tunneling Devices and Circuits with Lattice-Mismatched Semiconductor Structures
    Publication number: 20110086498
    Abstract: Structures include a tunneling device disposed over first and second lattice-mismatched semiconductor materials. Process embodiments include forming tunneling devices over lattice-mismatched materials.
    Type: Application
    Filed: December 20, 2010
    Publication date: April 14, 2011
    Applicant: Taiwan Semiconductor Manufacturing Company, Ltd.
    Inventors: Zhiyuan Cheng, Calvin Sheen